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-rw-r--r--board/cr50/board.c29
-rw-r--r--board/cr50/gpio.inc8
-rw-r--r--board/cr50/scratch_reg1.h11
3 files changed, 47 insertions, 1 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c
index 2463534167..e61f9be991 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -186,6 +186,11 @@ int board_has_ec_cr50_comm_support(void)
return !!(board_properties & BOARD_EC_CR50_COMM_SUPPORT);
}
+int board_get_ccd_rec_lid_pin(void)
+{
+ return board_properties & BOARD_CCD_REC_LID_PIN_MASK;
+}
+
/* Get header address of the backup RW copy. */
const struct SignedHeader *get_other_rw_addr(void)
{
@@ -303,7 +308,8 @@ static struct board_cfg board_cfg_table[] = {
{
.strap_cfg = 0x0E,
.board_properties = BOARD_SLAVE_CONFIG_SPI |
- BOARD_USE_PLT_RESET | BOARD_EC_CR50_COMM_SUPPORT,
+ BOARD_USE_PLT_RESET | BOARD_EC_CR50_COMM_SUPPORT |
+ BOARD_CCD_REC_LID_PIN_DIOA9,
},
/* Zork: DIOA12 = 5K PU, DIOA6 = 1M PU */
{
@@ -657,6 +663,27 @@ static void configure_board_specific_gpios(void)
/* Enable powerdown exit on DIOM0 */
GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 1);
}
+ /* Connect the correct pin to the lid open/recovery switch gpio. */
+ switch (board_get_ccd_rec_lid_pin()) {
+ case BOARD_CCD_REC_LID_PIN_DIOA1:
+ GWRITE(PINMUX, GPIO1_GPIO10_SEL, GC_PINMUX_DIOA1_SEL);
+ GWRITE(PINMUX, DIOA1_SEL, GC_PINMUX_GPIO1_GPIO10_SEL);
+ GWRITE_FIELD(PINMUX, DIOA1_CTL, IE, 1);
+ break;
+ case BOARD_CCD_REC_LID_PIN_DIOA9:
+ GWRITE(PINMUX, GPIO1_GPIO10_SEL, GC_PINMUX_DIOA9_SEL);
+ GWRITE(PINMUX, DIOA9_SEL, GC_PINMUX_GPIO1_GPIO10_SEL);
+ GWRITE_FIELD(PINMUX, DIOA9_CTL, IE, 1);
+ break;
+ case BOARD_CCD_REC_LID_PIN_DIOA12:
+ GWRITE(PINMUX, GPIO1_GPIO10_SEL, GC_PINMUX_DIOA12_SEL);
+ GWRITE(PINMUX, DIOA12_SEL, GC_PINMUX_GPIO1_GPIO10_SEL);
+ GWRITE_FIELD(PINMUX, DIOA12_CTL, IE, 1);
+ break;
+ default:
+ gpio_set_flags(GPIO_CCD_REC_LID_SWITCH, 0);
+ break;
+ }
if (board_uses_closed_source_set1())
closed_source_set1_configure_gpios();
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc
index 76d6adf0f1..2f2402aea3 100644
--- a/board/cr50/gpio.inc
+++ b/board/cr50/gpio.inc
@@ -69,6 +69,7 @@
* GPIO1.4 detect_tpm_rst_asserted
* GPIO1.5 unwedge_i2cs_scl
* GPIO1.6 monitor_i2cs_sda
+ * GPIO1.10 rec_lid_switch
* GPIO1.11 ec_tx_cr50_rx_in
* GPIO1.12 strap_a0
* GPIO1.13 strap_a1
@@ -153,6 +154,13 @@ GPIO(SPI_CS_L, PIN(0, 9), GPIO_INPUT)
/* Used during *chip* factory process. */
GPIO(DIOB4, PIN(0, 10), GPIO_INPUT | GPIO_PULL_DOWN)
+/*
+ * Used to assert lid open or recovery switch with ccd. This signal is
+ * guaranteed to have an external pull-up. The pin is connected to the gpio in
+ * board.c. If the gpio number changes, it needs to be updated in board.c.
+ */
+GPIO(CCD_REC_LID_SWITCH, PIN(1, 10), GPIO_ODR_HIGH | GPIO_INPUT)
+
/* GPIOs used for Cr50 strapping options */
GPIO(STRAP_A0, PIN(1, 12), GPIO_INPUT)
GPIO(STRAP_A1, PIN(1, 13), GPIO_INPUT)
diff --git a/board/cr50/scratch_reg1.h b/board/cr50/scratch_reg1.h
index ac98d98883..2fedfc5fff 100644
--- a/board/cr50/scratch_reg1.h
+++ b/board/cr50/scratch_reg1.h
@@ -91,11 +91,22 @@
#define BOARD_EC_CR50_COMM_SUPPORT BIT(21)
/*
+ * Bits to store which pin is used for the ccd recovery switch/lid open signal.
+ */
+#define BOARD_CCD_REC_LID_PIN_SHIFT 22
+#define BOARD_CCD_REC_LID_PIN_MASK (3 << BOARD_CCD_REC_LID_PIN_SHIFT)
+#define BOARD_CCD_REC_LID_PIN_DIOA1 (1 << BOARD_CCD_REC_LID_PIN_SHIFT)
+#define BOARD_CCD_REC_LID_PIN_DIOA9 (2 << BOARD_CCD_REC_LID_PIN_SHIFT)
+#define BOARD_CCD_REC_LID_PIN_DIOA12 (3 << BOARD_CCD_REC_LID_PIN_SHIFT)
+
+
+/*
* Macro to capture all properties related to board strapping pins. This must be
* updated if additional strap related properties are added.
*/
#define BOARD_ALL_PROPERTIES ( \
BOARD_ALLOW_CHANGE_TPM_MODE | \
+ BOARD_CCD_REC_LID_PIN_MASK | \
BOARD_CLOSED_LOOP_RESET | \
BOARD_CLOSED_SOURCE_SET1 | \
BOARD_DEEP_SLEEP_DISABLED | \