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-rw-r--r--include/config.h14
-rw-r--r--include/panic.h4
2 files changed, 18 insertions, 0 deletions
diff --git a/include/config.h b/include/config.h
index 8d7c0d34d6..8e01398bd7 100644
--- a/include/config.h
+++ b/include/config.h
@@ -771,6 +771,20 @@
#undef CONFIG_DEDICATED_RECOVERY_BUTTON_2
/*
+ * RISC-V core specific panic data is bigger than Cortex-M core specific panic
+ * data. Including this into union in panic_data structure causes whole
+ * to grow by 28 bytes. In many boards EC RO is still obtaining pointer to
+ * beginning of panic data by subtracting its panic data structure size from
+ * the end of RAM. When EC RW saves panic data it will be corrupted by EC RO.
+ * Moreover, during next boot EC RW won't be able to find jump data (see
+ * b/165773837 for more details).
+ *
+ * This config allows boards to not include RV32I panic data if their EC RO
+ * doesn't include it to keep panic data structure in sync.
+ */
+#undef CONFIG_DO_NOT_INCLUDE_RV32I_PANIC_DATA
+
+/*
* The board has volume up and volume down buttons. Note, these are *buttons*
* and not keys in the keyboard matrix.
*/
diff --git a/include/panic.h b/include/panic.h
index b6e1c0d8cd..664c3c58f0 100644
--- a/include/panic.h
+++ b/include/panic.h
@@ -84,7 +84,9 @@ struct panic_data {
struct cortex_panic_data cm; /* Cortex-Mx registers */
struct nds32_n8_panic_data nds_n8; /* NDS32 N8 registers */
struct x86_panic_data x86; /* Intel x86 */
+#ifndef CONFIG_DO_NOT_INCLUDE_RV32I_PANIC_DATA
struct rv32i_panic_data riscv; /* RISC-V RV32I */
+#endif
};
/*
@@ -100,7 +102,9 @@ enum panic_arch {
PANIC_ARCH_CORTEX_M = 1, /* Cortex-M architecture */
PANIC_ARCH_NDS32_N8 = 2, /* NDS32 N8 architecture */
PANIC_ARCH_X86 = 3, /* Intel x86 */
+#ifndef CONFIG_DO_NOT_INCLUDE_RV32I_PANIC_DATA
PANIC_ARCH_RISCV_RV32I = 4, /* RISC-V RV32I */
+#endif
};
/* Use PANIC_DATA_PTR to refer to the persistent storage location */