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-rw-r--r--zephyr/drivers/cros_shi/cros_shi_npcx.c8
-rw-r--r--zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml4
-rw-r--r--zephyr/include/cros/nuvoton/npcx.dtsi1
3 files changed, 0 insertions, 13 deletions
diff --git a/zephyr/drivers/cros_shi/cros_shi_npcx.c b/zephyr/drivers/cros_shi/cros_shi_npcx.c
index ba75eecdae..a65fa734f7 100644
--- a/zephyr/drivers/cros_shi/cros_shi_npcx.c
+++ b/zephyr/drivers/cros_shi/cros_shi_npcx.c
@@ -803,14 +803,6 @@ static int shi_npcx_init(const struct device *dev)
struct shi_reg *const inst = HAL_INSTANCE(dev);
const struct device *const clk_dev =
device_get_binding(NPCX_CLK_CTRL_NAME);
- const struct npcx_alt shi_ver_ctrl[] = {
- { .group = SHI_VER_CTRL_ALT_FILED(group),
- .bit = SHI_VER_CTRL_ALT_FILED(bit),
- .inverted = SHI_VER_CTRL_ALT_FILED(inv) }
- };
-
- /* Enable the new version of SHI hardware module. */
- npcx_pinctrl_mux_configure(shi_ver_ctrl, 1, 1);
/* Turn on shi device clock first */
ret = clock_control_on(clk_dev,
diff --git a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml b/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml
index cf54cde7f8..c13f3e2b5a 100644
--- a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml
+++ b/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml
@@ -21,10 +21,6 @@ properties:
required: true
description: configurations of pinmux controllers
- ver-ctrl:
- type: phandle
- required: true
- description: configurations of SHI module version
shi-cs-wui:
type: phandle
required: true
diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi
index 9c646423bf..8cacae3e95 100644
--- a/zephyr/include/cros/nuvoton/npcx.dtsi
+++ b/zephyr/include/cros/nuvoton/npcx.dtsi
@@ -93,7 +93,6 @@
interrupts = <18 2>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 1>;
pinctrl-0 = <&altc_shi_sl>;
- ver-ctrl = <&altf_shi_new>;
shi-cs-wui =<&wui_io53>;
label = "SHI";
};