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-rw-r--r--board/cheza/board.h3
-rw-r--r--board/lazor/board.h3
-rw-r--r--board/pompom/board.h3
-rw-r--r--board/trogdor/gpio.inc2
-rw-r--r--power/sc7180.c20
-rw-r--r--power/sdm845.c20
6 files changed, 29 insertions, 22 deletions
diff --git a/board/cheza/board.h b/board/cheza/board.h
index 54f9d1f7e2..23a6b9f81a 100644
--- a/board/cheza/board.h
+++ b/board/cheza/board.h
@@ -173,6 +173,9 @@
#define I2C_PORT_EEPROM NPCX_I2C_PORT5_0
#define I2C_PORT_SENSOR NPCX_I2C_PORT7_0
+/* GPIO alias */
+#define GPIO_PMIC_RESIN_L GPIO_PM845_RESIN_L
+
#ifndef __ASSEMBLER__
#include "gpio_signal.h"
diff --git a/board/lazor/board.h b/board/lazor/board.h
index 2995dfe0a8..a7b6747493 100644
--- a/board/lazor/board.h
+++ b/board/lazor/board.h
@@ -61,6 +61,9 @@
#define CONFIG_GMR_TABLET_MODE
#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L
+/* GPIO alias */
+#define GPIO_PMIC_RESIN_L GPIO_PM845_RESIN_L
+
#ifndef __ASSEMBLER__
#include "gpio_signal.h"
diff --git a/board/pompom/board.h b/board/pompom/board.h
index fff40814b0..939fa88e4e 100644
--- a/board/pompom/board.h
+++ b/board/pompom/board.h
@@ -55,8 +55,9 @@
#define CONFIG_GMR_TABLET_MODE
#define GMR_TABLET_MODE_GPIO_L GPIO_LID_360_L
+/* GPIO alias */
#define GPIO_EC_RST_ODL GPIO_EC_RST_ODL_GPIO02
-#define GPIO_PM845_RESIN_L GPIO_PM7180_RESIN_D_L
+#define GPIO_PMIC_RESIN_L GPIO_PM7180_RESIN_D_L
#ifndef __ASSEMBLER__
diff --git a/board/trogdor/gpio.inc b/board/trogdor/gpio.inc
index 1ce44cbb22..0f23000b70 100644
--- a/board/trogdor/gpio.inc
+++ b/board/trogdor/gpio.inc
@@ -57,7 +57,7 @@ GPIO(EC_ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW) /* Indicate when EC is en
GPIO(EC_BATT_PRES_ODL, PIN(E, 5), GPIO_INPUT) /* Battery Present */
/* PMIC/AP 1.8V */
-GPIO(PM845_RESIN_L, PIN(3, 2), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* PMIC reset trigger */
+GPIO(PMIC_RESIN_L, PIN(3, 2), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* PMIC reset trigger */
GPIO(PMIC_KPD_PWR_ODL, PIN(D, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* PMIC power button */
GPIO(EC_INT_L, PIN(A, 2), GPIO_ODR_HIGH) /* Interrupt line between AP and EC */
diff --git a/power/sc7180.c b/power/sc7180.c
index 4372973914..18f4c40b65 100644
--- a/power/sc7180.c
+++ b/power/sc7180.c
@@ -69,7 +69,7 @@
/* Wait for polling the AP on signal */
#define PMIC_POWER_AP_WAIT (1 * MSEC)
-/* The length of an issued low pulse to the PM845_RESIN_L signal */
+/* The length of an issued low pulse to the PMIC_RESIN_L signal */
#define PMIC_RESIN_PULSE_LENGTH (20 * MSEC)
/* The timeout of the check if the system can boot AP */
@@ -412,14 +412,14 @@ static int set_pmic_pwron(int enable)
* 3. Release PMIC_KPD_PWR_ODL
*
* Power-off sequence:
- * 1. Hold down PMIC_KPD_PWR_ODL and PM845_RESIN_L, which is a power-off
+ * 1. Hold down PMIC_KPD_PWR_ODL and PMIC_RESIN_L, which is a power-off
* trigger (requiring reprogramming PMIC registers to make
- * PMIC_KPD_PWR_ODL + PM845_RESIN_L as a shutdown trigger)
+ * PMIC_KPD_PWR_ODL + PMIC_RESIN_L as a shutdown trigger)
* 2. PMIC stops supplying power to POWER_GOOD (requiring
* reprogramming PMIC to set the stage-1 and stage-2 reset timers to
* 0 such that the pull down happens just after the deboucing time
* of the trigger, like 2ms)
- * 3. Release PMIC_KPD_PWR_ODL and PM845_RESIN_L
+ * 3. Release PMIC_KPD_PWR_ODL and PMIC_RESIN_L
*
* If the above PMIC registers not programmed or programmed wrong, it
* falls back to the next functions, which cuts off the system power.
@@ -427,11 +427,11 @@ static int set_pmic_pwron(int enable)
gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 0);
if (!enable)
- gpio_set_level(GPIO_PM845_RESIN_L, 0);
+ gpio_set_level(GPIO_PMIC_RESIN_L, 0);
ret = wait_pmic_pwron(enable, PMIC_POWER_AP_RESPONSE_TIMEOUT);
gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 1);
if (!enable)
- gpio_set_level(GPIO_PM845_RESIN_L, 1);
+ gpio_set_level(GPIO_PMIC_RESIN_L, 1);
return ret;
}
@@ -710,9 +710,9 @@ void chipset_reset(enum chipset_reset_reason reason)
/*
* Warm reset sequence:
- * 1. Issue a low pulse to PM845_RESIN_L, which triggers PMIC
+ * 1. Issue a low pulse to PMIC_RESIN_L, which triggers PMIC
* to do a warm reset (requiring reprogramming PMIC registers
- * to make PM845_RESIN_L as a warm reset trigger).
+ * to make PMIC_RESIN_L as a warm reset trigger).
* 2. PMIC then issues a low pulse to AP_RST_L to reset AP.
* EC monitors the signal to see any low pulse.
* 2.1. If a low pulse found, done.
@@ -721,9 +721,9 @@ void chipset_reset(enum chipset_reset_reason reason)
* to initiate a cold reset power sequence.
*/
- gpio_set_level(GPIO_PM845_RESIN_L, 0);
+ gpio_set_level(GPIO_PMIC_RESIN_L, 0);
usleep(PMIC_RESIN_PULSE_LENGTH);
- gpio_set_level(GPIO_PM845_RESIN_L, 1);
+ gpio_set_level(GPIO_PMIC_RESIN_L, 1);
rv = power_wait_signals_timeout(IN_AP_RST_ASSERTED,
PMIC_POWER_AP_RESPONSE_TIMEOUT);
diff --git a/power/sdm845.c b/power/sdm845.c
index 1556dbb111..a8cc70b8ea 100644
--- a/power/sdm845.c
+++ b/power/sdm845.c
@@ -69,7 +69,7 @@
/* Wait for polling the AP on signal */
#define PMIC_POWER_AP_WAIT (1 * MSEC)
-/* The length of an issued low pulse to the PM845_RESIN_L signal */
+/* The length of an issued low pulse to the PMIC_RESIN_L signal */
#define PMIC_RESIN_PULSE_LENGTH (20 * MSEC)
/* The timeout of the check if the system can boot AP */
@@ -371,14 +371,14 @@ static void set_pmic_pwron(int enable)
* 3. Release PMIC_KPD_PWR_ODL
*
* Power-off sequence:
- * 1. Hold down PMIC_KPD_PWR_ODL and PM845_RESIN_L, which is a power-off
+ * 1. Hold down PMIC_KPD_PWR_ODL and PMIC_RESIN_L, which is a power-off
* trigger (requiring reprogramming PMIC registers to make
- * PMIC_KPD_PWR_ODL + PM845_RESIN_L as a shutdown trigger)
+ * PMIC_KPD_PWR_ODL + PMIC_RESIN_L as a shutdown trigger)
* 2. PM845 stops supplying power to POWER_GOOD (requiring
* reprogramming PMIC to set the stage-1 and stage-2 reset timers to
* 0 such that the pull down happens just after the deboucing time
* of the trigger, like 2ms)
- * 3. Release PMIC_KPD_PWR_ODL and PM845_RESIN_L
+ * 3. Release PMIC_KPD_PWR_ODL and PMIC_RESIN_L
*
* If the above PMIC registers not programmed or programmed wrong, it
* falls back to the next functions, which cuts off the system power.
@@ -386,11 +386,11 @@ static void set_pmic_pwron(int enable)
gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 0);
if (!enable)
- gpio_set_level(GPIO_PM845_RESIN_L, 0);
+ gpio_set_level(GPIO_PMIC_RESIN_L, 0);
wait_pmic_pwron(enable, PMIC_POWER_AP_RESPONSE_TIMEOUT);
gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 1);
if (!enable)
- gpio_set_level(GPIO_PM845_RESIN_L, 1);
+ gpio_set_level(GPIO_PMIC_RESIN_L, 1);
}
enum power_state power_chipset_init(void)
@@ -696,9 +696,9 @@ void chipset_reset(enum chipset_reset_reason reason)
/*
* Warm reset sequence:
- * 1. Issue a low pulse to PM845_RESIN_L, which triggers PMIC
+ * 1. Issue a low pulse to PMIC_RESIN_L, which triggers PMIC
* to do a warm reset (requiring reprogramming PMIC registers
- * to make PM845_RESIN_L as a warm reset trigger).
+ * to make PMIC_RESIN_L as a warm reset trigger).
* 2. PMIC then issues a low pulse to AP_RST_L to reset AP.
* EC monitors the signal to see any low pulse.
* 2.1. If a low pulse found, done.
@@ -707,9 +707,9 @@ void chipset_reset(enum chipset_reset_reason reason)
* to initiate a cold reset power sequence.
*/
- gpio_set_level(GPIO_PM845_RESIN_L, 0);
+ gpio_set_level(GPIO_PMIC_RESIN_L, 0);
usleep(PMIC_RESIN_PULSE_LENGTH);
- gpio_set_level(GPIO_PM845_RESIN_L, 1);
+ gpio_set_level(GPIO_PMIC_RESIN_L, 1);
rv = power_wait_signals_timeout(IN_AP_RST_ASSERTED,
PMIC_POWER_AP_RESPONSE_TIMEOUT);
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