diff options
33 files changed, 130 insertions, 166 deletions
diff --git a/board/burnet/board.c b/board/burnet/board.c index f4a11d3d92..87d027ad3f 100644 --- a/board/burnet/board.c +++ b/board/burnet/board.c @@ -270,7 +270,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; /* Reinitialize spi peripheral. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); /* Pin mux spi peripheral toward the sensor. */ gpio_config_module(MODULE_SPI_MASTER, 1); @@ -287,7 +287,7 @@ static void board_spi_disable(void) gpio_config_module(MODULE_SPI_MASTER, 0); /* Disable spi peripheral and clocks. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, diff --git a/board/c2d2/board.c b/board/c2d2/board.c index 7e8af674c1..1cf4728f12 100644 --- a/board/c2d2/board.c +++ b/board/c2d2/board.c @@ -341,12 +341,12 @@ void usb_spi_board_enable(struct usb_spi_config const *config) STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(&spi_devices[0], 1); } void usb_spi_board_disable(struct usb_spi_config const *config) { - spi_enable(CONFIG_SPI_FLASH_PORT, 0); + spi_enable(&spi_devices[0], 0); /* Disable clocks to SPI2 module */ STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; diff --git a/board/cerise/board.c b/board/cerise/board.c index 585f40197c..306de802e4 100644 --- a/board/cerise/board.c +++ b/board/cerise/board.c @@ -274,7 +274,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; /* Reinitialize spi peripheral. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); /* Pin mux spi peripheral toward the sensor. */ gpio_config_module(MODULE_SPI_MASTER, 1); @@ -291,7 +291,7 @@ static void board_spi_disable(void) gpio_config_module(MODULE_SPI_MASTER, 0); /* Disable spi peripheral and clocks. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, diff --git a/board/damu/board.c b/board/damu/board.c index b4ad13b3e8..079920401e 100644 --- a/board/damu/board.c +++ b/board/damu/board.c @@ -274,7 +274,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; /* Reinitialize spi peripheral. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); /* Pin mux spi peripheral toward the sensor. */ gpio_config_module(MODULE_SPI_MASTER, 1); @@ -291,7 +291,7 @@ static void board_spi_disable(void) gpio_config_module(MODULE_SPI_MASTER, 0); /* Disable spi peripheral and clocks. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, diff --git a/board/discovery-stm32f072/board.c b/board/discovery-stm32f072/board.c index b1b9346cd3..c7099f55d1 100644 --- a/board/discovery-stm32f072/board.c +++ b/board/discovery-stm32f072/board.c @@ -175,12 +175,12 @@ void usb_spi_board_enable(struct usb_spi_config const *config) STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(&spi_devices[0], 1); } void usb_spi_board_disable(struct usb_spi_config const *config) { - spi_enable(CONFIG_SPI_FLASH_PORT, 0); + spi_enable(&spi_devices[0], 0); /* Disable clocks to SPI2 module */ STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; diff --git a/board/elm/board.c b/board/elm/board.c index 9a8b412520..accb1ea8a3 100644 --- a/board/elm/board.c +++ b/board/elm/board.c @@ -403,7 +403,7 @@ static void board_chipset_pre_init(void) STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); } DECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, board_chipset_pre_init, HOOK_PRIO_DEFAULT); @@ -413,7 +413,7 @@ static void board_chipset_shutdown(void) /* Disable level shift to SoC when shutting down */ gpio_set_level(GPIO_LEVEL_SHIFT_EN_L, 1); - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); /* Disable clocks to SPI2 module */ STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; diff --git a/board/fennel/board.c b/board/fennel/board.c index 59c6b47651..a5848c61e3 100644 --- a/board/fennel/board.c +++ b/board/fennel/board.c @@ -273,7 +273,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; /* Reinitialize spi peripheral. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); /* Pin mux spi peripheral toward the sensor. */ gpio_config_module(MODULE_SPI_MASTER, 1); @@ -290,7 +290,7 @@ static void board_spi_disable(void) gpio_config_module(MODULE_SPI_MASTER, 0); /* Disable spi peripheral and clocks. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, diff --git a/board/hammer/board.c b/board/hammer/board.c index d64d4975ad..e0218b322f 100644 --- a/board/hammer/board.c +++ b/board/hammer/board.c @@ -196,7 +196,7 @@ static void board_init(void) #endif #ifdef HAS_SPI_TOUCHPAD - spi_enable(CONFIG_SPI_TOUCHPAD_PORT, 0); + spi_enable(&spi_devices[SPI_ST_TP_DEVICE_ID], 0); /* Disable SPI passthrough when the system is locked */ usb_spi_enable(&usb_spi, system_is_locked()); @@ -215,7 +215,7 @@ static void board_init(void) clock_wait_bus_cycles(BUS_APB, 1); /* Enable SPI for touchpad */ gpio_config_module(MODULE_SPI_MASTER, 1); - spi_enable(CONFIG_SPI_TOUCHPAD_PORT, 1); + spi_enable(&spi_devices[SPI_ST_TP_DEVICE_ID], 1); #endif /* HAS_SPI_TOUCHPAD */ } /* This needs to happen before PWM is initialized. */ diff --git a/board/hatch_fp/board.c b/board/hatch_fp/board.c index 9d3fcd1253..51eeb4ce99 100644 --- a/board/hatch_fp/board.c +++ b/board/hatch_fp/board.c @@ -84,7 +84,7 @@ static void configure_fp_sensor_spi(void) /* Enable clocks to SPI2 module (master) */ STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2; - spi_enable(CONFIG_SPI_FP_PORT, 1); + spi_enable(&spi_devices[0], 1); } /* Initialize board. */ diff --git a/board/jacuzzi/board.c b/board/jacuzzi/board.c index 6c3707ce10..dc5bf2d21d 100644 --- a/board/jacuzzi/board.c +++ b/board/jacuzzi/board.c @@ -278,7 +278,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; /* Reinitialize spi peripheral. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); /* Pin mux spi peripheral toward the sensor. */ gpio_config_module(MODULE_SPI_MASTER, 1); @@ -295,7 +295,7 @@ static void board_spi_disable(void) gpio_config_module(MODULE_SPI_MASTER, 0); /* Disable spi peripheral and clocks. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, diff --git a/board/mchpevb1/board.c b/board/mchpevb1/board.c index 0a502f632c..b80db787cd 100644 --- a/board/mchpevb1/board.c +++ b/board/mchpevb1/board.c @@ -999,7 +999,7 @@ static void board_spi_enable(void) { trace0(0, BRD, 0, "HOOK_CHIPSET_STARTUP - board_spi_enable"); - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[1], 1); /* Toggle SPI chip select to switch BMI160 from I2C mode * to SPI mode @@ -1014,7 +1014,7 @@ DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_spi_enable, static void board_spi_disable(void) { trace0(0, BRD, 0, "HOOK_CHIPSET_SHUTDOWN - board_spi_disable"); - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[1], 0); } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_spi_disable, MOTION_SENSE_HOOK_PRIO + 1); diff --git a/board/nocturne_fp/board.c b/board/nocturne_fp/board.c index c12003577f..e4886f3cc8 100644 --- a/board/nocturne_fp/board.c +++ b/board/nocturne_fp/board.c @@ -76,7 +76,7 @@ static void spi_configure(void) /* Enable clocks to SPI4 module (master) */ STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI4; - spi_enable(CONFIG_SPI_FP_PORT, 1); + spi_enable(&spi_devices[0], 1); } /* Initialize board. */ diff --git a/board/nucleo-dartmonkey/board.c b/board/nucleo-dartmonkey/board.c index ea5a921aa7..5e81b37a6b 100644 --- a/board/nucleo-dartmonkey/board.c +++ b/board/nucleo-dartmonkey/board.c @@ -75,7 +75,7 @@ static void spi_configure(void) /* Enable clocks to SPI4 module (master) */ STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI4; - spi_enable(CONFIG_SPI_FP_PORT, 1); + spi_enable(&spi_devices[0], 1); } /* Initialize board. */ diff --git a/board/oak/board.c b/board/oak/board.c index 2c76cdc98b..7a2d9c5698 100644 --- a/board/oak/board.c +++ b/board/oak/board.c @@ -294,7 +294,7 @@ static void board_init(void) STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); CPRINTS("Board using SPI sensors"); #endif } diff --git a/board/rainier/board.c b/board/rainier/board.c index 2d5140eed6..3fa159a8f0 100644 --- a/board/rainier/board.c +++ b/board/rainier/board.c @@ -200,7 +200,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); } DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_spi_enable, @@ -208,7 +208,7 @@ DECLARE_HOOK(HOOK_CHIPSET_STARTUP, static void board_spi_disable(void) { - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); /* Disable clocks to SPI2 module */ STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; diff --git a/board/scarlet/board.c b/board/scarlet/board.c index c1beb0882a..4544aa551c 100644 --- a/board/scarlet/board.c +++ b/board/scarlet/board.c @@ -239,7 +239,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); } DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_spi_enable, @@ -247,7 +247,7 @@ DECLARE_HOOK(HOOK_CHIPSET_STARTUP, static void board_spi_disable(void) { - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); /* Disable clocks to SPI2 module */ STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; diff --git a/board/servo_micro/board.c b/board/servo_micro/board.c index 6bbbd85c84..8074ba38ab 100644 --- a/board/servo_micro/board.c +++ b/board/servo_micro/board.c @@ -350,12 +350,12 @@ void usb_spi_board_enable(struct usb_spi_config const *config) STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(&spi_devices[0], 1); } void usb_spi_board_disable(struct usb_spi_config const *config) { - spi_enable(CONFIG_SPI_FLASH_PORT, 0); + spi_enable(&spi_devices[0], 0); /* Disable clocks to SPI2 module */ STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; diff --git a/board/stern/board.c b/board/stern/board.c index ac6e2775fa..e2782ebbd3 100644 --- a/board/stern/board.c +++ b/board/stern/board.c @@ -274,7 +274,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; /* Reinitialize spi peripheral. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); /* Pin mux spi peripheral toward the sensor. */ gpio_config_module(MODULE_SPI_MASTER, 1); @@ -291,7 +291,7 @@ static void board_spi_disable(void) gpio_config_module(MODULE_SPI_MASTER, 0); /* Disable spi peripheral and clocks. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, diff --git a/board/willow/board.c b/board/willow/board.c index d8b5e82b44..b673a6a02f 100644 --- a/board/willow/board.c +++ b/board/willow/board.c @@ -273,7 +273,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; /* Reinitialize spi peripheral. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); /* Pin mux spi peripheral toward the sensor. */ gpio_config_module(MODULE_SPI_MASTER, 1); @@ -290,7 +290,7 @@ static void board_spi_disable(void) gpio_config_module(MODULE_SPI_MASTER, 0); /* Disable spi peripheral and clocks. */ - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, diff --git a/chip/host/spi_master.c b/chip/host/spi_master.c index 1900e7b7a8..f36a9cf40b 100644 --- a/chip/host/spi_master.c +++ b/chip/host/spi_master.c @@ -12,7 +12,7 @@ #include "spi.h" -test_mockable int spi_enable(int port, int enable) +test_mockable int spi_enable(const struct spi_device_t *spi_device, int enable) { return EC_SUCCESS; } diff --git a/chip/it83xx/spi_master.c b/chip/it83xx/spi_master.c index 23cea9d2ab..b8ae9dc18c 100644 --- a/chip/it83xx/spi_master.c +++ b/chip/it83xx/spi_master.c @@ -75,8 +75,10 @@ static void sspi_transmission_end(void) } /* We assume only one SPI port in the chip, one SPI device */ -int spi_enable(int port, int enable) +int spi_enable(const struct spi_device_t *spi_device, int enable) { + int port = spi_device->port; + if (enable) { /* * bit[5:4] @@ -166,6 +168,6 @@ static void sspi_init(void) for (i = 0; i < spi_devices_used; i++) /* Disabling spi module */ - spi_enable(spi_devices[i].port, 0); + spi_enable(&spi_devices[i], 0); } DECLARE_HOOK(HOOK_INIT, sspi_init, HOOK_PRIO_INIT_SPI); diff --git a/chip/lm4/spi.c b/chip/lm4/spi.c index be988b78a0..629e306af7 100644 --- a/chip/lm4/spi.c +++ b/chip/lm4/spi.c @@ -18,24 +18,17 @@ #define CPUTS(outstr) cputs(CC_SPI, outstr) #define CPRINTS(format, args...) cprints(CC_SPI, format, ## args) - -int spi_enable(int port, int enable) +int spi_enable(const struct spi_device_t *spi_device, int enable) { - int i; - if (enable) { gpio_config_module(MODULE_SPI, 1); - for (i = 0; i < spi_devices_used; i++) { - if (spi_devices[i].port != port) - continue; - /* - * Don't use the SSI0 frame output. - * CS# is a GPIO so we can keep it low during an entire - * transaction. - */ - gpio_set_flags(spi_device[i]->gpio_cs, GPIO_OUTPUT); - gpio_set_level(spi_device[i]->gpio_cs, 1); - } + /* + * Don't use the SSI0 frame output. + * CS# is a GPIO so we can keep it low during an entire + * transaction. + */ + gpio_set_flags(spi_device->gpio_cs, GPIO_OUTPUT); + gpio_set_level(spi_device->gpio_cs, 1); /* Enable SSI port */ LM4_SSI_CR1(0) |= 0x02; @@ -43,13 +36,9 @@ int spi_enable(int port, int enable) /* Disable SSI port */ LM4_SSI_CR1(0) &= ~0x02; - for (i = 0; i < spi_devices_used; i++) { - if (spi_devices[i].port != port) - continue; - /* Make sure CS# is deselected */ - gpio_set_level(spi_device[i]->gpio_cs, 1); - gpio_set_flags(spi_device->gpio_cs[i], GPIO_ODR_HIGH); - } + /* Make sure CS# is deselected */ + gpio_set_level(spi_device->gpio_cs, 1); + gpio_set_flags(spi_device->gpio_cs[i], GPIO_ODR_HIGH); gpio_config_module(MODULE_SPI, 0); } @@ -137,7 +126,7 @@ static int spi_init(void) /* Ensure the SPI port is disabled. This keeps us from interfering * with the main chipset when we're not explicitly using the SPI * bus. */ - spi_enable(CONFIG_SPI_FLASH_PORT, 0); + spi_enable(SPI_FLASH_DEVICE, 0); return EC_SUCCESS; } @@ -173,7 +162,7 @@ static int command_spirom(int argc, char **argv) uint8_t txsr1[] = {0x05}; uint8_t txsr2[] = {0x35}; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); printrx("Man/Dev ID", txmandev, sizeof(txmandev), 2); printrx("JEDEC ID", txjedec, sizeof(txjedec), 3); @@ -181,7 +170,7 @@ static int command_spirom(int argc, char **argv) printrx("Status reg 1", txsr1, sizeof(txsr1), 1); printrx("Status reg 2", txsr2, sizeof(txsr2), 1); - spi_enable(CONFIG_SPI_FLASH_PORT, 0); + spi_enable(SPI_FLASH_DEVICE, 0); return EC_SUCCESS; } diff --git a/chip/mchp/lfw/ec_lfw.c b/chip/mchp/lfw/ec_lfw.c index c2fe9d6515..0d69c6a16b 100644 --- a/chip/mchp/lfw/ec_lfw.c +++ b/chip/mchp/lfw/ec_lfw.c @@ -381,7 +381,7 @@ void lfw_main(void) uart_init(); system_init(); - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); uart_puts("littlefw "); uart_puts(current_image_data.version); diff --git a/chip/mchp/spi.c b/chip/mchp/spi.c index 2d5a7e9a3f..5931b05f1d 100644 --- a/chip/mchp/spi.c +++ b/chip/mchp/spi.c @@ -267,31 +267,26 @@ int spi_transaction(const struct spi_device_t *spi_device, /** * Enable SPI port and associated controller * - * @param port Zero based index into spi_device an array of - * struct spi_device_t + * @param spi_device SPI device * @param enable * @return EC_SUCCESS or EC_ERROR_INVAL if port is unrecognized * @note called from common/spi_flash.c * - * spi_devices[].port is defined as + * spi_device->port is defined as * bits[3:0] = controller instance * bits[7:4] = controller family 0 = QMSPI, 1 = GPSPI */ -int spi_enable(int port, int enable) +int spi_enable(const struct spi_device_t *spi_device, int enable) { int rc; - uint8_t hw_port; - + uint8_t hw_port = spi_device->port; rc = EC_ERROR_INVAL; - if (port < spi_devices_used) { - hw_port = spi_devices[port].port; - if ((hw_port & 0xF0) == QMSPI_CLASS) - rc = qmspi_enable(hw_port, enable); + + if ((hw_port & 0xF0) == QMSPI_CLASS) + rc = qmspi_enable(hw_port, enable); #if defined(CONFIG_MCHP_GPSPI) && !defined(LFW) - if ((hw_port & 0xF0) == GPSPI_CLASS) - rc = gpspi_enable(hw_port, enable); + if ((hw_port & 0xF0) == GPSPI_CLASS) + rc = gpspi_enable(hw_port, enable); #endif - } - return rc; } diff --git a/chip/mchp/system.c b/chip/mchp/system.c index 1d152f0b79..212c8b636f 100644 --- a/chip/mchp/system.c +++ b/chip/mchp/system.c @@ -199,7 +199,7 @@ void system_pre_init(void) MCHP_INT_BLK_DIS = 0xfffffffful; MCHP_INT_BLK_EN = (0x1Ful << 8) + (0x07ul << 24); - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); } uint32_t chip_read_reset_flags(void) diff --git a/chip/mec1322/lfw/ec_lfw.c b/chip/mec1322/lfw/ec_lfw.c index ccee9f8967..1fb334e144 100644 --- a/chip/mec1322/lfw/ec_lfw.c +++ b/chip/mec1322/lfw/ec_lfw.c @@ -252,7 +252,7 @@ void lfw_main() dma_init(); uart_init(); system_init(); - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); uart_puts("littlefw "); uart_puts(current_image_data.version); diff --git a/chip/mec1322/spi.c b/chip/mec1322/spi.c index ba58bfb0bd..0c4174cecd 100644 --- a/chip/mec1322/spi.c +++ b/chip/mec1322/spi.c @@ -148,8 +148,10 @@ int spi_transaction(const struct spi_device_t *spi_device, return ret; } -int spi_enable(int port, int enable) +int spi_enable(const struct spi_device_t *spi_device, int enable) { + int port = spi_device->port; + if (enable) { gpio_config_module(MODULE_SPI, 1); diff --git a/chip/mec1322/system.c b/chip/mec1322/system.c index a3043ba46b..bfa4a3c031 100644 --- a/chip/mec1322/system.c +++ b/chip/mec1322/system.c @@ -92,7 +92,7 @@ void system_pre_init(void) /* Deassert nSIO_RESET */ MEC1322_PCR_PWR_RST_CTL &= ~BIT(0); - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); } void chip_save_reset_flags(uint32_t flags) diff --git a/chip/npcx/spi.c b/chip/npcx/spi.c index 6ac8fe1b9e..9f6195ad36 100644 --- a/chip/npcx/spi.c +++ b/chip/npcx/spi.c @@ -68,13 +68,12 @@ DECLARE_HOOK(HOOK_FREQ_CHANGE, spi_freq_changed, HOOK_PRIO_FIRST); /** * Set SPI enabled. * - * @spi_port port to act on. Only one port supported, one gpio. + * @spi_device SPI device to act on. * @param enable enabled flag * @return success */ -int spi_enable(int port, int enable) +int spi_enable(const struct spi_device_t *spi_device, int enable) { - int i; enum gpio_signal gpio; if (enable) { @@ -83,28 +82,21 @@ int spi_enable(int port, int enable) /* GPIO No SPI Select */ CLEAR_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_GPIO_NO_SPIP); - for (i = 0; i < spi_devices_used; i++) { - if (spi_devices[i].port != port) - continue; - gpio = spi_devices[i].gpio_cs; - /* Make sure CS# is a GPIO output mode. */ - gpio_set_flags(gpio, GPIO_OUTPUT); - /* Make sure CS# is deselected */ - gpio_set_level(gpio, 1); - } + gpio = spi_device->gpio_cs; + /* Make sure CS# is in GPIO output mode. */ + gpio_set_flags(gpio, GPIO_OUTPUT); + /* Make sure CS# is deselected */ + gpio_set_level(gpio, 1); + /* Enabling spi module */ SET_BIT(NPCX_SPI_CTL1, NPCX_SPI_CTL1_SPIEN); } else { /* Disabling spi module */ CLEAR_BIT(NPCX_SPI_CTL1, NPCX_SPI_CTL1_SPIEN); - for (i = 0; i < spi_devices_used; i++) { - if (spi_devices[i].port != port) - continue; - gpio = spi_devices[i].gpio_cs; - /* Make sure CS# is deselected */ - gpio_set_level(gpio, 1); - gpio_set_flags(gpio, GPIO_ODR_HIGH); - } + gpio = spi_device->gpio_cs; + /* Make sure CS# is deselected */ + gpio_set_level(gpio, 1); + gpio_set_flags(gpio, GPIO_ODR_HIGH); /* Disabling spi module for gpio configuration */ gpio_config_module(MODULE_SPI, 0); /* GPIO No SPI Select */ @@ -196,7 +188,7 @@ static void spi_init(void) /* Disabling spi module */ for (i = 0; i < spi_devices_used; i++) - spi_enable(spi_devices[i].port, 0); + spi_enable(&spi_devices[i], 0); /* Disabling spi irq */ CLEAR_BIT(NPCX_SPI_CTL1, NPCX_SPI_CTL1_EIR); @@ -249,7 +241,7 @@ static int command_spirom(int argc, char **argv) uint8_t txsr1[] = {0x05}; uint8_t txsr2[] = {0x35}; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); printrx("Man/Dev ID", txmandev, sizeof(txmandev), 2); printrx("JEDEC ID", txjedec, sizeof(txjedec), 3); @@ -257,7 +249,7 @@ static int command_spirom(int argc, char **argv) printrx("Status reg 1", txsr1, sizeof(txsr1), 1); printrx("Status reg 2", txsr2, sizeof(txsr2), 1); - spi_enable(CONFIG_SPI_FLASH_PORT, 0); + spi_enable(SPI_FLASH_DEVICE, 0); return EC_SUCCESS; } diff --git a/chip/stm32/spi_master-stm32h7.c b/chip/stm32/spi_master-stm32h7.c index 6f661b72bf..a031ff76c6 100644 --- a/chip/stm32/spi_master-stm32h7.c +++ b/chip/stm32/spi_master-stm32h7.c @@ -94,48 +94,36 @@ static uint8_t spi_enabled[ARRAY_SIZE(SPI_REGS)]; /** * Initialize SPI module, registers, and clocks - * - * - port: which port to initialize. + * @param spi_device device to initialize. */ -static void spi_master_config(int port) +static void spi_master_config(const struct spi_device_t *spi_device) { - int i, div = 0; + int port = spi_device->port; stm32_spi_regs_t *spi = SPI_REGS[port]; /* * Set SPI master, baud rate, and software slave control. */ - for (i = 0; i < spi_devices_used; i++) - if ((spi_devices[i].port == port) && - (div < spi_devices[i].div)) - div = spi_devices[i].div; - spi->cr1 = STM32_SPI_CR1_SSI; - spi->cfg2 = STM32_SPI_CFG2_MSTR | STM32_SPI_CFG2_SSM - | STM32_SPI_CFG2_AFCNTR; - spi->cfg1 = STM32_SPI_CFG1_DATASIZE(8) | STM32_SPI_CFG1_FTHLV(4) - | STM32_SPI_CFG1_CRCSIZE(8) | STM32_SPI_CR1_DIV(div); + spi->cfg2 = STM32_SPI_CFG2_MSTR | STM32_SPI_CFG2_SSM | + STM32_SPI_CFG2_AFCNTR; + spi->cfg1 = STM32_SPI_CFG1_DATASIZE(8) | STM32_SPI_CFG1_FTHLV(4) | + STM32_SPI_CFG1_CRCSIZE(8) | + STM32_SPI_CR1_DIV(spi_device->div); dma_select_channel(dma_tx_option[port].channel, dma_req_tx[port]); dma_select_channel(dma_rx_option[port].channel, dma_req_rx[port]); } -static int spi_master_initialize(int port) +static int spi_master_initialize(const struct spi_device_t *spi_device) { - int i; + spi_master_config(spi_device); - spi_master_config(port); - - for (i = 0; i < spi_devices_used; i++) { - if (spi_devices[i].port != port) - continue; - /* Drive SS high */ - gpio_set_level(spi_devices[i].gpio_cs, 1); - } + gpio_set_level(spi_device->gpio_cs, 1); /* Set flag */ - spi_enabled[port] = 1; + spi_enabled[spi_device->port] = 1; return EC_SUCCESS; } @@ -143,9 +131,10 @@ static int spi_master_initialize(int port) /** * Shutdown SPI module */ -static int spi_master_shutdown(int port) +static int spi_master_shutdown(const struct spi_device_t *spi_device) { int rv = EC_SUCCESS; + int port = spi_device->port; stm32_spi_regs_t *spi = SPI_REGS[port]; /* Set flag */ @@ -164,20 +153,22 @@ static int spi_master_shutdown(int port) return rv; } -int spi_enable(int port, int enable) +int spi_enable(const struct spi_device_t *spi_device, int enable) { + int port = spi_device->port; if (enable == spi_enabled[port]) return EC_SUCCESS; if (enable) - return spi_master_initialize(port); + return spi_master_initialize(spi_device); else - return spi_master_shutdown(port); + return spi_master_shutdown(spi_device); } -static int spi_dma_start(int port, const uint8_t *txdata, - uint8_t *rxdata, int len) +static int spi_dma_start(const struct spi_device_t *spi_device, + const uint8_t *txdata, uint8_t *rxdata, int len) { dma_chan_t *txdma; + int port = spi_device->port; stm32_spi_regs_t *spi = SPI_REGS[port]; /* @@ -189,7 +180,7 @@ static int spi_dma_start(int port, const uint8_t *txdata, dma_clear_isr(dma_tx_option[port].channel); dma_clear_isr(dma_rx_option[port].channel); /* restore proper SPI configuration registers. */ - spi_master_config(port); + spi_master_config(spi_device); spi->cr2 = len; spi->cfg1 |= STM32_SPI_CFG1_RXDMAEN; @@ -284,7 +275,7 @@ int spi_transaction_async(const struct spi_device_t *spi_device, /* Drive SS low */ gpio_set_level(spi_device->gpio_cs, 0); - rv = spi_dma_start(port, txdata, buf, txlen); + rv = spi_dma_start(spi_device, txdata, buf, txlen); if (rv != EC_SUCCESS) goto err_free; @@ -296,7 +287,7 @@ int spi_transaction_async(const struct spi_device_t *spi_device, if (rv != EC_SUCCESS) goto err_free; - rv = spi_dma_start(port, buf, rxdata, rxlen); + rv = spi_dma_start(spi_device, buf, rxdata, rxlen); if (rv != EC_SUCCESS) goto err_free; } diff --git a/chip/stm32/spi_master.c b/chip/stm32/spi_master.c index c2d36bb4d9..86185680cf 100644 --- a/chip/stm32/spi_master.c +++ b/chip/stm32/spi_master.c @@ -148,19 +148,15 @@ static int spi_clear_tx_fifo(stm32_spi_regs_t *spi) * * - port: which port to initialize. */ -static int spi_master_initialize(int port) +static int spi_master_initialize(const struct spi_device_t *spi_device) { - int i, div = 0; + int port = spi_device->port; stm32_spi_regs_t *spi = SPI_REGS[port]; /* * Set SPI master, baud rate, and software slave control. * */ - for (i = 0; i < spi_devices_used; i++) - if ((spi_devices[i].port == port) && - (div < spi_devices[i].div)) - div = spi_devices[i].div; /* * STM32F412 @@ -204,7 +200,7 @@ static int spi_master_initialize(int port) * level. */ spi->cr1 = STM32_SPI_CR1_MSTR | STM32_SPI_CR1_SSM | STM32_SPI_CR1_SSI | - (div << 3); + (spi_device->div << 3); #ifdef CHIP_FAMILY_STM32L4 dma_select_channel(dma_tx_option[port].channel, dma_req[port]); @@ -228,12 +224,8 @@ static int spi_master_initialize(int port) spi->cr1 |= STM32_SPI_CR1_BIDIMODE | STM32_SPI_CR1_BIDIOE; #endif - /* Drive Chip Select high for all ports before turning on SPI module */ - for (i = 0; i < spi_devices_used; i++) { - if (spi_devices[i].port != port) - continue; - gpio_set_level(spi_devices[i].gpio_cs, 1); - } + /* Drive Chip Select high before turning on SPI module */ + gpio_set_level(spi_device->gpio_cs, 1); /* Enable SPI hardware module. This will actively drive the CLK pin */ spi->cr1 |= STM32_SPI_CR1_SPE; @@ -247,10 +239,10 @@ static int spi_master_initialize(int port) /** * Shutdown SPI module */ -static int spi_master_shutdown(int port) +static int spi_master_shutdown(const struct spi_device_t *spi_device) { int rv = EC_SUCCESS; - + int port = spi_device->port; stm32_spi_regs_t *spi = SPI_REGS[port]; /* Set flag */ @@ -271,14 +263,14 @@ static int spi_master_shutdown(int port) return rv; } -int spi_enable(int port, int enable) +int spi_enable(const struct spi_device_t *spi_device, int enable) { - if (enable == spi_enabled[port]) + if (enable == spi_enabled[spi_device->port]) return EC_SUCCESS; if (enable) - return spi_master_initialize(port); + return spi_master_initialize(spi_device); else - return spi_master_shutdown(port); + return spi_master_shutdown(spi_device); } static int spi_dma_start(int port, const uint8_t *txdata, diff --git a/common/spi_flash.c b/common/spi_flash.c index c4346ef48b..3487c9a581 100644 --- a/common/spi_flash.c +++ b/common/spi_flash.c @@ -485,7 +485,8 @@ static int command_spi_flashinfo(int argc, char **argv) uint8_t unique[8]; int rv; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + /* TODO(tomhughes): use board function to get devices. */ + spi_enable(SPI_FLASH_DEVICE, 1); /* Wait for previous operation to complete */ rv = spi_flash_wait(); @@ -537,7 +538,7 @@ static int command_spi_flasherase(int argc, char **argv) if (rv) return rv; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); /* Chip has protection */ if (spi_flash_check_protect(offset, bytes)) @@ -562,7 +563,7 @@ static int command_spi_flashwrite(int argc, char **argv) if (rv) return rv; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); /* Chip has protection */ if (spi_flash_check_protect(offset, bytes)) @@ -607,7 +608,7 @@ static int command_spi_flashread(int argc, char **argv) if (rv) return rv; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); /* Can't read past size of memory */ if (offset + bytes > CONFIG_FLASH_SIZE_BYTES) @@ -655,7 +656,7 @@ DECLARE_CONSOLE_COMMAND(spi_flashread, command_spi_flashread, static int command_spi_flashread_sr(int argc, char **argv) { - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); ccprintf("Status Register 1: 0x%02x\n", spi_flash_get_status1()); ccprintf("Status Register 2: 0x%02x\n", spi_flash_get_status2()); @@ -675,7 +676,7 @@ static int command_spi_flashwrite_sr(int argc, char **argv) if (rv) return rv; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); ccprintf("Writing 0x%02x to status register 1, ", val1); ccprintf("0x%02x to status register 2...\n", val2); @@ -694,7 +695,7 @@ static int command_spi_flashprotect(int argc, char **argv) if (rv) return rv; - spi_enable(CONFIG_SPI_FLASH_PORT, 1); + spi_enable(SPI_FLASH_DEVICE, 1); ccprintf("Setting protection for 0x%06x to 0x%06x\n", val1, val1+val2); return spi_flash_set_protect(val1, val2); diff --git a/include/spi.h b/include/spi.h index 79ed7474fa..ae97174ec5 100644 --- a/include/spi.h +++ b/include/spi.h @@ -61,10 +61,10 @@ extern const unsigned int spi_devices_used; * Enable / disable the SPI port. When the port is disabled, all its I/O lines * are high-Z so the EC won't interfere with other devices on the SPI bus. * - * @param port port id to work on. - * @param enable 1 to enable the port, 0 to disable it. + * @param spi_device device + * @param enable 1 to enable the SPI device's port, 0 to disable it. */ -int spi_enable(int port, int enable); +int spi_enable(const struct spi_device_t *spi_device, int enable); #define SPI_READBACK_ALL (-1) |