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-rw-r--r--chip/it83xx/clock.c4
-rw-r--r--core/nds32/switch.S3
-rw-r--r--core/riscv-rv32i/switch.S3
3 files changed, 6 insertions, 4 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c
index d38197379a..3927091eff 100644
--- a/chip/it83xx/clock.c
+++ b/chip/it83xx/clock.c
@@ -449,7 +449,7 @@ int clock_ec_wake_from_sleep(void)
return ec_sleep;
}
-void clock_cpu_standby(void)
+void __ram_code clock_cpu_standby(void)
{
/* standby instruction */
if (IS_ENABLED(CHIP_CORE_NDS32)) {
@@ -598,7 +598,7 @@ defined(CONFIG_HOSTCMD_ESPI)
/**
* Low power idle task. Executed when no tasks are ready to be scheduled.
*/
-void __idle(void)
+void __ram_code __idle(void)
{
console_expire_time.val = get_time().val + CONSOLE_IN_USE_ON_BOOT_TIME;
/* init hw timer and clock source is 32.768 KHz */
diff --git a/core/nds32/switch.S b/core/nds32/switch.S
index b891aeb2a5..631b0e0fe2 100644
--- a/core/nds32/switch.S
+++ b/core/nds32/switch.S
@@ -8,7 +8,7 @@
#include "config.h"
#include "cpu.h"
-.text
+.section .ram_code
/**
* Task context switching
@@ -73,6 +73,7 @@ __switch_task:
/* restore PC and PSW */
iret
+.text
/**
* Start the task scheduling.
*
diff --git a/core/riscv-rv32i/switch.S b/core/riscv-rv32i/switch.S
index d6c00b8591..b7750975fd 100644
--- a/core/riscv-rv32i/switch.S
+++ b/core/riscv-rv32i/switch.S
@@ -8,7 +8,7 @@
#include "config.h"
#include "cpu.h"
-.text
+.section .ram_code
/**
* Task context switching
@@ -142,6 +142,7 @@ __switch_task:
add sp, t3, zero
j __irq_exit
+.text
/**
* Start the task scheduling.
*/