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-rw-r--r--board/puff/board.c136
-rw-r--r--board/puff/board.h148
-rw-r--r--board/puff/build.mk15
-rw-r--r--board/puff/ec.tasklist18
-rw-r--r--board/puff/gpio.inc34
-rw-r--r--board/puff/led.c232
-rw-r--r--board/puff/usb_pd_policy.c374
7 files changed, 957 insertions, 0 deletions
diff --git a/board/puff/board.c b/board/puff/board.c
new file mode 100644
index 0000000000..5f7cc0de13
--- /dev/null
+++ b/board/puff/board.c
@@ -0,0 +1,136 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Puff board-specific configuration */
+
+#include "adc.h"
+#include "adc_chip.h"
+#include "button.h"
+#include "common.h"
+#include "cros_board_info.h"
+#include "driver/tcpm/anx7447.h"
+#include "driver/tcpm/ps8xxx.h"
+#include "driver/tcpm/tcpci.h"
+#include "ec_commands.h"
+#include "extpower.h"
+#include "fan.h"
+#include "fan_chip.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "host_command.h"
+#include "lid_switch.h"
+#include "power.h"
+#include "power_button.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "spi.h"
+#include "switch.h"
+#include "system.h"
+#include "task.h"
+#include "temp_sensor.h"
+#include "thermal.h"
+#include "thermistor.h"
+#include "uart.h"
+#include "usb_charge.h"
+#include "usb_pd.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+#include "gpio_list.h" /* Must come after other header files. */
+
+/******************************************************************************/
+/* SPI devices */
+const struct spi_device_t spi_devices[] = {
+};
+const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
+
+/******************************************************************************/
+/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
+const struct pwm_t pwm_channels[] = {
+};
+
+/******************************************************************************/
+/* USB-C TPCP Configuration */
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
+};
+struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
+};
+
+/******************************************************************************/
+/* I2C port map configuration */
+const struct i2c_port_t i2c_ports[] = {
+};
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+
+const struct temp_sensor_t temp_sensors[] = {
+};
+
+const struct adc_t adc_channels[] = {
+};
+
+/******************************************************************************/
+/* Wake up pins */
+const enum gpio_signal hibernate_wake_pins[] = {
+};
+const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
+
+/******************************************************************************/
+/* Physical fans. These are logically separate from pwm_channels. */
+
+static void board_init(void)
+{
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+/******************************************************************************/
+/* USB-C PPC Configuration */
+struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_COUNT] = {
+};
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+/* Power Delivery and charging functions */
+void baseboard_tcpc_init(void)
+{
+ /* Only reset TCPC if not sysjump */
+ if (!system_jumped_to_this_image())
+ board_reset_pd_mcu();
+
+}
+DECLARE_HOOK(HOOK_INIT, baseboard_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
+
+int64_t get_time_dsw_pwrok(void)
+{
+ /* DSW_PWROK is turned on before EC was powered. */
+ return -20 * MSEC;
+}
+
+uint16_t tcpc_get_alert_status(void)
+{
+ uint16_t status = 0;
+
+ return status;
+}
+
+void board_reset_pd_mcu(void)
+{
+}
+
+int board_set_active_charge_port(int port)
+{
+ return EC_SUCCESS;
+}
+
+int ppc_get_alert_status(int port)
+{
+ return 0;
+}
+
+void board_set_charge_limit(int port, int supplier, int charge_ma,
+ int max_ma, int charge_mv)
+{
+}
diff --git a/board/puff/board.h b/board/puff/board.h
new file mode 100644
index 0000000000..ea48622d7e
--- /dev/null
+++ b/board/puff/board.h
@@ -0,0 +1,148 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Puff board configuration */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+#define CONFIG_POWER_BUTTON
+#define CONFIG_LED_COMMON
+
+#undef CONFIG_UART_TX_BUF_SIZE
+#define CONFIG_UART_TX_BUF_SIZE 4096
+
+
+/* NPCX7 config */
+#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
+#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */
+
+/* Internal SPI flash on NPCX796FC is 512 kB */
+#define CONFIG_FLASH_SIZE (512 * 1024)
+#define CONFIG_SPI_FLASH_REGS
+#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */
+#define CONFIG_I2C
+#define CONFIG_HOSTCMD_ESPI
+
+/* EC Defines */
+#define CONFIG_ADC
+#define CONFIG_BOARD_VERSION_CBI
+#define CONFIG_CRC8
+#define CONFIG_CROS_BOARD_INFO
+#define CONFIG_DPTF
+#define CONFIG_HIBERNATE_PSL
+#undef CONFIG_LID_SWITCH
+#define CONFIG_POWER_BUTTON_IGNORE_LID
+#define CONFIG_LTO
+#define CONFIG_PWM
+#define CONFIG_VBOOT_HASH
+#define CONFIG_VSTORE
+#define CONFIG_VSTORE_SLOT_COUNT 1
+
+/* Chipset config */
+#define CONFIG_CHIPSET_COMETLAKE
+#define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK
+#define CONFIG_CHIPSET_RESET_HOOK
+#define CONFIG_CPU_PROCHOT_ACTIVE_LOW
+
+/* Charger */
+#define CONFIG_CHARGE_MANAGER
+
+#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 50000
+
+#define CONFIG_CMD_PD_CONTROL
+#define CONFIG_EXTPOWER_GPIO
+#undef CONFIG_EXTPOWER_DEBOUNCE_MS
+#define CONFIG_EXTPOWER_DEBOUNCE_MS 1000
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_BUTTON_X86
+#define CONFIG_POWER_BUTTON_INIT_IDLE
+#define CONFIG_POWER_COMMON
+#define CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD 30
+#define CONFIG_DELAY_DSW_PWROK_TO_PWRBTN
+#define CONFIG_POWER_COMMON
+#define CONFIG_POWER_PP5000_CONTROL
+#define CONFIG_POWER_S0IX
+#define CONFIG_POWER_S0IX_FAILURE_DETECTION
+#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE
+
+/* TODO: (b/143501304) Use correct PD delay values */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
+#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
+#define PD_VCONN_SWAP_DELAY 5000 /* us */
+
+/* TODO: (b/143501304) Use correct PD power values */
+#define PD_OPERATING_POWER_MW 15000
+#define PD_MAX_POWER_MW 60000
+#define PD_MAX_CURRENT_MA 3000
+#define PD_MAX_VOLTAGE_MV 20000
+
+/* USB */
+#undef CONFIG_USB_CHARGER
+#define CONFIG_USB_PD_ALT_MODE
+#define CONFIG_USB_PD_ALT_MODE_DFP
+#define CONFIG_USB_PD_DISCHARGE_TCPC
+#define CONFIG_USB_PD_DUAL_ROLE
+#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
+#define CONFIG_USB_PD_LOGGING
+#define CONFIG_USB_PD_PORT_COUNT 1
+#define CONFIG_USB_PD_VBUS_DETECT_GPIO
+#define CONFIG_USB_PD_VBUS_DETECT_PPC
+#define CONFIG_USB_PD_TCPC_LOW_POWER
+#define CONFIG_USB_PD_TCPM_MUX
+#define CONFIG_USB_PD_TCPM_TCPCI
+#define CONFIG_USB_PD_TCPM_PS8751
+#define CONFIG_USB_PD_TRY_SRC
+#define CONFIG_USB_POWER_DELIVERY
+#define CONFIG_USBC_SS_MUX
+#define CONFIG_USBC_SS_MUX_DFP_ONLY
+#define CONFIG_USBC_VCONN
+#define CONFIG_USBC_VCONN_SWAP
+
+/* I2C Bus Configuration */
+#define CONFIG_I2C
+#define CONFIG_I2C_MASTER
+#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0
+#define I2C_PORT_PPC0 NPCX_I2C_PORT1_0
+#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0
+#define I2C_PORT_TCPC0 NPCX_I2C_PORT3_0
+#define I2C_PORT_THERMAL NPCX_I2C_PORT4_1
+#define I2C_PORT_POWER NPCX_I2C_PORT5_0
+#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0
+#define I2C_ADDR_EEPROM_FLAGS 0x50
+
+#define PP5000_PGOOD_POWER_SIGNAL_MASK POWER_SIGNAL_MASK(PP5000_A_PGOOD)
+
+#ifndef __ASSEMBLER__
+
+#include "gpio_signal.h"
+#include "registers.h"
+
+enum adc_channel {
+ ADC_VBUS,
+ ADC_CH_COUNT
+};
+
+enum pwm_channel {
+ PWM_CH_LED_RED,
+ PWM_CH_LED_GREEN,
+ /* Number of PWM channels */
+ PWM_CH_COUNT
+};
+
+enum temp_sensor_id { /* TODO: fix this */
+ TEMP_SENSOR_1,
+ TEMP_SENSOR_COUNT
+};
+
+/* Board specific handlers */
+void board_reset_pd_mcu(void);
+void board_set_tcpc_power_mode(int port, int mode);
+void led_alert(int enable);
+void led_critical(void);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __CROS_EC_BOARD_H */
diff --git a/board/puff/build.mk b/board/puff/build.mk
new file mode 100644
index 0000000000..e9968d5710
--- /dev/null
+++ b/board/puff/build.mk
@@ -0,0 +1,15 @@
+# -*- makefile -*-
+# Copyright 2019 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+#
+
+CHIP:=npcx
+CHIP_FAMILY:=npcx7
+CHIP_VARIANT:=npcx7m6fc
+
+board-y=board.o
+board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
+board-y+=led.o
diff --git a/board/puff/ec.tasklist b/board/puff/ec.tasklist
new file mode 100644
index 0000000000..7900f142c3
--- /dev/null
+++ b/board/puff/ec.tasklist
@@ -0,0 +1,18 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * See CONFIG_TASK_LIST in config.h for details.
+ */
+
+#define CONFIG_TASK_LIST \
+ TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
+ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
+ TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \
+ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \
+ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \
+ TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
+ TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \
+ TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE)
diff --git a/board/puff/gpio.inc b/board/puff/gpio.inc
new file mode 100644
index 0000000000..c1289777d1
--- /dev/null
+++ b/board/puff/gpio.inc
@@ -0,0 +1,34 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Declare symbolic names for all the GPIOs that we care about.
+ * Note: Those with interrupt handlers must be declared first. */
+
+/* TODO: pmarheine - use the real values. */
+
+/* Wake Source interrupts */
+GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */
+GPIO_INT(AC_PRESENT, PIN(C, 2), GPIO_INT_BOTH, extpower_interrupt)
+GPIO_INT(POWER_BUTTON_L, PIN(0, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) /* MECH_PWR_BTN_ODL */
+
+GPIO_INT(RSMRST_L_PGOOD, PIN(E, 2), GPIO_INT_BOTH, intel_x86_rsmrst_signal_interrupt)
+GPIO_INT(PCH_SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PCH_SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PCH_SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PP5000_A_PG_OD, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt)
+
+GPIO(SYS_RESET_L, PIN(0, 2), GPIO_ODR_HIGH) /* SYS_RST_ODL */
+GPIO(PCH_WAKE_L, PIN(7, 4), GPIO_ODR_HIGH) /* EC_PCH_WAKE_ODL */
+GPIO(PCH_PWRBTN_L, PIN(C, 1), GPIO_ODR_HIGH) /* EC_PCH_PWR_BTN_ODL */
+GPIO(PCH_RSMRST_L, PIN(A, 6), GPIO_OUT_LOW)
+GPIO(ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) /* EC_ENTERING_RW */
+GPIO(CPU_PROCHOT, PIN(6, 3), GPIO_ODR_HIGH)
+GPIO(EN_PP5000, PIN(6, 4), GPIO_ODR_HIGH)
+GPIO(EN_PP5000_A, PIN(6, 5), GPIO_ODR_HIGH)
+GPIO(PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW)
+GPIO(EN_A_RAILS, PIN(A, 3), GPIO_OUT_LOW)
diff --git a/board/puff/led.c b/board/puff/led.c
new file mode 100644
index 0000000000..648a9ac0b2
--- /dev/null
+++ b/board/puff/led.c
@@ -0,0 +1,232 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Power and battery LED control for Puff
+ */
+
+#include "chipset.h"
+#include "console.h"
+#include "ec_commands.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "led_common.h"
+#include "pwm.h"
+#include "timer.h"
+#include "util.h"
+
+const enum ec_led_id supported_led_ids[] = {EC_LED_ID_POWER_LED};
+const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
+
+enum led_color {
+ LED_OFF = 0,
+ LED_RED,
+ LED_GREEN,
+ LED_AMBER,
+
+ /* Number of colors, not a color itself */
+ LED_COLOR_COUNT
+};
+
+static int set_color_power(enum led_color color, int duty)
+{
+ int green = 0;
+ int red = 0;
+
+ if (duty < 0 || 100 < duty)
+ return EC_ERROR_UNKNOWN;
+
+ switch (color) {
+ case LED_OFF:
+ break;
+ case LED_GREEN:
+ green = 1;
+ break;
+ case LED_RED:
+ red = 1;
+ break;
+ case LED_AMBER:
+ green = 1;
+ red = 1;
+ break;
+ default:
+ return EC_ERROR_UNKNOWN;
+ }
+
+ if (red)
+ pwm_set_duty(PWM_CH_LED_RED, duty);
+ else
+ pwm_set_duty(PWM_CH_LED_RED, 0);
+
+ if (green)
+ pwm_set_duty(PWM_CH_LED_GREEN, duty);
+ else
+ pwm_set_duty(PWM_CH_LED_GREEN, 0);
+
+ return EC_SUCCESS;
+}
+
+static int set_color(enum ec_led_id id, enum led_color color, int duty)
+{
+ switch (id) {
+ case EC_LED_ID_POWER_LED:
+ return set_color_power(color, duty);
+ default:
+ return EC_ERROR_UNKNOWN;
+ }
+}
+
+#define LED_PULSE_US (2 * SECOND)
+/* 40 msec for nice and smooth transition. */
+#define LED_PULSE_TICK_US (40 * MSEC)
+
+/* When pulsing is enabled, brightness is incremented by <duty_inc> every
+ * <interval> usec from 0 to 100% in LED_PULSE_US usec. Then it's decremented
+ * likewise in LED_PULSE_US usec. */
+static struct {
+ uint32_t interval;
+ int duty_inc;
+ enum led_color color;
+ int duty;
+} led_pulse;
+
+#define CONFIG_TICK(interval, color) \
+ config_tick((interval), 100 / (LED_PULSE_US / (interval)), (color))
+
+static void config_tick(uint32_t interval, int duty_inc, enum led_color color)
+{
+ led_pulse.interval = interval;
+ led_pulse.duty_inc = duty_inc;
+ led_pulse.color = color;
+ led_pulse.duty = 0;
+}
+
+static void pulse_power_led(enum led_color color)
+{
+ set_color(EC_LED_ID_POWER_LED, color, led_pulse.duty);
+ if (led_pulse.duty + led_pulse.duty_inc > 100)
+ led_pulse.duty_inc = led_pulse.duty_inc * -1;
+ else if (led_pulse.duty + led_pulse.duty_inc < 0)
+ led_pulse.duty_inc = led_pulse.duty_inc * -1;
+ led_pulse.duty += led_pulse.duty_inc;
+}
+
+static void led_tick(void);
+DECLARE_DEFERRED(led_tick);
+static void led_tick(void)
+{
+ uint32_t elapsed;
+ uint32_t next = 0;
+ uint32_t start = get_time().le.lo;
+ static uint8_t pwm_enabled = 0;
+
+ if (!pwm_enabled) {
+ pwm_enable(PWM_CH_LED_RED, 1);
+ pwm_enable(PWM_CH_LED_GREEN, 1);
+ pwm_enabled = 1;
+ }
+ if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
+ pulse_power_led(led_pulse.color);
+ elapsed = get_time().le.lo - start;
+ next = led_pulse.interval > elapsed ? led_pulse.interval - elapsed : 0;
+ hook_call_deferred(&led_tick_data, next);
+}
+
+static void led_suspend(void)
+{
+ CONFIG_TICK(LED_PULSE_TICK_US, LED_GREEN);
+ led_tick();
+}
+DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, led_suspend, HOOK_PRIO_DEFAULT);
+
+static void led_shutdown(void)
+{
+ hook_call_deferred(&led_tick_data, -1);
+ if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
+ set_color(EC_LED_ID_POWER_LED, LED_OFF, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, led_shutdown, HOOK_PRIO_DEFAULT);
+
+static void led_resume(void)
+{
+ /* Assume there is no race condition with led_tick, which also
+ * runs in hook_task. */
+ hook_call_deferred(&led_tick_data, -1);
+ if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
+ set_color(EC_LED_ID_POWER_LED, LED_GREEN, 100);
+}
+DECLARE_HOOK(HOOK_CHIPSET_RESUME, led_resume, HOOK_PRIO_DEFAULT);
+
+void led_alert(int enable)
+{
+ if (enable) {
+ /* Overwrite the current signal */
+ config_tick(1 * SECOND, 100, LED_RED);
+ led_tick();
+ } else {
+ /* Restore the previous signal */
+ if (chipset_in_state(CHIPSET_STATE_ON))
+ led_resume();
+ else if (chipset_in_state(CHIPSET_STATE_SUSPEND))
+ led_suspend();
+ else if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
+ led_shutdown();
+ }
+}
+
+void led_critical(void)
+{
+ hook_call_deferred(&led_tick_data, -1);
+ if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
+ set_color(EC_LED_ID_POWER_LED, LED_RED, 100);
+}
+
+static int command_led(int argc, char **argv)
+{
+ enum ec_led_id id = EC_LED_ID_POWER_LED;
+
+ if (argc < 2)
+ return EC_ERROR_PARAM_COUNT;
+
+ if (!strcasecmp(argv[1], "debug")) {
+ led_auto_control(id, !led_auto_control_is_enabled(id));
+ ccprintf("o%s\n", led_auto_control_is_enabled(id) ? "ff" : "n");
+ } else if (!strcasecmp(argv[1], "off")) {
+ set_color(id, LED_OFF, 0);
+ } else if (!strcasecmp(argv[1], "red")) {
+ set_color(id, LED_RED, 100);
+ } else if (!strcasecmp(argv[1], "green")) {
+ set_color(id, LED_GREEN, 100);
+ } else if (!strcasecmp(argv[1], "amber")) {
+ set_color(id, LED_AMBER, 100);
+ } else if (!strcasecmp(argv[1], "alert")) {
+ led_alert(1);
+ } else if (!strcasecmp(argv[1], "crit")) {
+ led_critical();
+ } else {
+ return EC_ERROR_PARAM1;
+ }
+ return EC_SUCCESS;
+}
+DECLARE_CONSOLE_COMMAND(led, command_led,
+ "[debug|red|green|amber|off|alert|crit]",
+ "Turn on/off LED.");
+
+void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
+{
+ brightness_range[EC_LED_COLOR_RED] = 100;
+ brightness_range[EC_LED_COLOR_GREEN] = 100;
+ brightness_range[EC_LED_COLOR_AMBER] = 100;
+}
+
+int led_set_brightness(enum ec_led_id id, const uint8_t *brightness)
+{
+ if (brightness[EC_LED_COLOR_RED])
+ return set_color(id, LED_RED, brightness[EC_LED_COLOR_RED]);
+ else if (brightness[EC_LED_COLOR_GREEN])
+ return set_color(id, LED_GREEN, brightness[EC_LED_COLOR_GREEN]);
+ else if (brightness[EC_LED_COLOR_AMBER])
+ return set_color(id, LED_AMBER, brightness[EC_LED_COLOR_AMBER]);
+ else
+ return set_color(id, LED_OFF, 0);
+}
diff --git a/board/puff/usb_pd_policy.c b/board/puff/usb_pd_policy.c
new file mode 100644
index 0000000000..8e6bca9b7b
--- /dev/null
+++ b/board/puff/usb_pd_policy.c
@@ -0,0 +1,374 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Shared USB-C policy for Puff boards */
+
+#include "charge_manager.h"
+#include "common.h"
+#include "compile_time_macros.h"
+#include "console.h"
+#include "ec_commands.h"
+#include "gpio.h"
+#include "system.h"
+#include "tcpci.h"
+#include "tcpm.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
+ PDO_FIXED_COMM_CAP)
+
+const uint32_t pd_src_pdo[] = {
+ PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
+const uint32_t pd_src_pdo_max[] = {
+ PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_max_cnt = ARRAY_SIZE(pd_src_pdo_max);
+
+const uint32_t pd_snk_pdo[] = {
+ PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
+ PDO_BATT(4750, 21000, 15000),
+ PDO_VAR(4750, 21000, 3000),
+};
+const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
+
+int pd_board_checks(void)
+{
+ return EC_SUCCESS;
+}
+
+int pd_check_data_swap(int port, int data_role)
+{
+ /* Allow data swap if we are a UFP, otherwise don't allow. */
+ return (data_role == PD_ROLE_UFP);
+}
+
+void pd_check_dr_role(int port, int dr_role, int flags)
+{
+ /* If UFP, try to switch to DFP */
+ if ((flags & PD_FLAGS_PARTNER_DR_DATA) &&
+ dr_role == PD_ROLE_UFP &&
+ system_get_image_copy() != SYSTEM_IMAGE_RO)
+ pd_request_data_swap(port);
+}
+
+int pd_check_power_swap(int port)
+{
+ /*
+ * Allow power swap as long as we are acting as a dual role device,
+ * otherwise assume our role is fixed (not in S0 or console command
+ * to fix our role).
+ */
+ return pd_get_dual_role(port) == PD_DRP_TOGGLE_ON ? 1 : 0;
+}
+
+void pd_check_pr_role(int port, int pr_role, int flags)
+{
+ /*
+ * If partner is dual-role power and dualrole toggling is on, consider
+ * if a power swap is necessary.
+ */
+ if ((flags & PD_FLAGS_PARTNER_DR_POWER) &&
+ pd_get_dual_role(port) == PD_DRP_TOGGLE_ON) {
+ /*
+ * If we are a sink and partner is not externally powered, then
+ * swap to become a source. If we are source and partner is
+ * externally powered, swap to become a sink.
+ */
+ int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER;
+
+ if ((!partner_extpower && pr_role == PD_ROLE_SINK) ||
+ (partner_extpower && pr_role == PD_ROLE_SOURCE))
+ pd_request_power_swap(port);
+ }
+}
+
+int pd_check_vconn_swap(int port)
+{
+ /* Only allow vconn swap if pp5000_A rail is enabled */
+ return gpio_get_level(GPIO_EN_PP5000_A);
+}
+
+void pd_execute_data_swap(int port, int data_role)
+{
+
+}
+
+int pd_is_valid_input_voltage(int mv)
+{
+ return 1;
+}
+
+void pd_power_supply_reset(int port)
+{
+}
+
+int pd_set_power_supply_ready(int port)
+{
+ return EC_SUCCESS;
+}
+
+void pd_transition_voltage(int idx)
+{
+ /* No-operation: we are always 5V */
+}
+
+#ifdef CONFIG_USB_PD_VBUS_DETECT_PPC
+int pd_snk_is_vbus_provided(int port)
+{
+ return 0;
+}
+#endif
+
+void typec_set_source_current_limit(int port, int rp)
+{
+ ppc_set_vbus_source_current_limit(port, rp);
+}
+
+int board_vbus_source_enabled(int port)
+{
+ return 0;
+}
+
+
+/* ----------------- Vendor Defined Messages ------------------ */
+const struct svdm_response svdm_rsp = {
+ .identity = NULL,
+ .svids = NULL,
+ .modes = NULL,
+};
+
+int pd_custom_vdm(int port, int cnt, uint32_t *payload,
+ uint32_t **rpayload)
+{
+ int cmd = PD_VDO_CMD(payload[0]);
+ uint16_t dev_id = 0;
+ int is_rw, is_latest;
+
+ /* make sure we have some payload */
+ if (cnt == 0)
+ return 0;
+
+ switch (cmd) {
+ case VDO_CMD_VERSION:
+ /* guarantee last byte of payload is null character */
+ *(payload + cnt - 1) = 0;
+ CPRINTF("version: %s\n", (char *)(payload+1));
+ break;
+ case VDO_CMD_READ_INFO:
+ case VDO_CMD_SEND_INFO:
+ /* copy hash */
+ if (cnt == 7) {
+ dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
+ is_rw = VDO_INFO_IS_RW(payload[6]);
+
+ is_latest = pd_dev_store_rw_hash(port,
+ dev_id,
+ payload + 1,
+ is_rw ?
+ SYSTEM_IMAGE_RW :
+ SYSTEM_IMAGE_RO);
+ /*
+ * Send update host event unless our RW hash is
+ * already known to be the latest update RW.
+ */
+ if (!is_rw || !is_latest)
+ pd_send_host_event(PD_EVENT_UPDATE_DEVICE);
+
+ CPRINTF("DevId:%d.%d SW:%d RW:%d\n",
+ HW_DEV_ID_MAJ(dev_id),
+ HW_DEV_ID_MIN(dev_id),
+ VDO_INFO_SW_DBG_VER(payload[6]),
+ is_rw);
+ } else if (cnt == 6) {
+ /* really old devices don't have last byte */
+ pd_dev_store_rw_hash(port, dev_id, payload + 1,
+ SYSTEM_IMAGE_UNKNOWN);
+ }
+ break;
+ case VDO_CMD_CURRENT:
+ CPRINTF("Current: %dmA\n", payload[1]);
+ break;
+ case VDO_CMD_FLIP:
+ usb_mux_flip(port);
+ break;
+#ifdef CONFIG_USB_PD_LOGGING
+ case VDO_CMD_GET_LOG:
+ pd_log_recv_vdm(port, cnt, payload);
+ break;
+#endif /* CONFIG_USB_PD_LOGGING */
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_USB_PD_ALT_MODE_DFP
+static int dp_flags[CONFIG_USB_PD_PORT_COUNT];
+static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT];
+
+static void svdm_safe_dp_mode(int port)
+{
+ /* make DP interface safe until configure */
+ dp_flags[port] = 0;
+ dp_status[port] = 0;
+ usb_mux_set(port, TYPEC_MUX_NONE,
+ USB_SWITCH_CONNECT, pd_get_polarity(port));
+}
+
+static int svdm_enter_dp_mode(int port, uint32_t mode_caps)
+{
+ /* Only enter mode if device is DFP_D capable */
+ if (mode_caps & MODE_DP_SNK) {
+ svdm_safe_dp_mode(port);
+ return 0;
+ }
+
+ return -1;
+}
+
+static int svdm_dp_status(int port, uint32_t *payload)
+{
+ int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+
+ payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+ CMD_DP_STATUS | VDO_OPOS(opos));
+ payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */
+ 0, /* HPD level ... not applicable */
+ 0, /* exit DP? ... no */
+ 0, /* usb mode? ... no */
+ 0, /* multi-function ... no */
+ (!!(dp_flags[port] & DP_FLAGS_DP_ON)),
+ 0, /* power low? ... no */
+ (!!(dp_flags[port] & DP_FLAGS_DP_ON)));
+ return 2;
+};
+
+static int svdm_dp_config(int port, uint32_t *payload)
+{
+ int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+ int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]);
+ int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]);
+
+ if (!pin_mode)
+ return 0;
+
+ usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP,
+ USB_SWITCH_CONNECT, pd_get_polarity(port));
+
+ payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+ CMD_DP_CONFIG | VDO_OPOS(opos));
+ payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */
+ 1, /* DPv1.3 signaling */
+ 2); /* UFP connected */
+ return 2;
+};
+
+
+static void svdm_dp_post_config(int port)
+{
+ const struct usb_mux *mux = &usb_muxes[port];
+
+ dp_flags[port] |= DP_FLAGS_DP_ON;
+ if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING))
+ return;
+ mux->hpd_update(port, 1, 0);
+#ifdef USB_PD_PORT_TCPC_MST
+ if (port == USB_PD_PORT_TCPC_MST)
+ baseboard_mst_enable_control(port, 1);
+#endif
+}
+
+static int svdm_dp_attention(int port, uint32_t *payload)
+{
+ int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
+ int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
+ const struct usb_mux *mux = &usb_muxes[port];
+
+ dp_status[port] = payload[1];
+ if (!(dp_flags[port] & DP_FLAGS_DP_ON)) {
+ if (lvl)
+ dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING;
+ return 1;
+ }
+ mux->hpd_update(port, lvl, irq);
+#ifdef USB_PD_PORT_TCPC_MST
+ if (port == USB_PD_PORT_TCPC_MST)
+ baseboard_mst_enable_control(port, lvl);
+#endif
+
+ /* ack */
+ return 1;
+}
+
+static void svdm_exit_dp_mode(int port)
+{
+ const struct usb_mux *mux = &usb_muxes[port];
+
+ svdm_safe_dp_mode(port);
+ mux->hpd_update(port, 0, 0);
+#ifdef USB_PD_PORT_TCPC_MST
+ if (port == USB_PD_PORT_TCPC_MST)
+ baseboard_mst_enable_control(port, 0);
+#endif
+}
+
+static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
+{
+ /* Always enter GFU mode */
+ return 0;
+}
+
+static void svdm_exit_gfu_mode(int port)
+{
+}
+
+static int svdm_gfu_status(int port, uint32_t *payload)
+{
+ /*
+ * This is called after enter mode is successful, send unstructured
+ * VDM to read info.
+ */
+ pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0);
+ return 0;
+}
+
+static int svdm_gfu_config(int port, uint32_t *payload)
+{
+ return 0;
+}
+
+static int svdm_gfu_attention(int port, uint32_t *payload)
+{
+ return 0;
+}
+
+const struct svdm_amode_fx supported_modes[] = {
+ {
+ .svid = USB_SID_DISPLAYPORT,
+ .enter = &svdm_enter_dp_mode,
+ .status = &svdm_dp_status,
+ .config = &svdm_dp_config,
+ .post_config = &svdm_dp_post_config,
+ .attention = &svdm_dp_attention,
+ .exit = &svdm_exit_dp_mode,
+ },
+ {
+ .svid = USB_VID_GOOGLE,
+ .enter = &svdm_enter_gfu_mode,
+ .status = &svdm_gfu_status,
+ .config = &svdm_gfu_config,
+ .attention = &svdm_gfu_attention,
+ .exit = &svdm_exit_gfu_mode,
+ }
+};
+const int supported_modes_cnt = ARRAY_SIZE(supported_modes);
+#endif /* CONFIG_USB_PD_ALT_MODE_DFP */