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-rw-r--r--baseboard/octopus/baseboard.c44
-rw-r--r--baseboard/octopus/baseboard.h5
-rw-r--r--board/bip/gpio.inc5
-rw-r--r--board/phaser/gpio.inc6
-rw-r--r--board/yorp/board.c28
-rw-r--r--board/yorp/gpio.inc7
6 files changed, 64 insertions, 31 deletions
diff --git a/baseboard/octopus/baseboard.c b/baseboard/octopus/baseboard.c
index 155d84df89..6bc0436473 100644
--- a/baseboard/octopus/baseboard.c
+++ b/baseboard/octopus/baseboard.c
@@ -117,6 +117,47 @@ void chipset_pre_init_callback(void)
gpio_set_level(GPIO_PMIC_EN, 1);
}
+/* Called on AP S5 -> S3 transition */
+static void baseboard_chipset_startup(void)
+{
+ /* Enable Trackpad in S3+, so it can be an AP wake source. */
+ gpio_set_level(GPIO_EN_P3300_TRACKPAD_ODL, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_STARTUP, baseboard_chipset_startup,
+ HOOK_PRIO_DEFAULT);
+
+/* Called on AP S3 -> S0 transition */
+static void baseboard_chipset_resume(void)
+{
+ /*
+ * GPIO_ENABLE_BACKLIGHT is AND'ed with SOC_EDP_BKLTEN from the SoC and
+ * LID_OPEN connection in hardware.
+ */
+ gpio_set_level(GPIO_ENABLE_BACKLIGHT, 1);
+}
+DECLARE_HOOK(HOOK_CHIPSET_RESUME, baseboard_chipset_resume, HOOK_PRIO_DEFAULT);
+
+/* Called on AP S0 -> S3 transition */
+static void baseboard_chipset_suspend(void)
+{
+ /*
+ * GPIO_ENABLE_BACKLIGHT is AND'ed with SOC_EDP_BKLTEN from the SoC and
+ * LID_OPEN connection in hardware.
+ */
+ gpio_set_level(GPIO_ENABLE_BACKLIGHT, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, baseboard_chipset_suspend,
+ HOOK_PRIO_DEFAULT);
+
+/* Called on AP S3 -> S5 transition */
+static void baseboard_chipset_shutdown(void)
+{
+ /* Disable Trackpad in S5- to save power; not a low power wake source */
+ gpio_set_level(GPIO_EN_P3300_TRACKPAD_ODL, 1);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, baseboard_chipset_shutdown,
+ HOOK_PRIO_DEFAULT);
+
/* Called by APL power state machine when transitioning to G3. */
void chipset_do_shutdown(void)
{
@@ -135,6 +176,9 @@ void chipset_do_shutdown(void)
;
}
+/******************************************************************************/
+/* Charger/PD functions */
+
int board_set_active_charge_port(int port)
{
int is_valid_port = (port >= 0 &&
diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h
index b3b321437b..06acea5f97 100644
--- a/baseboard/octopus/baseboard.h
+++ b/baseboard/octopus/baseboard.h
@@ -72,6 +72,11 @@
#define CONFIG_BOARD_VERSION_CBI
#define CONFIG_LOW_POWER_IDLE
+/*
+ * We don't need CONFIG_BACKLIGHT_LID since hardware AND's LID_OPEN and AP
+ * signals with EC backlight enable signal.
+ */
+
/*******************************************************************************
* Battery/Charger/Power Config
*/
diff --git a/board/bip/gpio.inc b/board/bip/gpio.inc
index a27f6af880..30614d2868 100644
--- a/board/bip/gpio.inc
+++ b/board/bip/gpio.inc
@@ -53,6 +53,11 @@ GPIO(PMIC_EN, PIN(D, 7), GPIO_OUT_LOW) /* Enable A Rails via PMIC */
GPIO(PCH_RSMRST_L, PIN(C, 6), GPIO_OUT_LOW) /* RSMRST# to SOC. All _A rails now up. */
GPIO(PCH_SYS_PWROK, PIN(K, 4), GPIO_OUT_LOW) /* EC_PCH_PWROK. All S0 rails now up. */
+/* Peripheral rails */
+GPIO(ENABLE_BACKLIGHT, PIN(B, 5), GPIO_ODR_HIGH |
+ GPIO_SEL_1P8V) /* EC_BL_EN_OD */
+GPIO(EN_P3300_TRACKPAD_ODL, PIN(A, 2), GPIO_ODR_HIGH)
+
GPIO(EC_BATT_PRES_L, PIN(C, 0), GPIO_INPUT)
/*
diff --git a/board/phaser/gpio.inc b/board/phaser/gpio.inc
index a9976b1c2e..60b151e2cc 100644
--- a/board/phaser/gpio.inc
+++ b/board/phaser/gpio.inc
@@ -56,13 +56,17 @@ GPIO(PCH_PWRBTN_L, PIN(C, 1), GPIO_ODR_HIGH) /* EC_PCH_PWR_BTN_ODL */
GPIO(EN_PP5000, PIN(7, 3), GPIO_OUT_LOW) /* EN_PP5000_A */
GPIO(PP5000_PG, PIN(C, 0), GPIO_INPUT) /* PP5000_PG_OD */
-GPIO(EN_P3300_TRACKPAD_ODL, PIN(3, 3), GPIO_ODR_HIGH)
GPIO(EN_PP3300, PIN(D, 4), GPIO_OUT_LOW) /* EN_PP3300_A */
GPIO(PP3300_PG, PIN(6, 0), GPIO_INPUT) /* PP3300_PG_OD */
GPIO(PMIC_EN, PIN(7, 2), GPIO_OUT_LOW) /* Enable A Rails via PMIC */
GPIO(PCH_RSMRST_L, PIN(C, 2), GPIO_OUT_LOW) /* RSMRST# to SOC. All _A rails now up. */
GPIO(PCH_SYS_PWROK, PIN(B, 7), GPIO_OUT_LOW) /* EC_PCH_PWROK. All S0 rails now up. */
+/* Peripheral rails */
+GPIO(ENABLE_BACKLIGHT, PIN(D, 3), GPIO_ODR_HIGH |
+ GPIO_SEL_1P8V) /* EC_BL_EN_OD */
+GPIO(EN_P3300_TRACKPAD_ODL, PIN(3, 3), GPIO_ODR_HIGH)
+
GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT)
/*
diff --git a/board/yorp/board.c b/board/yorp/board.c
index 388421ff29..d07a8c0194 100644
--- a/board/yorp/board.c
+++ b/board/yorp/board.c
@@ -193,34 +193,6 @@ const struct temp_sensor_t temp_sensors[] = {
};
BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
-/* Called on AP S3 -> S0 transition */
-static void board_chipset_resume(void)
-{
- /* Enable Trackpad Power when chipset is in S0 */
- gpio_set_level(GPIO_EN_P3300_TRACKPAD_ODL, 0);
-
- /*
- * GPIO_ENABLE_BACKLIGHT is AND'ed with SOC_EDP_BKLTEN from the SoC and
- * LID_OPEN connection in hardware.
- */
- gpio_set_level(GPIO_ENABLE_BACKLIGHT, 1);
-}
-DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
-
-/* Called on AP S0 -> S3 transition */
-static void board_chipset_suspend(void)
-{
- /* Disable Trackpad Power when chipset transitions to sleep state */
- gpio_set_level(GPIO_EN_P3300_TRACKPAD_ODL, 1);
-
- /*
- * GPIO_ENABLE_BACKLIGHT is AND'ed with SOC_EDP_BKLTEN from the SoC and
- * LID_OPEN connection in hardware.
- */
- gpio_set_level(GPIO_ENABLE_BACKLIGHT, 0);
-}
-DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);
-
enum adc_channel board_get_vbus_adc(int port)
{
return port ? ADC_VBUS_C1 : ADC_VBUS_C0;
diff --git a/board/yorp/gpio.inc b/board/yorp/gpio.inc
index 5b16c12efc..ec4e084bd3 100644
--- a/board/yorp/gpio.inc
+++ b/board/yorp/gpio.inc
@@ -61,13 +61,16 @@ GPIO(PCH_PWRBTN_L, PIN(C, 1), GPIO_ODR_HIGH) /* GPIO_PCH_PWRBTN_L */
GPIO(EN_PP5000, PIN(7, 3), GPIO_OUT_LOW) /* EN_PP5000_A */
GPIO(PP5000_PG, PIN(C, 0), GPIO_INPUT) /* PP5000_PG_OD */
-GPIO(EN_P3300_TRACKPAD_ODL, PIN(3, 3), GPIO_ODR_HIGH)
GPIO(EN_PP3300, PIN(D, 4), GPIO_OUT_LOW) /* EN_PP3300_A */
GPIO(PP3300_PG, PIN(6, 0), GPIO_INPUT) /* PP3300_PG_OD */
GPIO(PMIC_EN, PIN(7, 2), GPIO_OUT_LOW) /* Enable A Rails via PMIC */
GPIO(PCH_RSMRST_L, PIN(C, 2), GPIO_OUT_LOW) /* RSMRST# to SOC. All _A rails now up. */
GPIO(PCH_SYS_PWROK, PIN(B, 7), GPIO_OUT_LOW) /* EC_PCH_PWROK. All S0 rails now up. */
-GPIO(ENABLE_BACKLIGHT, PIN(D, 3), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_BL_EN_OD */
+
+/* Peripheral rails */
+GPIO(ENABLE_BACKLIGHT, PIN(D, 3), GPIO_ODR_HIGH |
+ GPIO_SEL_1P8V) /* EC_BL_EN_OD */
+GPIO(EN_P3300_TRACKPAD_ODL, PIN(3, 3), GPIO_ODR_HIGH)
GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT)