diff options
-rw-r--r-- | zephyr/dts/bindings/adc/named-adc.yaml | 1 | ||||
-rw-r--r-- | zephyr/projects/nissa/nereid_generated.dts | 8 | ||||
-rw-r--r-- | zephyr/projects/nissa/nissa.csv | 2 | ||||
-rw-r--r-- | zephyr/projects/nissa/nivviks_generated.dts | 8 |
4 files changed, 12 insertions, 7 deletions
diff --git a/zephyr/dts/bindings/adc/named-adc.yaml b/zephyr/dts/bindings/adc/named-adc.yaml index 5e1edb6000..02314b64f3 100644 --- a/zephyr/dts/bindings/adc/named-adc.yaml +++ b/zephyr/dts/bindings/adc/named-adc.yaml @@ -94,6 +94,7 @@ child-binding: - ADC_ID_0 - ADC_ID_1 - ADC_PMON + - ADC_PP1050_PROC - ADC_PP3300_S5 - ADC_PSYS - ADC_SOC_IMON2 diff --git a/zephyr/projects/nissa/nereid_generated.dts b/zephyr/projects/nissa/nereid_generated.dts index 4b92b7a266..7f8a3a6f4f 100644 --- a/zephyr/projects/nissa/nereid_generated.dts +++ b/zephyr/projects/nissa/nereid_generated.dts @@ -10,6 +10,11 @@ named-adc-channels { compatible = "named-adc-channels"; + adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { + label = "EC_VSENSE_PP1050_PROC"; + enum-name = "ADC_PP1050_PROC"; + io-channels = <&adc0 14>; + }; adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { label = "EC_VSENSE_PP3300_S5"; enum-name = "ADC_PP3300_S5"; @@ -153,9 +158,6 @@ gpio_pg_pp1050_mem_s3_od: pg_pp1050_mem_s3_od { gpios = <&gpiod 3 GPIO_INPUT>; }; - gpio_pg_pp1050_proc: pg_pp1050_proc { - gpios = <&gpiol 1 GPIO_INPUT_PULL_UP>; - }; gpio_pg_pp5000_s5_od: pg_pp5000_s5_od { gpios = <&gpioe 3 GPIO_INPUT>; }; diff --git a/zephyr/projects/nissa/nissa.csv b/zephyr/projects/nissa/nissa.csv index 0e91182567..31bcc49fd6 100644 --- a/zephyr/projects/nissa/nissa.csv +++ b/zephyr/projects/nissa/nissa.csv @@ -87,7 +87,7 @@ EC_SOC_VCCST_PWRGD_OD,POWER SEQUENCE,,OUT,,OD,N,1.05 V,,H11,P9,OUTPUT_ODR,,, EC_SOC_PCH_PWROK_OD,POWER SEQUENCE,,OUT,,OD,N,3.30 V,,M4,R12,OUTPUT_ODR,,, ALL_SYS_PWRGD,POWER SEQUENCE,,IN,both,,N,3.30 V,,J11,B2,INPUT,,,Figure 398 PDG 0.5 PG_PP1050_MEM_S3_OD,POWER SEQUENCE,,IN,both,--,N,3.30 V,,D2,P5,INPUT,,??, -PG_PP1050_PROC,POWER SEQUENCE,,IN,both,--,Y,3.30 V,,C2,A14,INPUT_PU,,??, +EC_VSENSE_PP1050_PROC,POWER SEQUENCE,,IN,no,ADC,N,ANA,SOC,C2,A14,ADC,ADC_PP1050_PROC,PP1050_PROC monitoring from FIVR output, SYS_RST_ODL,POWER SEQUENCE,Reset for SOC,OUT,,OD,N,3.30 V,SOC,H7,P4,OUTPUT_ODR,,, EC_PCH_WAKE_ODL,POWER SEQUENCE,"Allows EC to wake AP (e.g., keyboard out of S0ix)",OUT,,OD,N,3.30 V,SOC,L11,E1,OUTPUT_ODL,,EC_SOC_WAKE_ODL on schematic; software uses PCH_WAKE name, EC_SOC_RTCRST,POWER SEQUENCE,Allows EC to reset logic on the AP's RTC well,OUT,,TTL,N,3.30 V,SOC,J5,R2,OUTPUT,,, diff --git a/zephyr/projects/nissa/nivviks_generated.dts b/zephyr/projects/nissa/nivviks_generated.dts index 4a0e66f10d..e0baf2251c 100644 --- a/zephyr/projects/nissa/nivviks_generated.dts +++ b/zephyr/projects/nissa/nivviks_generated.dts @@ -10,6 +10,11 @@ named-adc-channels { compatible = "named-adc-channels"; + adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { + label = "EC_VSENSE_PP1050_PROC"; + enum-name = "ADC_PP1050_PROC"; + io-channels = <&adc0 4>; + }; adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { label = "EC_VSENSE_PP3300_S5"; enum-name = "ADC_PP3300_S5"; @@ -143,9 +148,6 @@ gpio_pg_pp1050_mem_s3_od: pg_pp1050_mem_s3_od { gpios = <&gpiof 0 GPIO_INPUT>; }; - gpio_pg_pp1050_proc: pg_pp1050_proc { - gpios = <&gpio4 1 GPIO_INPUT_PULL_UP>; - }; gpio_pg_pp5000_s5_od: pg_pp5000_s5_od { gpios = <&gpio4 2 GPIO_INPUT>; }; |