diff options
| -rw-r--r-- | zephyr/dts/bindings/gpio/gpio-enum-name.yaml | 3 | ||||
| -rw-r--r-- | zephyr/projects/volteer/delbin/include/gpio_map.h | 1 | ||||
| -rw-r--r-- | zephyr/projects/volteer/volteer/gpio.dts | 21 |
3 files changed, 22 insertions, 3 deletions
diff --git a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml index 16c365a59e..9fb875e08d 100644 --- a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml +++ b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml @@ -27,6 +27,7 @@ properties: - GPIO_DP_HOT_PLUG_DET - GPIO_DP_MUX_OE_L - GPIO_DP_MUX_SEL + - GPIO_EC_ACCEL_INT - GPIO_EC_ALS_RGB_INT_L - GPIO_EC_BATT_PRES_ODL - GPIO_EC_BL_EN_OD @@ -85,6 +86,7 @@ properties: - GPIO_KBD_KSO2 - GPIO_LID_ACCEL_INT_L - GPIO_LID_OPEN + - GPIO_M2_SSD_PLN - GPIO_PACKET_MODE_EN - GPIO_PCH_DSW_PWROK - GPIO_PCH_PWRBTN_L @@ -127,6 +129,7 @@ properties: - GPIO_SYS_RESET_L - GPIO_SYS_RST_ODL - GPIO_TABLET_MODE_L + - GPIO_USB_A_LOW_PWR_OD - GPIO_USB_A0_FAULT_ODL - GPIO_USB_A0_OC_ODL - GPIO_USB_C0_BC12_INT_L diff --git a/zephyr/projects/volteer/delbin/include/gpio_map.h b/zephyr/projects/volteer/delbin/include/gpio_map.h index 3afdfba213..1f4b4e1ee0 100644 --- a/zephyr/projects/volteer/delbin/include/gpio_map.h +++ b/zephyr/projects/volteer/delbin/include/gpio_map.h @@ -10,6 +10,7 @@ #include <gpio_signal.h> #define GPIO_PCH_DSW_PWROK GPIO_UNIMPLEMENTED +#define GPIO_USB_C1_LS_EN GPIO_UNIMPLEMENTED #ifdef CONFIG_PLATFORM_EC_POWERSEQ #define POWER_SIGNAL_INT(gpio, edge) \ diff --git a/zephyr/projects/volteer/volteer/gpio.dts b/zephyr/projects/volteer/volteer/gpio.dts index 75cfcbbecb..1e07695e64 100644 --- a/zephyr/projects/volteer/volteer/gpio.dts +++ b/zephyr/projects/volteer/volteer/gpio.dts @@ -90,6 +90,7 @@ }; ec_accel_int { gpios = <&gpio8 1 (GPIO_INPUT | GPIO_PULL_UP)>; + enum-name = "GPIO_EC_ACCEL_INT"; label = "EC_ACCEL_INT"; }; usb_c0_tcpc_int_odl { @@ -230,6 +231,7 @@ }; usb_a_low_pwr_od { gpios = <&gpio6 6 GPIO_ODR_LOW>; + enum-name = "GPIO_USB_A_LOW_PWR_OD"; label = "USB_A_LOW_PWR_OD"; }; gpio_usb_c1_rt_rst_odl_boardid_0: usb_c1_rt_rst_odl_boardid_0 { @@ -264,6 +266,7 @@ }; m2_ssd_pln { gpios = <&gpioa 0 GPIO_ODR_HIGH>; + enum-name = "GPIO_M2_SSD_PLN"; label = "M2_SSD_PLN"; }; m2_ssd_pla { @@ -381,8 +384,20 @@ unused-pins { compatible = "unused-gpios"; - unused-gpios = <&gpiof 2 0>, - <&gpio9 6 0>, - <&gpio3 4 0>; + unused-gpios = + <&gpio3 4 0>, + <&gpio4 1 0>, + <&gpio5 7 0>, /* EC_ESPI_ALERT_L not stuffed */ + <&gpio9 6 0>, + <&gpio7 2 0>, /* EC_SLP_S0IX not stuffed */ + <&gpio8 6 0>, /* EC_KB_BL_EN not stuffed */ + <&gpioa 7 0>, /* EN_PP5000_USB_AG not stuffed */ + <&gpiof 2 0>, + /* + * GPIOB6 cannot be configured as an input. + * Drive output low so signal level doesn't + * depend on default setting of PxDOUT register. + */ + <&gpiob 6 GPIO_OUTPUT_LOW>; }; }; |