diff options
| -rw-r--r-- | common/vboot/efs2.c | 29 | ||||
| -rw-r--r-- | zephyr/CMakeLists.txt | 2 | ||||
| -rw-r--r-- | zephyr/Kconfig | 11 | ||||
| -rw-r--r-- | zephyr/app/ec/main.c | 18 | ||||
| -rw-r--r-- | zephyr/projects/delbin/prj.conf | 2 | ||||
| -rw-r--r-- | zephyr/projects/kohaku/prj.conf | 2 | ||||
| -rw-r--r-- | zephyr/shim/include/config_chip.h | 6 |
7 files changed, 61 insertions, 9 deletions
diff --git a/common/vboot/efs2.c b/common/vboot/efs2.c index c196c75d99..b01b82bf8c 100644 --- a/common/vboot/efs2.c +++ b/common/vboot/efs2.c @@ -62,6 +62,7 @@ static enum cr50_comm_err send_to_cr50(const uint8_t *data, size_t size) { timestamp_t until; int i, timeout = 0; + uint32_t lock_key; struct cr50_comm_response res = {}; /* This will wake up (if it's sleeping) and interrupt Cr50. */ @@ -70,6 +71,8 @@ static enum cr50_comm_err send_to_cr50(const uint8_t *data, size_t size) uart_flush_output(); uart_clear_input(); + uart_shell_stop(); + /* * Send packet. No traffic control, assuming Cr50 consumes stream much * faster. TX buffer shouldn't overflow because it's cleared above and @@ -78,9 +81,9 @@ static enum cr50_comm_err send_to_cr50(const uint8_t *data, size_t size) * Disable interrupts so that the data frame will be stored in the Tx * buffer in one piece. */ - interrupt_disable(); + lock_key = irq_lock(); uart_put_raw(data, size); - interrupt_enable(); + irq_unlock(lock_key); uart_flush_output(); @@ -90,8 +93,10 @@ static enum cr50_comm_err send_to_cr50(const uint8_t *data, size_t size) * Make sure console task won't steal the response in case we exchange * packets after tasks start. */ +#ifndef CONFIG_ZEPHYR if (task_start_called()) task_disable_task(TASK_ID_CONSOLE); +#endif /* !CONFIG_ZEPHYR */ /* Wait for response from Cr50 */ for (i = 0; i < sizeof(res); i++) { @@ -101,24 +106,38 @@ static enum cr50_comm_err send_to_cr50(const uint8_t *data, size_t size) res.error = res.error | c << (i*8); break; } - msleep(1); + /* + * TODO(b:181352041) Implement proper RX buffering. + * Zephyr's shell (even when "stopped") can steal some + * bytes from the uart RX. Skipping the sleep here + * appears to always let us capture the response. Once + * we're able to fork the shell RX, we'll be able to + * buffer the response and add the sleep back into the + * Zephyr builds here (or alternatively use event + * signals). + */ + if (!IS_ENABLED(CONFIG_ZEPHYR)) + msleep(1); timeout = timestamp_expired(until, NULL); } } + uart_shell_start(); +#ifndef CONFIG_ZEPHYR if (task_start_called()) task_enable_task(TASK_ID_CONSOLE); +#endif /* CONFIG_ZEPHYR */ /* Exit packet mode */ enable_packet_mode(false); + CPRINTS("Received 0x%04x", res.error); + if (timeout) { CPRINTS("Timeout"); return CR50_COMM_ERR_TIMEOUT; } - CPRINTS("Received 0x%04x", res.error); - return res.error; } diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 790443fd19..d5b3ed8ddc 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -347,5 +347,7 @@ zephyr_sources_ifdef(CONFIG_PLATFORM_EC_VBOOT_HASH zephyr_sources_ifdef(CONFIG_PLATFORM_EC_VOLUME_BUTTONS "${PLATFORM_EC}/common/button.c") +zephyr_sources_ifdef(CONFIG_PLATFORM_EC_VBOOT "${PLATFORM_EC}/common/vboot/efs2.c") + zephyr_sources_ifdef(CONFIG_PLATFORM_EC_VSTORE "${PLATFORM_EC}/common/vstore.c") diff --git a/zephyr/Kconfig b/zephyr/Kconfig index 2393b228d4..366e15c04b 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -118,6 +118,17 @@ config PLATFORM_EC_BRINGUP - And more! You can search the codebase for CONFIG_BRINGUP to see all of the features this flag will toggle. +config PLATFORM_EC_VBOOT + bool "Enable Chromium OS verified boot" + default y if !SOC_POSIX + help + Enables Early Firmware Selection v2 (EFS2) verified boot. When booting + a Chromium OS image we're actually packing both an RO image and an RW + image into flash. The RO image is loaded first. EFS2 runs at boot and + verifies the integrity of the RW image by sending a hash of the image + to the Google Security Chip (GSC). Once the GSC verifies the hash, + EFS2 calls sysjump and reboot the EC using the RW image. + config PLATFORM_EC_BOARD_VERSION bool "Support the notion of board version" default y diff --git a/zephyr/app/ec/main.c b/zephyr/app/ec/main.c index f1b3d24c69..a2cf64a424 100644 --- a/zephyr/app/ec/main.c +++ b/zephyr/app/ec/main.c @@ -31,10 +31,6 @@ void main(void) init_reset_log(); } - if (IS_ENABLED(CONFIG_PLATFORM_EC_WATCHDOG)) { - watchdog_init(); - } - if (IS_ENABLED(HAS_TASK_KEYSCAN)) { keyboard_scan_init(); } @@ -45,6 +41,20 @@ void main(void) } } + if (IS_ENABLED(CONFIG_PLATFORM_EC_VBOOT)) { + /* + * For RO, it behaves as follows: + * In recovery, it enables PD communication and returns. + * In normal boot, it verifies and jumps to RW. + * For RW, it returns immediately. + */ + vboot_main(); + } + + if (IS_ENABLED(CONFIG_PLATFORM_EC_WATCHDOG)) { + watchdog_init(); + } + /* Call init hooks before main tasks start */ if (IS_ENABLED(CONFIG_PLATFORM_EC_HOOKS)) { hook_notify(HOOK_INIT); diff --git a/zephyr/projects/delbin/prj.conf b/zephyr/projects/delbin/prj.conf index 03ab4d41b3..e52e451622 100644 --- a/zephyr/projects/delbin/prj.conf +++ b/zephyr/projects/delbin/prj.conf @@ -7,6 +7,8 @@ CONFIG_PLATFORM_EC=y CONFIG_SHIMMED_TASKS=y CONFIG_PLATFORM_EC_BRINGUP=y +CONFIG_PLATFORM_EC_VBOOT=n + CONFIG_ESPI=y CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y diff --git a/zephyr/projects/kohaku/prj.conf b/zephyr/projects/kohaku/prj.conf index c87fd50403..df78a7210b 100644 --- a/zephyr/projects/kohaku/prj.conf +++ b/zephyr/projects/kohaku/prj.conf @@ -9,6 +9,8 @@ CONFIG_SHIMMED_TASKS=y CONFIG_ESPI=y CONFIG_I2C=y +CONFIG_PLATFORM_EC_VBOOT=n + # Power sequencing CONFIG_AP=y CONFIG_AP_X86_INTEL_CML=y diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 792a6fabcb..660e57f9c6 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -1185,6 +1185,12 @@ enum battery_type { #if (CONFIG_WATCHDOG_PERIOD_MS) < ((HOOK_TICK_INTERVAL_MS) * 2) #error "CONFIG_WATCHDOG_PERIOD_MS must be at least 2x HOOK_TICK_INTERVAL_MS" #endif +#endif /* CONFIG_PLATFORM_EC_WATCHDOG_PERIOD_MS */ + +#undef CONFIG_VBOOT_EFS +#undef CONFIG_VBOOT_EFS2 +#ifdef CONFIG_PLATFORM_EC_VBOOT +#define CONFIG_VBOOT_EFS2 #endif #endif /* __CROS_EC_CONFIG_CHIP_H */ |