diff options
| -rw-r--r-- | driver/charger/rt946x.c | 39 | ||||
| -rw-r--r-- | driver/charger/rt946x.h | 9 |
2 files changed, 47 insertions, 1 deletions
diff --git a/driver/charger/rt946x.c b/driver/charger/rt946x.c index 10f1decb7c..60322f08e6 100644 --- a/driver/charger/rt946x.c +++ b/driver/charger/rt946x.c @@ -60,6 +60,11 @@ enum rt946x_ilmtsel { RT946X_ILMTSEL_LOWER_LEVEL, /* lower of above two */ }; +enum rt946x_adc_in_sel { + RT946X_ADC_VBUS_DIV5 = 1, + RT946X_ADC_VBUS_DIV2, +}; + enum rt946x_irq { RT946X_IRQ_CHGSTATC = 0, RT946X_IRQ_CHGFAULT, @@ -566,7 +571,39 @@ int charger_discharge_on_ac(int enable) int charger_get_vbus_voltage(int port) { - return EC_ERROR_UNIMPLEMENTED; + int val; + int vbus_mv; + int retries = 40; + + /* Set VBUS as ADC input */ + rt946x_update_bits(RT946X_REG_CHGADC, RT946X_MASK_ADC_IN_SEL, + RT946X_ADC_VBUS_DIV5 << RT946X_SHIFT_ADC_IN_SEL); + + /* Start ADC conversion */ + rt946x_set_bit(RT946X_REG_CHGADC, RT946X_MASK_ADC_START); + + /* + * Wait up to 200ms for the conversion to finish. + * + * TODO(chromium:780364): The 200ms delay might impact + * charge ramp algorithm. + */ + while (--retries) { + rt946x_read8(RT946X_REG_CHGSTAT, &val); + if (val & RT946X_MASK_ADC_STAT) + break; + msleep(5); + } + /* ADC timeout */ + if (!retries) + return -1; + + /* Read measured results */ + rt946x_read8(RT946X_REG_ADCDATAL, &vbus_mv); + rt946x_read8(RT946X_REG_ADCDATAH, &val); + vbus_mv |= (val << 8); + + return (vbus_mv * 25); } /* Setup sourcing current to prevent overload */ diff --git a/driver/charger/rt946x.h b/driver/charger/rt946x.h index dc25222700..7bf3a915f2 100644 --- a/driver/charger/rt946x.h +++ b/driver/charger/rt946x.h @@ -196,6 +196,13 @@ #define RT946X_MASK_JEITA_EN (1 << RT946X_SHIFT_JEITA_EN) +/* ========== CHGADC 0x11 ============ */ +#define RT946X_SHIFT_ADC_IN_SEL 4 +#define RT946X_SHIFT_ADC_START 0 + +#define RT946X_MASK_ADC_IN_SEL 0xF0 +#define RT946X_MASK_ADC_START (1 << RT946X_SHIFT_ADC_START) + /* ========== CHGDPDM1 0x12 ============ */ #define RT946X_MASK_USBCHGEN (1 << 7) @@ -212,8 +219,10 @@ /* ========== CHGSTAT 0x42 ============ */ #define RT946X_SHIFT_CHG_STAT 6 +#define RT946X_SHIFT_ADC_STAT 0 #define RT946X_MASK_CHG_STAT 0xC0 +#define RT946X_MASK_ADC_STAT (1 << RT946X_SHIFT_ADC_STAT) /* ========== CHGNTC 0x43 ============ */ #define RT946X_SHIFT_BATNTC_FAULT 4 |