diff options
-rw-r--r-- | board/bloog/gpio.inc | 7 | ||||
-rw-r--r-- | board/bobba/gpio.inc | 7 | ||||
-rw-r--r-- | board/casta/gpio.inc | 7 | ||||
-rw-r--r-- | board/fleex/gpio.inc | 7 | ||||
-rw-r--r-- | board/garg/gpio.inc | 7 | ||||
-rw-r--r-- | board/meep/gpio.inc | 7 | ||||
-rw-r--r-- | board/phaser/gpio.inc | 7 | ||||
-rw-r--r-- | board/yorp/gpio.inc | 7 |
8 files changed, 48 insertions, 8 deletions
diff --git a/board/bloog/gpio.inc b/board/bloog/gpio.inc index 631f6f03fb..3ee2f88eb1 100644 --- a/board/bloog/gpio.inc +++ b/board/bloog/gpio.inc @@ -88,8 +88,13 @@ GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) * being asserted. Also, it should be fine to have the EC in hibernate when H1 * or servo wants to hold the EC in reset since VCC1 will be down and so entire * EC logic (except PSL) as well as AP will be in reset. + * + * We need to lock the setting so this gpio can't be reconfigured to overdrive + * the real reset signal. (This is the PSL input pin not the real reset pin). */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | + GPIO_HIB_WAKE_HIGH | + GPIO_LOCKED) /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is diff --git a/board/bobba/gpio.inc b/board/bobba/gpio.inc index 699efa5cf3..7be85f7c72 100644 --- a/board/bobba/gpio.inc +++ b/board/bobba/gpio.inc @@ -85,8 +85,13 @@ GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) * being asserted. Also, it should be fine to have the EC in hibernate when H1 * or servo wants to hold the EC in reset since VCC1 will be down and so entire * EC logic (except PSL) as well as AP will be in reset. + * + * We need to lock the setting so this gpio can't be reconfigured to overdrive + * the real reset signal. (This is the PSL input pin not the real reset pin). */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | + GPIO_HIB_WAKE_HIGH | + GPIO_LOCKED) /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is diff --git a/board/casta/gpio.inc b/board/casta/gpio.inc index c827d18a97..e37926b72e 100644 --- a/board/casta/gpio.inc +++ b/board/casta/gpio.inc @@ -82,8 +82,13 @@ GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) * being asserted. Also, it should be fine to have the EC in hibernate when H1 * or servo wants to hold the EC in reset since VCC1 will be down and so entire * EC logic (except PSL) as well as AP will be in reset. + * + * We need to lock the setting so this gpio can't be reconfigured to overdrive + * the real reset signal. (This is the PSL input pin not the real reset pin). */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | + GPIO_HIB_WAKE_HIGH | + GPIO_LOCKED) /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is diff --git a/board/fleex/gpio.inc b/board/fleex/gpio.inc index 99870a844f..726f2da951 100644 --- a/board/fleex/gpio.inc +++ b/board/fleex/gpio.inc @@ -85,8 +85,13 @@ GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) * being asserted. Also, it should be fine to have the EC in hibernate when H1 * or servo wants to hold the EC in reset since VCC1 will be down and so entire * EC logic (except PSL) as well as AP will be in reset. + * + * We need to lock the setting so this gpio can't be reconfigured to overdrive + * the real reset signal. (This is the PSL input pin not the real reset pin). */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | + GPIO_HIB_WAKE_HIGH | + GPIO_LOCKED) /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is diff --git a/board/garg/gpio.inc b/board/garg/gpio.inc index fecc1aa14f..2c485e4e2c 100644 --- a/board/garg/gpio.inc +++ b/board/garg/gpio.inc @@ -84,8 +84,13 @@ GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) * being asserted. Also, it should be fine to have the EC in hibernate when H1 * or servo wants to hold the EC in reset since VCC1 will be down and so entire * EC logic (except PSL) as well as AP will be in reset. + * + * We need to lock the setting so this gpio can't be reconfigured to overdrive + * the real reset signal. (This is the PSL input pin not the real reset pin). */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | + GPIO_HIB_WAKE_HIGH | + GPIO_LOCKED) /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is diff --git a/board/meep/gpio.inc b/board/meep/gpio.inc index a14a21e138..918a3e1ca8 100644 --- a/board/meep/gpio.inc +++ b/board/meep/gpio.inc @@ -88,8 +88,13 @@ GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) * being asserted. Also, it should be fine to have the EC in hibernate when H1 * or servo wants to hold the EC in reset since VCC1 will be down and so entire * EC logic (except PSL) as well as AP will be in reset. + * + * We need to lock the setting so this gpio can't be reconfigured to overdrive + * the real reset signal. (This is the PSL input pin not the real reset pin). */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | + GPIO_HIB_WAKE_HIGH | + GPIO_LOCKED) /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is diff --git a/board/phaser/gpio.inc b/board/phaser/gpio.inc index c70d0a543e..a47a816675 100644 --- a/board/phaser/gpio.inc +++ b/board/phaser/gpio.inc @@ -88,8 +88,13 @@ GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) * being asserted. Also, it should be fine to have the EC in hibernate when H1 * or servo wants to hold the EC in reset since VCC1 will be down and so entire * EC logic (except PSL) as well as AP will be in reset. + * + * We need to lock the setting so this gpio can't be reconfigured to overdrive + * the real reset signal. (This is the PSL input pin not the real reset pin). */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | + GPIO_HIB_WAKE_HIGH | + GPIO_LOCKED) /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is diff --git a/board/yorp/gpio.inc b/board/yorp/gpio.inc index d36a6b768d..9edd6107c6 100644 --- a/board/yorp/gpio.inc +++ b/board/yorp/gpio.inc @@ -86,8 +86,13 @@ GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) * being asserted. Also, it should be fine to have the EC in hibernate when H1 * or servo wants to hold the EC in reset since VCC1 will be down and so entire * EC logic (except PSL) as well as AP will be in reset. + * + * We need to lock the setting so this gpio can't be reconfigured to overdrive + * the real reset signal. (This is the PSL input pin not the real reset pin). */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | + GPIO_HIB_WAKE_HIGH | + GPIO_LOCKED) /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is |