diff options
| -rw-r--r-- | zephyr/projects/intelrvp/BUILD.py | 3 | ||||
| -rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt | 1 | ||||
| -rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts | 15 | ||||
| -rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf | 3 | ||||
| -rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/prj.conf | 2 | ||||
| -rw-r--r-- | zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf | 8 |
6 files changed, 15 insertions, 17 deletions
diff --git a/zephyr/projects/intelrvp/BUILD.py b/zephyr/projects/intelrvp/BUILD.py index 755b6479a6..93e0b64c4a 100644 --- a/zephyr/projects/intelrvp/BUILD.py +++ b/zephyr/projects/intelrvp/BUILD.py @@ -69,10 +69,11 @@ register_intelrvp_project( here / "mtlrvp/mtlrvpp_npcx/interrupts.dts", here / "mtlrvp/ioex.dts", here / "mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts", + here / "mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts", here / "adlrvp/adlrvp_npcx/temp_sensor.dts", ], extra_kconfig_files=[ - here / "legacy_ec_pwrseq.conf", + here / "zephyr_ap_pwrseq.conf", here / "mtlrvp/mtlrvpp_npcx/prj.conf", ], ) diff --git a/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt b/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt index 75015a1068..d47b23c77f 100644 --- a/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt +++ b/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt @@ -3,3 +3,4 @@ # found in the LICENSE file. zephyr_library_sources("src/mtlrvp.c") +zephyr_library_sources("src/board_power.c") diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts index 234acb3447..acf1630a71 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts @@ -21,21 +21,6 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "extpower_interrupt"; }; - int_slp_s0: slp_s0 { - irq-pin = <&pch_slp_s0_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_rsmrst_pwrgd: rsmrst_pwrgd { - irq-pin = <&rsmrst_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_all_sys_pwrgd: all_sys_pwrgd { - irq-pin = <&all_sys_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; int_ioex_kbd_intr_n: ioex_kbd_intr_n { irq-pin = <&ioex_kbd_intr_n>; flags = <GPIO_INT_EDGE_FALLING>; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf index 9a90e99a38..42abe0eeb1 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf @@ -16,3 +16,6 @@ CONFIG_TACH_NPCX=y #RTC CONFIG_PLATFORM_EC_RTC=y + +#Zephyr debug options +CONFIG_LOG=y diff --git a/zephyr/projects/intelrvp/mtlrvp/prj.conf b/zephyr/projects/intelrvp/mtlrvp/prj.conf index ecd3751b90..e89098701b 100644 --- a/zephyr/projects/intelrvp/mtlrvp/prj.conf +++ b/zephyr/projects/intelrvp/mtlrvp/prj.conf @@ -4,9 +4,9 @@ # Power Sequencing CONFIG_AP_X86_INTEL_MTL=y +CONFIG_X86_NON_DSX_PWRSEQ_MTL=y CONFIG_PLATFORM_EC_POWERSEQ_SLP_S3_L_OVERRIDE=n CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n -CONFIG_PLATFORM_EC_POWERSEQ_METEORLAKE=y # Battery CONFIG_PLATFORM_EC_BATTERY_TYPE_NO_AUTO_DETECT=y diff --git a/zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf b/zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf new file mode 100644 index 0000000000..3420d21d3b --- /dev/null +++ b/zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf @@ -0,0 +1,8 @@ +# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Zephyr Inbuilt AP Power Sequencing Config +CONFIG_AP_PWRSEQ=y +CONFIG_X86_NON_DSX_PWRSEQ_CONSOLE=y +CONFIG_AP_PWRSEQ_S0IX=y |