diff options
| -rw-r--r-- | chip/stm32/adc-stm32f0.c | 10 | ||||
| -rw-r--r-- | chip/stm32/adc-stm32l4.c | 13 | ||||
| -rw-r--r-- | chip/stm32/adc_chip.h | 2 |
3 files changed, 15 insertions, 10 deletions
diff --git a/chip/stm32/adc-stm32f0.c b/chip/stm32/adc-stm32f0.c index d1b1cc0e02..597861cb33 100644 --- a/chip/stm32/adc-stm32f0.c +++ b/chip/stm32/adc-stm32f0.c @@ -108,14 +108,14 @@ static void adc_init(const struct adc_t *adc) STM32_ADC_CR = STM32_ADC_CR_ADEN; } -static void adc_configure(int ain_id, enum stm32_adc_smpr sample_rate) +static void adc_configure(int ain_id, enum stm32_adc_smpr sample_time) { /* Sampling time */ - if (sample_rate == STM32_ADC_SMPR_DEFAULT || - sample_rate >= STM32_ADC_SMPR_COUNT) + if (sample_time == STM32_ADC_SMPR_DEFAULT || + sample_time >= STM32_ADC_SMPR_COUNT) STM32_ADC_SMPR = profile.smpr_reg; else - STM32_ADC_SMPR = STM32_ADC_SMPR_SMP(sample_rate); + STM32_ADC_SMPR = STM32_ADC_SMPR_SMP(sample_time); /* Select channel to convert */ STM32_ADC_CHSELR = BIT(ain_id); @@ -321,7 +321,7 @@ int adc_read_channel(enum adc_channel ch) adc_disable_watchdog_no_lock(); } - adc_configure(adc->channel, adc->sample_rate); + adc_configure(adc->channel, adc->sample_time); /* Clear flags */ STM32_ADC_ISR = 0xe; diff --git a/chip/stm32/adc-stm32l4.c b/chip/stm32/adc-stm32l4.c index 23a49e2908..c8eb989f3e 100644 --- a/chip/stm32/adc-stm32l4.c +++ b/chip/stm32/adc-stm32l4.c @@ -100,16 +100,21 @@ static void adc_init(const struct adc_t *adc) STM32_ADC1_CFGR &= ~STM32_ADC1_CFGR_AUTDLY; } +BUILD_ASSERT(CONFIG_ADC_SAMPLE_TIME > 0 && CONFIG_ADC_SAMPLE_TIME <= 8); + static void adc_configure(int ain_id, int ain_rank, - enum stm32_adc_smpr sample_rate) + enum stm32_adc_smpr sample_time) { /* Select Sampling time and channel to convert */ + if (sample_time == STM32_ADC_SMPR_DEFAULT) + sample_time = CONFIG_ADC_SAMPLE_TIME; + if (ain_id <= 10) { STM32_ADC1_SMPR1 &= ~(7 << ((ain_id - 1) * 3)); - STM32_ADC1_SMPR1 |= (sample_rate << ((ain_id - 1) * 3)); + STM32_ADC1_SMPR1 |= ((sample_time - 1) << ((ain_id - 1) * 3)); } else { STM32_ADC1_SMPR2 &= ~(7 << ((ain_id - 11) * 3)); - STM32_ADC1_SMPR2 |= (sample_rate << ((ain_id - 11) * 3)); + STM32_ADC1_SMPR2 |= ((sample_time - 1) << ((ain_id - 11) * 3)); } /* Setup Rank */ @@ -146,7 +151,7 @@ int adc_read_channel(enum adc_channel ch) const struct adc_t *adc = adc_channels + i; adc_configure(adc->channel, adc->rank, - adc->sample_rate); + adc->sample_time); } if ((STM32_ADC1_CR & STM32_ADC1_CR_ADEN) != diff --git a/chip/stm32/adc_chip.h b/chip/stm32/adc_chip.h index 18a280a9d8..8cd53a748a 100644 --- a/chip/stm32/adc_chip.h +++ b/chip/stm32/adc_chip.h @@ -49,7 +49,7 @@ struct adc_t { #if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32L4) || \ defined(CHIP_FAMILY_STM32L5) - enum stm32_adc_smpr sample_rate; /* Sampling Rate of the channel */ + enum stm32_adc_smpr sample_time; /* Sampling Time of the channel */ #endif }; |