diff options
-rw-r--r-- | power/mt8186.c | 9 | ||||
-rw-r--r-- | zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml | 3 | ||||
-rw-r--r-- | zephyr/dts/bindings/gpio/gpio-enum-name.yaml | 1 | ||||
-rw-r--r-- | zephyr/program/geralt/gpio.dtsi | 4 | ||||
-rw-r--r-- | zephyr/program/geralt/interrupts.dtsi | 5 | ||||
-rw-r--r-- | zephyr/program/geralt/power_signal.dtsi | 4 |
6 files changed, 24 insertions, 2 deletions
diff --git a/power/mt8186.c b/power/mt8186.c index bcaaa115df..d5d5056ffc 100644 --- a/power/mt8186.c +++ b/power/mt8186.c @@ -47,6 +47,7 @@ #define IN_SUSPEND_ASSERTED POWER_SIGNAL_MASK(AP_IN_S3) #define IN_AP_RST POWER_SIGNAL_MASK(AP_IN_RST) #define IN_PG_PP4200_S5 POWER_SIGNAL_MASK(PG_PP4200_S5) +#define IN_PMIC_AP_RST POWER_SIGNAL_MASK(PMIC_AP_RST) /* Long power key press to force shutdown in S0. go/crosdebug */ #define FORCED_SHUTDOWN_DELAY (8 * SECOND) @@ -59,6 +60,8 @@ #define PMIC_EN_PULSE_MS 50 /* PMIC hard off delay with 20% tolerance. */ #define PMIC_HARD_OFF_DELAY (8 * SECOND / 100 * 120) +/* Timeout for PMIC resetting AP after hard off. */ +#define PMIC_AP_RESET_TIMEOUT (1 * SECOND) /* 30 ms for hard reset, we hold it longer to prevent TPM false alarm. */ #define SYS_RST_PULSE_LENGTH (50 * MSEC) @@ -327,6 +330,7 @@ enum power_state power_handle_state(enum power_state state) case POWER_G3S5: #if DT_NODE_EXISTS(DT_NODELABEL(en_pp4200_s5)) + power_signal_enable_interrupt(GPIO_PMIC_EC_RESETB); gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(en_pp4200_s5), 1); if (power_wait_mask_signals_timeout(IN_PG_PP4200_S5, IN_PG_PP4200_S5, @@ -429,7 +433,12 @@ enum power_state power_handle_state(enum power_state state) case POWER_S5G3: #if DT_NODE_EXISTS(DT_NODELABEL(en_pp4200_s5)) + if (power_wait_mask_signals_timeout(IN_PMIC_AP_RST, + IN_PMIC_AP_RST, + PMIC_AP_RESET_TIMEOUT)) + CPRINTS("PMIC reset AP timeout. Forcing PMIC off"); gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(en_pp4200_s5), 0); + power_signal_disable_interrupt(GPIO_PMIC_EC_RESETB); #endif return POWER_G3; default: diff --git a/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml b/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml index 9c782d13d3..7c0d0fcff1 100644 --- a/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml +++ b/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml @@ -8,7 +8,7 @@ include: power-signal-list.yaml properties: power-signals-required: - default: 5 + default: 6 child-binding: properties: @@ -19,3 +19,4 @@ child-binding: - AP_WDT_ASSERTED - AP_WARM_RST_REQ - PG_PP4200_S5 + - PMIC_AP_RST diff --git a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml index 74b40f2acc..825a866aec 100644 --- a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml +++ b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml @@ -74,6 +74,7 @@ properties: - GPIO_PG_EC_RSMRST_ODL - GPIO_PG_PP4200_S5_OD - GPIO_PMIC_EC_PWRGD + - GPIO_PMIC_EC_RESETB - GPIO_PMIC_KPD_PWR_ODL - GPIO_PMIC_RESIN_L - GPIO_POWER_BUTTON_L diff --git a/zephyr/program/geralt/gpio.dtsi b/zephyr/program/geralt/gpio.dtsi index 6d3e203506..c0d61ea4e0 100644 --- a/zephyr/program/geralt/gpio.dtsi +++ b/zephyr/program/geralt/gpio.dtsi @@ -161,7 +161,9 @@ gpios = <&gpiob 5 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; }; pmic_ec_resetb: pmic-ec-resetb { - gpios = <&gpioj 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpioj 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_PMIC_EC_RESETB"; }; /* diff --git a/zephyr/program/geralt/interrupts.dtsi b/zephyr/program/geralt/interrupts.dtsi index dd48aa8977..8841eb6e1a 100644 --- a/zephyr/program/geralt/interrupts.dtsi +++ b/zephyr/program/geralt/interrupts.dtsi @@ -71,6 +71,11 @@ flags = <GPIO_INT_EDGE_RISING>; handler = "chipset_reset_request_interrupt"; }; + int_pmic_ec_resetb: pmic-ec-resetb { + irq-pin = <&pmic_ec_resetb>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_signal_interrupt"; + }; int_ap_in_rst: ap-in-rst { irq-pin = <&ap_sysrst_odl_r>; flags = <GPIO_INT_EDGE_BOTH>; diff --git a/zephyr/program/geralt/power_signal.dtsi b/zephyr/program/geralt/power_signal.dtsi index 38ec8a19a2..5adeb682fb 100644 --- a/zephyr/program/geralt/power_signal.dtsi +++ b/zephyr/program/geralt/power_signal.dtsi @@ -27,5 +27,9 @@ power-enum-name = "PG_PP4200_S5"; power-gpio-pin = <&pg_pp4200_s5_od>; }; + pmic_ap_reset { + power-enum-name = "PMIC_AP_RST"; + power-gpio-pin = <&pmic_ec_resetb>; + }; }; }; |