diff options
-rw-r--r-- | Makefile.rules | 2 | ||||
l--------- | board/ryu_p1/Makefile | 1 | ||||
-rw-r--r-- | board/ryu_p1/battery.c | 38 | ||||
-rw-r--r-- | board/ryu_p1/board.c | 178 | ||||
-rw-r--r-- | board/ryu_p1/board.h | 121 | ||||
-rw-r--r-- | board/ryu_p1/build.mk | 13 | ||||
-rw-r--r-- | board/ryu_p1/ec.tasklist | 25 | ||||
-rw-r--r-- | board/ryu_p1/gpio.inc | 124 | ||||
-rw-r--r-- | board/ryu_p1/usb_pd_config.h | 183 | ||||
-rw-r--r-- | board/ryu_p1/usb_pd_policy.c | 171 | ||||
-rw-r--r-- | test/build.mk | 1 | ||||
-rwxr-xr-x | util/flash_ec | 1 |
12 files changed, 1 insertions, 857 deletions
diff --git a/Makefile.rules b/Makefile.rules index e7c7f856e8..204988036e 100644 --- a/Makefile.rules +++ b/Makefile.rules @@ -15,7 +15,7 @@ build-srcs := $(foreach u,$(build-util-bin),$(sort $($(u)-objs:%.o=util/%.c) uti host-srcs := $(foreach u,$(host-util-bin),$(sort $($(u)-objs:%.o=util/%.c) util/$(u).c)) # Don't do a build test on the following boards: -skip_boards = OWNERS host it8380dev ryu_p1 +skip_boards = OWNERS host it8380dev boards := $(filter-out $(skip_boards),$(subst board/,,$(wildcard board/*))) # Create output directories if necessary diff --git a/board/ryu_p1/Makefile b/board/ryu_p1/Makefile deleted file mode 120000 index 94aaae2c4d..0000000000 --- a/board/ryu_p1/Makefile +++ /dev/null @@ -1 +0,0 @@ -../../Makefile
\ No newline at end of file diff --git a/board/ryu_p1/battery.c b/board/ryu_p1/battery.c deleted file mode 100644 index dc65128719..0000000000 --- a/board/ryu_p1/battery.c +++ /dev/null @@ -1,38 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery.h" -#include "common.h" -#include "i2c.h" - -/* Battery temperature ranges in degrees C */ -static const struct battery_info info = { - /* Design voltage */ - .voltage_max = 4350, - .voltage_normal = 3800, - .voltage_min = 2800, - /* Pre-charge current: I <= 0.01C */ - .precharge_current = 64, /* mA */ - /* Operational temperature range */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 50, - .discharging_min_c = -20, - .discharging_max_c = 60, -}; - -const struct battery_info *battery_get_info(void) -{ - return &info; -} - -int board_cut_off_battery(void) -{ - /* Write SET_SHUTDOWN(0x13) to CTRL(0x00) */ - return i2c_write16(I2C_PORT_BATTERY, 0xaa, 0x0, 0x13); -} diff --git a/board/ryu_p1/board.c b/board/ryu_p1/board.c deleted file mode 100644 index eb336131a0..0000000000 --- a/board/ryu_p1/board.c +++ /dev/null @@ -1,178 +0,0 @@ -/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* ryu board configuration */ - -#include "adc.h" -#include "adc_chip.h" -#include "battery.h" -#include "charger.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "inductive_charging.h" -#include "lid_switch.h" -#include "power.h" -#include "power_button.h" -#include "registers.h" -#include "task.h" -#include "usb_pd.h" -#include "usb_pd_config.h" -#include "util.h" - -void vbus_evt(enum gpio_signal signal) -{ - ccprintf("VBUS %d, %d!\n", signal, gpio_get_level(signal)); - task_wake(TASK_ID_PD); -} - -void unhandled_evt(enum gpio_signal signal) -{ - ccprintf("Unhandled INT %d,%d!\n", signal, gpio_get_level(signal)); -} - -#include "gpio_list.h" - -/* Initialize board. */ -static void board_init(void) -{ - /* - * Determine recovery mode is requested by the power, volup, and - * voldown buttons being pressed. - */ - if (power_button_signal_asserted() && - !gpio_get_level(GPIO_BTN_VOLD_L) && - !gpio_get_level(GPIO_BTN_VOLU_L)) - host_set_single_event(EC_HOST_EVENT_KEYBOARD_RECOVERY); - - /* - * Enable CC lines after all GPIO have been initialized. Note, it is - * important that this is enabled after the CC_DEVICE_ODL lines are - * set low to specify device mode. - */ - gpio_set_level(GPIO_USBC_CC_EN, 1); - - /* Enable interrupts on VBUS transitions. */ - gpio_enable_interrupt(GPIO_CHGR_ACOK); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -/* power signal list. Must match order of enum power_signal. */ -const struct power_signal_info power_signal_list[] = { - {GPIO_AP_HOLD, 1, "AP_HOLD"}, - {GPIO_AP_IN_SUSPEND, 1, "SUSPEND_ASSERTED"}, -}; -BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); - -/* ADC channels */ -const struct adc_t adc_channels[] = { - /* Vbus sensing. Converted to mV, /10 voltage divider. */ - [ADC_VBUS] = {"VBUS", 30000, 4096, 0, STM32_AIN(0)}, - /* USB PD CC lines sensing. Converted to mV (3000mV/4096). */ - [ADC_CC1_PD] = {"CC1_PD", 3000, 4096, 0, STM32_AIN(1)}, - [ADC_CC2_PD] = {"CC1_PD", 3000, 4096, 0, STM32_AIN(3)}, - /* Charger current sensing. Converted to mA. */ - [ADC_IADP] = {"IADP", 7500, 4096, 0, STM32_AIN(8)}, - [ADC_IBAT] = {"IBAT", 37500, 4096, 0, STM32_AIN(13)}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, - {"slave", I2C_PORT_SLAVE, 100, - GPIO_SLAVE_I2C_SCL, GPIO_SLAVE_I2C_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -void board_set_usb_mux(int port, enum typec_mux mux, int polarity) -{ - /* reset everything */ - gpio_set_level(GPIO_USBC_SS_EN_L, 1); - gpio_set_level(GPIO_USBC_DP_MODE_L, 1); - gpio_set_level(GPIO_USBC_DP_POLARITY, 1); - gpio_set_level(GPIO_USBC_SS1_USB_MODE_L, 1); - gpio_set_level(GPIO_USBC_SS2_USB_MODE_L, 1); - - if (mux == TYPEC_MUX_NONE) - /* everything is already disabled, we can return */ - return; - - if (mux == TYPEC_MUX_USB || mux == TYPEC_MUX_DOCK) { - /* USB 3.0 uses 2 superspeed lanes */ - gpio_set_level(polarity ? GPIO_USBC_SS2_USB_MODE_L : - GPIO_USBC_SS1_USB_MODE_L, 0); - } - - if (mux == TYPEC_MUX_DP || mux == TYPEC_MUX_DOCK) { - /* DP uses available superspeed lanes (x2 or x4) */ - gpio_set_level(GPIO_USBC_DP_POLARITY, polarity); - gpio_set_level(GPIO_USBC_DP_MODE_L, 0); - } - /* switch on superspeed lanes */ - gpio_set_level(GPIO_USBC_SS_EN_L, 0); -} - -int board_get_usb_mux(int port, const char **dp_str, const char **usb_str) -{ - int has_ss = !gpio_get_level(GPIO_USBC_SS_EN_L); - int has_usb = !gpio_get_level(GPIO_USBC_SS1_USB_MODE_L) || - !gpio_get_level(GPIO_USBC_SS2_USB_MODE_L); - int has_dp = !gpio_get_level(GPIO_USBC_DP_MODE_L); - - if (has_dp) - *dp_str = gpio_get_level(GPIO_USBC_DP_POLARITY) ? "DP2" : "DP1"; - else - *dp_str = NULL; - - if (has_usb) - *usb_str = gpio_get_level(GPIO_USBC_SS1_USB_MODE_L) ? - "USB2" : "USB1"; - else - *usb_str = NULL; - - return has_ss; -} - -void board_flip_usb_mux(int port) -{ - int usb_polarity; - - /* Flip DP polarity */ - gpio_set_level(GPIO_USBC_DP_POLARITY, - !gpio_get_level(GPIO_USBC_DP_POLARITY)); - - /* Flip USB polarity if enabled */ - if (gpio_get_level(GPIO_USBC_SS1_USB_MODE_L) && - gpio_get_level(GPIO_USBC_SS2_USB_MODE_L)) - return; - usb_polarity = gpio_get_level(GPIO_USBC_SS1_USB_MODE_L); - - /* - * Disable both sides first so that we don't enable both at the - * same time accidentally. - */ - gpio_set_level(GPIO_USBC_SS1_USB_MODE_L, 1); - gpio_set_level(GPIO_USBC_SS2_USB_MODE_L, 1); - - gpio_set_level(GPIO_USBC_SS1_USB_MODE_L, !usb_polarity); - gpio_set_level(GPIO_USBC_SS2_USB_MODE_L, usb_polarity); -} - -/** - * Discharge battery when on AC power for factory test. - */ -int board_discharge_on_ac(int enable) -{ - return charger_discharge_on_ac(enable); -} - -int extpower_is_present(void) -{ - return gpio_get_level(GPIO_CHGR_ACOK); -} diff --git a/board/ryu_p1/board.h b/board/ryu_p1/board.h deleted file mode 100644 index 11405d0783..0000000000 --- a/board/ryu_p1/board.h +++ /dev/null @@ -1,121 +0,0 @@ -/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* ryu board configuration */ - -#ifndef __BOARD_H -#define __BOARD_H - -/* 48 MHz SYSCLK clock frequency */ -#define CPU_CLOCK 48000000 - -/* the UART console is on USART2 (PA14/PA15) */ -#undef CONFIG_UART_CONSOLE -#define CONFIG_UART_CONSOLE 2 - -/* By default, enable all console messages excepted USB */ -#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_USBPD)) - -/* Optional features */ -#undef CONFIG_CMD_HASH -#undef CONFIG_CMD_TYPEC -#define CONFIG_COMMON_GPIO_SHORTNAMES -#define CONFIG_STM_HWTIMER32 -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_CUSTOM_VDM -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_FLASH_ERASE_CHECK -#define CONFIG_USB_PD_INTERNAL_COMP -#define CONFIG_USBC_SS_MUX -#define CONFIG_USBC_VCONN -#define CONFIG_ADC -#define CONFIG_HW_CRC -#define CONFIG_I2C -#define CONFIG_LID_SWITCH -#define CONFIG_VBOOT_HASH -#undef CONFIG_WATCHDOG_HELP -#undef CONFIG_TASK_PROFILING -#undef CONFIG_CONSOLE_CMDHELP -#define CONFIG_INDUCTIVE_CHARGING -#undef CONFIG_HIBERNATE -#define CONFIG_DEBUG_ASSERT_BRIEF - -/* Disable unused console command to save flash space */ -#undef CONFIG_CMD_POWERINDEBUG -#undef CONFIG_CMD_PD - -/* - * Pericom I2C workaround - * TODO(crosbug.com/p/31529): Remove this. - */ -#define CONFIG_I2C_SCL_GATE_PORT I2C_PORT_MASTER -#define CONFIG_I2C_SCL_GATE_ADDR 0x4a -#define CONFIG_I2C_SCL_GATE_GPIO GPIO_PERICOM_CLK_EN - -/* Charging/Power configuration */ -#undef CONFIG_BATTERY_RYU /* TODO implement */ -#define CONFIG_BATTERY_BQ27541 -#define CONFIG_BATTERY_CUT_OFF -#define CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD -#define CONFIG_BATTERY_REVIVE_DISCONNECT -#define CONFIG_CHARGER -#define CONFIG_CHARGER_V2 -#define CONFIG_CHARGER_BQ24773 -#define CONFIG_CHARGER_ILIM_PIN_DISABLED -#define CONFIG_CHARGER_SENSE_RESISTOR 5 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 -#define CONFIG_CHARGER_INPUT_CURRENT 512 -#define CONFIG_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHIPSET_TEGRA -#define CONFIG_PMIC_FW_LONG_PRESS_TIMER -#define CONFIG_POWER_COMMON -#define CONFIG_POWER_BUTTON -#define CONFIG_POWER_BUTTON_ACTIVE_STATE 1 - -/* I2C ports configuration */ -#define I2C_PORT_MASTER 0 -#define I2C_PORT_SLAVE 1 -#define I2C_PORT_EC I2C_PORT_SLAVE -#define I2C_PORT_CHARGER I2C_PORT_MASTER -#define I2C_PORT_BATTERY I2C_PORT_MASTER - -/* slave address for host commands */ -#ifdef HAS_TASK_HOSTCMD -#define CONFIG_HOSTCMD_I2C_SLAVE_ADDR 0x3c -#endif - -#ifndef __ASSEMBLER__ - -/* Timer selection */ -#define TIM_CLOCK32 2 -#define TIM_ADC 3 - -#include "gpio_signal.h" - -enum power_signal { - TEGRA_XPSHOLD = 0, - TEGRA_SUSPEND_ASSERTED, - - /* Number of power signals */ - POWER_SIGNAL_COUNT -}; - -/* ADC signal */ -enum adc_channel { - ADC_VBUS = 0, - ADC_CC1_PD, - ADC_CC2_PD, - ADC_IADP, - ADC_IBAT, - /* Number of ADC channels */ - ADC_CH_COUNT -}; - -/* Discharge battery when on AC power for factory test. */ -int board_discharge_on_ac(int enable); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __BOARD_H */ diff --git a/board/ryu_p1/build.mk b/board/ryu_p1/build.mk deleted file mode 100644 index 150b265120..0000000000 --- a/board/ryu_p1/build.mk +++ /dev/null @@ -1,13 +0,0 @@ -# Copyright (c) 2014 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build - -# the IC is STmicro STM32F072VBH6 -CHIP:=stm32 -CHIP_FAMILY:=stm32f0 -CHIP_VARIANT:=stm32f07x - -board-y=board.o battery.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/board/ryu_p1/ec.tasklist b/board/ryu_p1/ec.tasklist deleted file mode 100644 index 4e99996aee..0000000000 --- a/board/ryu_p1/ec.tasklist +++ /dev/null @@ -1,25 +0,0 @@ -/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * List of enabled tasks in the priority order - * - * The first one has the lowest priority. - * - * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and - * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries, - * where : - * 'n' in the name of the task - * 'r' in the main routine of the task - * 'd' in an opaque parameter passed to the routine at startup - * 's' is the stack size in bytes; must be a multiple of 8 - */ -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD, pd_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/ryu_p1/gpio.inc b/board/ryu_p1/gpio.inc deleted file mode 100644 index b7d4193f3d..0000000000 --- a/board/ryu_p1/gpio.inc +++ /dev/null @@ -1,124 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright (c) 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Interrupts */ -GPIO(CHGR_ACOK, A, 2, GPIO_INT_BOTH | GPIO_PULL_UP, vbus_evt) -GPIO(BC_TEMP_ALERT_L, A, 13, GPIO_INT_FALLING, unhandled_evt) -GPIO(POWER_BUTTON_L, C, 13, GPIO_INT_BOTH, power_button_interrupt) /* active high, the name is for compatibility with existing code */ -GPIO(USBC_BC12_INT_L, D, 11, GPIO_INT_FALLING | GPIO_PULL_UP, unhandled_evt) -GPIO(LID_OPEN, E, 1, GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) -GPIO(CHARGE_DONE, E, 6, GPIO_INT_BOTH, inductive_charging_interrupt) -GPIO(LB_INT_L, E, 7, GPIO_INT_FALLING | GPIO_PULL_UP, unhandled_evt) -GPIO(LIGHTBAR_EN_L, E, 8, GPIO_INT_FALLING | GPIO_PULL_UP, unhandled_evt) -GPIO(AP_IN_SUSPEND, E, 9, GPIO_INT_BOTH, power_signal_interrupt) -GPIO(BASE_PRES_L, E, 10, GPIO_INT_BOTH | GPIO_PULL_UP, unhandled_evt) -GPIO(AP_HOLD, E, 14, GPIO_INT_BOTH, power_signal_interrupt) - -/* Buttons */ -GPIO(BTN_VOLD_L, C, 0, GPIO_INPUT | GPIO_PULL_UP, NULL) -GPIO(BTN_VOLU_L, C, 1, GPIO_INPUT | GPIO_PULL_UP, NULL) - -/* PD RX/TX */ -GPIO(USBC_CC1_PD, A, 1, GPIO_ANALOG, NULL) -GPIO(USBC_CC2_PD, A, 3, GPIO_ANALOG, NULL) -GPIO(USBC_CC_EN, A, 4, GPIO_OUT_LOW, NULL) -GPIO(USBC_CC_TX_DATA, A, 6, GPIO_OUT_LOW, NULL) -GPIO(USBC_CC_TX_EN, D, 7, GPIO_OUT_LOW, NULL) - -#if 0 -/* Alternate functions */ -GPIO(USBC_TX_CLKOUT, B, 1, GPIO_OUT_LOW, NULL) -GPIO(USBC_TX_CLKIN, B, 3, GPIO_OUT_LOW, NULL) -#endif - -/* System power */ -GPIO(PMIC_PWRON_L, D, 14, GPIO_ODR_HIGH, NULL) -GPIO(PMIC_WARM_RESET_L, E, 4, GPIO_ODR_HIGH, NULL) -GPIO(EN_PP3300_RSVD, E, 13, GPIO_INPUT, NULL) -/* sensor temp output and PMIC reset input */ -GPIO(PMIC_THERM_L, D, 12, GPIO_ODR_HIGH, NULL) - -GPIO(VBUS_SENSE, A, 0, GPIO_ANALOG, NULL) -GPIO(CHGR_IADP, B, 0, GPIO_ANALOG, NULL) -GPIO(CHGR_IBAT, C, 3, GPIO_ANALOG, NULL) - -/* Inductive charging */ -GPIO(CHARGE_EN, D, 13, GPIO_OUT_LOW, NULL) -GPIO(BASE_CHG_VDD_EN, E, 5, GPIO_OUT_LOW, NULL) - -/* USB-C Power and muxes control */ -GPIO(USBC_CHARGE_EN_L, A, 7, GPIO_OUT_LOW, NULL) -GPIO(USBC_5V_EN, A, 10, GPIO_OUT_LOW, NULL) -GPIO(USBC_VCONN1_EN_L, F, 10, GPIO_OUT_HIGH, NULL) -GPIO(USBC_VCONN2_EN_L, D, 10, GPIO_OUT_HIGH, NULL) - -GPIO(USBC_CC1_DEVICE_ODL, A, 5, GPIO_ODR_LOW, NULL) -GPIO(USBC_CC2_DEVICE_ODL, F, 9, GPIO_ODR_LOW, NULL) - -GPIO(USBC_DP_MODE_L, D, 1, GPIO_OUT_HIGH, NULL) -GPIO(USBC_DP_POLARITY, D, 2, GPIO_OUT_HIGH, NULL) -GPIO(USBC_SS1_USB_MODE_L, D, 3, GPIO_OUT_HIGH, NULL) -GPIO(USBC_SS2_USB_MODE_L, D, 5, GPIO_OUT_HIGH, NULL) -GPIO(USBC_SS_EN_L, D, 6, GPIO_OUT_HIGH, NULL) - -/* Inputs */ -GPIO(BOARD_ID0, E, 11, GPIO_INPUT, NULL) -GPIO(BOARD_ID1, E, 12, GPIO_INPUT, NULL) -GPIO(SH_SIGNAL, E, 2, GPIO_INPUT, NULL) - -/* Lightbar reset */ -GPIO(LB_RST_L, D, 15, GPIO_ODR_HIGH | GPIO_PULL_UP, NULL) - -#if 0 -/* Alternate functions */ -GPIO(USB_DM, A, 11, GPIO_ANALOG, NULL) -GPIO(USB_DP, A, 12, GPIO_ANALOG, NULL) -GPIO(UART_TX, A, 14, GPIO_OUT_LOW, NULL) -GPIO(UART_RX, A, 15, GPIO_OUT_LOW, NULL) -#endif - -/* - * I2C pins should be configured as inputs until I2C module is - * initialized. This will avoid driving the lines unintentionally. - */ -GPIO(MASTER_I2C_SCL, B, 8, GPIO_INPUT, NULL) -GPIO(MASTER_I2C_SDA, B, 9, GPIO_INPUT, NULL) -GPIO(SLAVE_I2C_SCL, B, 10, GPIO_INPUT, NULL) -GPIO(SLAVE_I2C_SDA, B, 11, GPIO_INPUT, NULL) - -/* SCL gating for PI3USB9281 */ -GPIO(PERICOM_CLK_EN, C, 15, GPIO_OUT_LOW, NULL) - -/* Case closed debugging. */ -GPIO(PD_DISABLE_DEBUG, C, 5, GPIO_OUT_HIGH, NULL) -GPIO(SPI_FLASH_NSS, B, 12, GPIO_INPUT, NULL) -GPIO(SPI_FLASH_SCK, B, 13, GPIO_INPUT, NULL) -GPIO(SPI_FLASH_MOSI, B, 14, GPIO_INPUT, NULL) -GPIO(SPI_FLASH_MISO, B, 15, GPIO_INPUT, NULL) -GPIO(VDDSPI_EN, C, 12, GPIO_OUT_LOW, NULL) -GPIO(SH_RESET_L, C, 4, GPIO_ODR_HIGH, NULL) -GPIO(SH_BOOT, C, 9, GPIO_ODR_HIGH, NULL) -GPIO(EC_INT_L, F, 2, GPIO_ODR_HIGH, NULL) -GPIO(ENTERING_RW, F, 3, GPIO_OUT_LOW, NULL) -GPIO(WP_L, F, 6, GPIO_INPUT, NULL) - -#if 0 -/* Alternate functions */ -GPIO(SH_UART_TX, C, 11, GPIO_OUT_LOW, NULL) -GPIO(SH_UART_RX, C, 10, GPIO_INPUT, NULL) -GPIO(AP_UART_TX, B, 6, GPIO_OUT_LOW, NULL) -GPIO(AP_UART_RX, B, 7, GPIO_INPUT, NULL) -#endif - -UNIMPLEMENTED(AP_RESET_L) - -ALTERNATE(B, 0x0008, 0, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */ -ALTERNATE(B, 0x0002, 0, MODULE_USB_PD, 0) /* TIM14_CH1: PB1 */ -ALTERNATE(B, 0x00C0, 0, MODULE_UART, 0) /* USART1: PB6/PB7 */ -ALTERNATE(A, 0xC000, 1, MODULE_UART, GPIO_PULL_UP) /* USART2: PA14/PA15 */ -ALTERNATE(C, 0x0C00, 1, MODULE_UART, 0) /* USART3: PC10/PC11 */ -ALTERNATE(B, 0x0F00, 1, MODULE_I2C, 0) /* I2C SLAVE:PB10/11 MASTER:PB8/9 */ diff --git a/board/ryu_p1/usb_pd_config.h b/board/ryu_p1/usb_pd_config.h deleted file mode 100644 index 61c5d0d32a..0000000000 --- a/board/ryu_p1/usb_pd_config.h +++ /dev/null @@ -1,183 +0,0 @@ -/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Power delivery board configuration */ - -#ifndef __USB_PD_CONFIG_H -#define __USB_PD_CONFIG_H - -/* Port and task configuration */ -#define PD_PORT_COUNT 1 -#define PORT_TO_TASK_ID(port) TASK_ID_PD -#define TASK_ID_TO_PORT(id) 0 - -/* Timer selection for baseband PD communication */ -#define TIM_CLOCK_PD_TX_C0 14 -#define TIM_CLOCK_PD_RX_C0 1 - -#define TIM_CLOCK_PD_TX(p) TIM_CLOCK_PD_TX_C0 -#define TIM_CLOCK_PD_RX(p) TIM_CLOCK_PD_RX_C0 - -/* Timer channel */ -#define TIM_RX_CCR_C0 1 -#define TIM_TX_CCR_C0 1 - -/* RX timer capture/compare register */ -#define TIM_CCR_C0 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C0, TIM_RX_CCR_C0)) -#define TIM_RX_CCR_REG(p) TIM_CCR_C0 - -/* TX and RX timer register */ -#define TIM_REG_TX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_TX_C0)) -#define TIM_REG_RX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_RX_C0)) -#define TIM_REG_TX(p) TIM_REG_TX_C0 -#define TIM_REG_RX(p) TIM_REG_RX_C0 - -/* use the hardware accelerator for CRC */ -#define CONFIG_HW_CRC - -/* TX is using SPI1 on PB3-5 */ -#define SPI_REGS(p) STM32_SPI1_REGS - -static inline void spi_enable_clock(int port) -{ - STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1; -} - -#define DMAC_SPI_TX(p) STM32_DMAC_CH3 - -/* RX is using COMP1 triggering TIM1 CH1 */ -#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM1_IC1 -#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM1_IC1 - -#define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0 -#define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0 -#define TIM_CCR_CS 1 -#define EXTI_COMP_MASK(p) ((1 << 21) | (1 << 22)) -#define IRQ_COMP STM32_IRQ_COMP -/* triggers packet detection on comparator falling edge */ -#define EXTI_XTSR STM32_EXTI_FTSR - -#define DMAC_TIM_RX(p) STM32_DMAC_CH2 - -/* the pins used for communication need to be hi-speed */ -static inline void pd_set_pins_speed(int port) -{ - /* 40 MHz pin speed on SPI MISO PA6 */ - STM32_GPIO_OSPEEDR(GPIO_A) |= 0x00003000; - /* 40 MHz pin speed on TIM14_CH1 (PB1) */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x0000000C; -} - -/* Reset SPI peripheral used for TX */ -static inline void pd_tx_spi_reset(int port) -{ - /* Reset SPI1 */ - STM32_RCC_APB2RSTR |= (1 << 12); - STM32_RCC_APB2RSTR &= ~(1 << 12); -} - -/* Drive the CC line from the TX block */ -static inline void pd_tx_enable(int port, int polarity) -{ - /* put SPI function on TX pin : PA6 is SPI MISO */ - gpio_set_alternate_function(GPIO_A, 0x0040, 0); - - /* set the low level reference */ - gpio_set_level(GPIO_USBC_CC_TX_EN, 1); -} - -/* Put the TX driver in Hi-Z state */ -static inline void pd_tx_disable(int port, int polarity) -{ - /* output low on SPI TX (PA6 is SPI1 MISO) to disable the FET */ - STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A) - & ~(3 << (2*6))) - | (1 << (2*6)); - - /* put the low level reference in Hi-Z */ - gpio_set_level(GPIO_USBC_CC_TX_EN, 0); -} - -/* we know the plug polarity, do the right configuration */ -static inline void pd_select_polarity(int port, int polarity) -{ - /* - * use the right comparator : CC1 -> PA1 (COMP1 INP) - * CC2 -> PA3 (COMP2 INP) - * use VrefInt / 2 as INM (about 600mV) - */ - STM32_COMP_CSR = (STM32_COMP_CSR - & ~(STM32_COMP_CMP1INSEL_MASK | STM32_COMP_CMP2INSEL_MASK - | STM32_COMP_CMP1EN | STM32_COMP_CMP2EN)) - | STM32_COMP_CMP1INSEL_VREF12 | STM32_COMP_CMP2INSEL_VREF12 - | (polarity ? STM32_COMP_CMP2EN : STM32_COMP_CMP1EN); -} - -/* Initialize pins used for TX and put them in Hi-Z */ -static inline void pd_tx_init(void) -{ - gpio_config_module(MODULE_USB_PD, 1); -} - -static inline void pd_set_host_mode(int port, int enable) -{ - if (enable) { - /* We never charging in power source mode */ - gpio_set_level(GPIO_USBC_CHARGE_EN_L, 1); - /* High-Z is used for host mode. */ - gpio_set_level(GPIO_USBC_CC1_DEVICE_ODL, 1); - gpio_set_level(GPIO_USBC_CC2_DEVICE_ODL, 1); - } else { - /* Kill VBUS power supply */ - gpio_set_level(GPIO_USBC_5V_EN, 0); - /* Pull low for device mode. */ - gpio_set_level(GPIO_USBC_CC1_DEVICE_ODL, 0); - gpio_set_level(GPIO_USBC_CC2_DEVICE_ODL, 0); - /* Enable the charging path*/ - gpio_set_level(GPIO_USBC_CHARGE_EN_L, 0); - } - -} - -static inline int pd_adc_read(int port, int cc) -{ - if (cc == 0) - return adc_read_channel(ADC_CC1_PD); - else - return adc_read_channel(ADC_CC2_PD); -} - -static inline void pd_set_vconn(int port, int polarity, int enable) -{ - /* Set VCONN on the opposite CC line from the polarity */ - gpio_set_level(polarity ? GPIO_USBC_VCONN1_EN_L : - GPIO_USBC_VCONN2_EN_L, !enable); -} - -static inline int pd_snk_is_vbus_provided(int port) -{ - return gpio_get_level(GPIO_CHGR_ACOK); -} - -/* Standard-current DFP : no-connect voltage is 1.55V */ -#define PD_SRC_VNC 1550 /* mV */ - -/* UFP-side : threshold for DFP connection detection */ -#define PD_SNK_VA 200 /* mV */ - -/* start as a sink in case we have no other power supply/battery */ -#define PD_DEFAULT_STATE PD_STATE_SNK_DISCONNECTED - -/* delay for the voltage transition on the power supply, chip max is 16us */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 20000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 20000 /* us */ - -/* Define typical operating power and max power */ -#define PD_OPERATING_POWER_MW 10000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 - -#endif /* __USB_PD_CONFIG_H */ diff --git a/board/ryu_p1/usb_pd_policy.c b/board/ryu_p1/usb_pd_policy.c deleted file mode 100644 index e48bd348e1..0000000000 --- a/board/ryu_p1/usb_pd_policy.c +++ /dev/null @@ -1,171 +0,0 @@ -/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "charge_state.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "registers.h" -#include "system.h" -#include "task.h" -#include "timer.h" -#include "util.h" -#include "usb_pd.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP) - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 900, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), - PDO_BATT(5000, 20000, 10000), - PDO_VAR(5000, 20000, 3000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - -void pd_set_input_current_limit(int port, uint32_t max_ma, - uint32_t supply_voltage) -{ - int rv = charge_set_input_current_limit(MAX(max_ma, - CONFIG_CHARGER_INPUT_CURRENT)); - if (rv < 0) - CPRINTS("Failed to set input current limit for PD"); -} - -int pd_is_valid_input_voltage(int mv) -{ - /* Any voltage less than the max is allowed */ - return 1; -} - -int pd_check_requested_voltage(uint32_t rdo) -{ - int max_ma = rdo & 0x3FF; - int op_ma = (rdo >> 10) & 0x3FF; - int idx = rdo >> 28; - uint32_t pdo; - uint32_t pdo_ma; - - if (!idx || idx > pd_src_pdo_cnt) - return EC_ERROR_INVAL; /* Invalid index */ - - /* check current ... */ - pdo = pd_src_pdo[idx - 1]; - pdo_ma = (pdo & 0x3ff); - if (op_ma > pdo_ma) - return EC_ERROR_INVAL; /* too much op current */ - if (max_ma > pdo_ma) - return EC_ERROR_INVAL; /* too much max current */ - - CPRINTF("Requested %d V %d mA (for %d/%d mA)\n", - ((pdo >> 10) & 0x3ff) * 50, (pdo & 0x3ff) * 10, - ((rdo >> 10) & 0x3ff) * 10, (rdo & 0x3ff) * 10); - - return EC_SUCCESS; -} - -void pd_transition_voltage(int idx) -{ - /* No-operation: we are always 5V */ -} - -int pd_set_power_supply_ready(int port) -{ - /* provide VBUS */ - gpio_set_level(GPIO_USBC_5V_EN, 1); - - return EC_SUCCESS; /* we are ready */ -} - -void pd_power_supply_reset(int port) -{ - /* Kill VBUS */ - gpio_set_level(GPIO_USBC_5V_EN, 0); -} - -int pd_board_checks(void) -{ - return EC_SUCCESS; -} - -int pd_check_power_swap(int port) -{ - /* TODO: use battery level to decide to accept/reject power swap */ - /* Always allow power swap */ - return 1; -} - -int pd_check_data_swap(int port, int data_role) -{ - /* Always allow data swap */ - return 1; -} - -void pd_check_pr_role(int port, int pr_role, int partner_pr_swap) -{ -} - -void pd_check_dr_role(int port, int dr_role, int partner_dr_swap) -{ -} - -void pd_execute_data_swap(int port, int data_role) -{ - /* TODO: what do we need to do to change host controller data role? */ -} - -/* ----------------- Vendor Defined Messages ------------------ */ -int pd_custom_vdm(int port, int cnt, uint32_t *payload, - uint32_t **rpayload) -{ - int cmd = PD_VDO_CMD(payload[0]); - uint16_t dev_id = 0; - - /* make sure we have some payload */ - if (cnt == 0) - return 0; - - switch (cmd) { - case VDO_CMD_VERSION: - /* guarantee last byte of payload is null character */ - *(payload + cnt - 1) = 0; - CPRINTF("version: %s\n", (char *)(payload+1)); - break; - case VDO_CMD_READ_INFO: - case VDO_CMD_SEND_INFO: - /* if last word is present, it contains lots of info */ - if (cnt == 7) { - /* TODO: Notify host */ - dev_id = VDO_INFO_HW_DEV_ID(payload[6]); - CPRINTF("DevId:%d.%d SW:%d RW:%d\n", - HW_DEV_ID_MAJ(dev_id), - HW_DEV_ID_MIN(dev_id), - VDO_INFO_SW_DBG_VER(payload[6]), - VDO_INFO_IS_RW(payload[6])); - } - /* copy hash */ - if (cnt >= 6) - pd_dev_store_rw_hash(port, dev_id, payload + 1, - SYSTEM_IMAGE_UNKNOWN); - - break; - case VDO_CMD_CURRENT: - CPRINTF("Current: %dmA\n", payload[1]); - break; - case VDO_CMD_FLIP: - board_flip_usb_mux(0); - break; - } - - return 0; -} diff --git a/test/build.mk b/test/build.mk index 115fb515ee..9d897f14b6 100644 --- a/test/build.mk +++ b/test/build.mk @@ -20,7 +20,6 @@ test-list-$(BOARD_SAMUS)= # Ryu has issues when building tests test-list-$(BOARD_RYU)= -test-list-$(BOARD_RYU_P1)= # llama has issues when building tests test-list-$(BOARD_LLAMA)= diff --git a/util/flash_ec b/util/flash_ec index 1c0246ae92..4b9501d9ab 100755 --- a/util/flash_ec +++ b/util/flash_ec @@ -75,7 +75,6 @@ BOARDS_STM32=( plankton ryu ryu_sh - ryu_p1 samus_pd snow speedy |