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-rw-r--r--chip/it83xx/lpc.c2
-rw-r--r--chip/it83xx/registers.h1
2 files changed, 3 insertions, 0 deletions
diff --git a/chip/it83xx/lpc.c b/chip/it83xx/lpc.c
index 02a81c2bd0..519df6731a 100644
--- a/chip/it83xx/lpc.c
+++ b/chip/it83xx/lpc.c
@@ -566,6 +566,8 @@ static void lpc_init(void)
{
enum ec2i_message ec2i_r;
+ /* SPI slave interface is disabled */
+ IT83XX_GCTRL_SSCR = 0;
/*
* DLM 52k~56k size select enable.
* For mapping LPC I/O cycle 800h ~ 9FFh to DLM 8D800 ~ 8D9FF.
diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h
index 66c2ace362..efd5083edb 100644
--- a/chip/it83xx/registers.h
+++ b/chip/it83xx/registers.h
@@ -682,6 +682,7 @@ enum clock_gate_offsets {
#define IT83XX_GCTRL_EPLR REG8(IT83XX_GCTRL_BASE+0x37)
#define IT83XX_GCTRL_IVTBAR REG8(IT83XX_GCTRL_BASE+0x41)
#define IT83XX_GCTRL_MCCR2 REG8(IT83XX_GCTRL_BASE+0x44)
+#define IT83XX_GCTRL_SSCR REG8(IT83XX_GCTRL_BASE+0x4A)
#define IT83XX_GCTRL_EWPR0PFH(i) REG8(IT83XX_GCTRL_BASE+0x60+i)
#define IT83XX_GCTRL_EWPR0PFD(i) REG8(IT83XX_GCTRL_BASE+0xA0+i)
#define IT83XX_GCTRL_EWPR0PFEC(i) REG8(IT83XX_GCTRL_BASE+0xC0+i)