diff options
| -rw-r--r-- | chip/npcx/adc.c | 2 | ||||
| -rw-r--r-- | chip/npcx/gpio.c | 28 | ||||
| -rw-r--r-- | chip/npcx/hwtimer.c | 2 | ||||
| -rw-r--r-- | chip/npcx/i2c.c | 8 | ||||
| -rw-r--r-- | chip/npcx/keyboard_raw.c | 2 | ||||
| -rw-r--r-- | chip/npcx/lpc.c | 10 | ||||
| -rw-r--r-- | chip/npcx/peci.c | 2 | ||||
| -rw-r--r-- | chip/npcx/shi.c | 6 | ||||
| -rw-r--r-- | chip/npcx/uart.c | 2 |
9 files changed, 29 insertions, 33 deletions
diff --git a/chip/npcx/adc.c b/chip/npcx/adc.c index ae5e0d22c4..cc89a31e98 100644 --- a/chip/npcx/adc.c +++ b/chip/npcx/adc.c @@ -170,7 +170,7 @@ void adc_interrupt(void) task_wake(task_waiting); } } -DECLARE_IRQ(NPCX_IRQ_ADC, adc_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_ADC, adc_interrupt, 3); /** * ADC initial. diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c index edd9597aad..b5bf0f80c3 100644 --- a/chip/npcx/gpio.c +++ b/chip/npcx/gpio.c @@ -826,26 +826,26 @@ GPIO_IRQ_FUNC(__gpio_wk1f_interrupt , NPCX_IRQ_WKINTF_1); GPIO_IRQ_FUNC(__gpio_wk1g_interrupt , NPCX_IRQ_WKINTG_1); GPIO_IRQ_FUNC(__gpio_wk1h_interrupt , NPCX_IRQ_WKINTH_1); -DECLARE_IRQ(NPCX_IRQ_MTC_WKINTAD_0, __gpio_rtc_interrupt, 1); -DECLARE_IRQ(NPCX_IRQ_TWD_WKINTB_0, __gpio_wk0b_interrupt, 1); -DECLARE_IRQ(NPCX_IRQ_WKINTC_0, __gpio_wk0c_interrupt, 1); -DECLARE_IRQ(NPCX_IRQ_WKINTEFGH_0, __gpio_wk0efgh_interrupt, 1); -DECLARE_IRQ(NPCX_IRQ_WKINTA_1, __gpio_wk1a_interrupt, 1); -DECLARE_IRQ(NPCX_IRQ_WKINTB_1, __gpio_wk1b_interrupt, 1); -DECLARE_IRQ(NPCX_IRQ_WKINTD_1, __gpio_wk1d_interrupt, 1); -DECLARE_IRQ(NPCX_IRQ_WKINTE_1, __gpio_wk1e_interrupt, 1); +DECLARE_IRQ(NPCX_IRQ_MTC_WKINTAD_0, __gpio_rtc_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_TWD_WKINTB_0, __gpio_wk0b_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_WKINTC_0, __gpio_wk0c_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_WKINTEFGH_0, __gpio_wk0efgh_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_WKINTA_1, __gpio_wk1a_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_WKINTB_1, __gpio_wk1b_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_WKINTD_1, __gpio_wk1d_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_WKINTE_1, __gpio_wk1e_interrupt, 2); #ifdef CONFIG_HOSTCMD_SPS /* - * HACK: Make CS GPIO P0 to improve SHI reliability. + * HACK: Make CS GPIO P1 to improve SHI reliability. * TODO: Increase CS-assertion-to-transaction-start delay on host to - * accommodate P1 CS interrupt. + * accommodate P2 CS interrupt. */ -DECLARE_IRQ(NPCX_IRQ_WKINTF_1, __gpio_wk1f_interrupt, 0); -#else DECLARE_IRQ(NPCX_IRQ_WKINTF_1, __gpio_wk1f_interrupt, 1); +#else +DECLARE_IRQ(NPCX_IRQ_WKINTF_1, __gpio_wk1f_interrupt, 2); #endif -DECLARE_IRQ(NPCX_IRQ_WKINTG_1, __gpio_wk1g_interrupt, 1); -DECLARE_IRQ(NPCX_IRQ_WKINTH_1, __gpio_wk1h_interrupt, 1); +DECLARE_IRQ(NPCX_IRQ_WKINTG_1, __gpio_wk1g_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_WKINTH_1, __gpio_wk1h_interrupt, 2); #undef GPIO_IRQ_FUNC diff --git a/chip/npcx/hwtimer.c b/chip/npcx/hwtimer.c index 196fcf985c..753d37f9c5 100644 --- a/chip/npcx/hwtimer.c +++ b/chip/npcx/hwtimer.c @@ -189,7 +189,7 @@ void __hw_clock_event_irq(void) #endif } -DECLARE_IRQ(ITIM16_INT(ITIM_EVENT_NO) , __hw_clock_event_irq, 1); +DECLARE_IRQ(ITIM16_INT(ITIM_EVENT_NO), __hw_clock_event_irq, 2); /*****************************************************************************/ diff --git a/chip/npcx/i2c.c b/chip/npcx/i2c.c index 2f834adcfa..6b01b1f88a 100644 --- a/chip/npcx/i2c.c +++ b/chip/npcx/i2c.c @@ -581,10 +581,10 @@ void i2c1_interrupt(void) { handle_interrupt(1); } void i2c2_interrupt(void) { handle_interrupt(2); } void i2c3_interrupt(void) { handle_interrupt(3); } -DECLARE_IRQ(NPCX_IRQ_SMB1, i2c0_interrupt, 2); -DECLARE_IRQ(NPCX_IRQ_SMB2, i2c1_interrupt, 2); -DECLARE_IRQ(NPCX_IRQ_SMB3, i2c2_interrupt, 2); -DECLARE_IRQ(NPCX_IRQ_SMB4, i2c3_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_SMB1, i2c0_interrupt, 3); +DECLARE_IRQ(NPCX_IRQ_SMB2, i2c1_interrupt, 3); +DECLARE_IRQ(NPCX_IRQ_SMB3, i2c2_interrupt, 3); +DECLARE_IRQ(NPCX_IRQ_SMB4, i2c3_interrupt, 3); /*****************************************************************************/ /* IC specific low-level driver */ diff --git a/chip/npcx/keyboard_raw.c b/chip/npcx/keyboard_raw.c index d68c9b1d45..ddc797815e 100644 --- a/chip/npcx/keyboard_raw.c +++ b/chip/npcx/keyboard_raw.c @@ -146,4 +146,4 @@ void keyboard_raw_interrupt(void) /* Wake the scan task */ task_wake(TASK_ID_KEYSCAN); } -DECLARE_IRQ(NPCX_IRQ_KSI_WKINTC_1, keyboard_raw_interrupt, 3); +DECLARE_IRQ(NPCX_IRQ_KSI_WKINTC_1, keyboard_raw_interrupt, 4); diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c index 27bea78a00..7c37c06da7 100644 --- a/chip/npcx/lpc.c +++ b/chip/npcx/lpc.c @@ -513,7 +513,7 @@ void lpc_kbc_ibf_interrupt(void) CPRINTS("ibf isr %02x", NPCX_HIKMDI); task_wake(TASK_ID_KEYPROTO); } -DECLARE_IRQ(NPCX_IRQ_KBC_IBF, lpc_kbc_ibf_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_KBC_IBF, lpc_kbc_ibf_interrupt, 3); /* KB controller output buffer empty ISR */ void lpc_kbc_obe_interrupt(void) @@ -525,7 +525,7 @@ void lpc_kbc_obe_interrupt(void) CPRINTS("obe isr %02x", NPCX_HIKMST); task_wake(TASK_ID_KEYPROTO); } -DECLARE_IRQ(NPCX_IRQ_KBC_OBE, lpc_kbc_obe_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_KBC_OBE, lpc_kbc_obe_interrupt, 3); #endif /* PM channel input buffer full ISR */ @@ -539,13 +539,13 @@ void lpc_pmc_ibf_interrupt(void) else if (NPCX_HIPMST(PMC_HOST_CMD) & 0x02) handle_host_write((NPCX_HIPMST(PMC_HOST_CMD)&0x08) ? 1 : 0); } -DECLARE_IRQ(NPCX_IRQ_PM_CHAN_IBF, lpc_pmc_ibf_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_PM_CHAN_IBF, lpc_pmc_ibf_interrupt, 3); /* PM channel output buffer empty ISR */ void lpc_pmc_obe_interrupt(void) { } -DECLARE_IRQ(NPCX_IRQ_PM_CHAN_OBE, lpc_pmc_obe_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_PM_CHAN_OBE, lpc_pmc_obe_interrupt, 3); void lpc_port80_interrupt(void) { @@ -562,7 +562,7 @@ void lpc_port80_interrupt(void) /* Clear pending bit of host writing */ SET_BIT(NPCX_DP80STS, 5); } -DECLARE_IRQ(NPCX_IRQ_PORT80, lpc_port80_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_PORT80, lpc_port80_interrupt, 3); /** * Preserve event masks across a sysjump. diff --git a/chip/npcx/peci.c b/chip/npcx/peci.c index 64fcf62a0f..cb3df354e6 100644 --- a/chip/npcx/peci.c +++ b/chip/npcx/peci.c @@ -280,7 +280,7 @@ void peci_done_interrupt(void){ SET_BIT(NPCX_PECI_CTL_STS, NPCX_PECI_CTL_STS_CRC_ERR); SET_BIT(NPCX_PECI_CTL_STS, NPCX_PECI_CTL_STS_ABRT_ERR); } -DECLARE_IRQ(NPCX_IRQ_PECI, peci_done_interrupt, 2); +DECLARE_IRQ(NPCX_IRQ_PECI, peci_done_interrupt, 3); /*****************************************************************************/ /* Console commands */ diff --git a/chip/npcx/shi.c b/chip/npcx/shi.c index 416ebc3902..6cf030cf7c 100644 --- a/chip/npcx/shi.c +++ b/chip/npcx/shi.c @@ -650,11 +650,7 @@ void shi_int_handler(void) log_unexpected_state("IBF"); } } -/* - * The interrupt priority for SHI interrupt should be higher than - * GPIO. Then we could receive CS-deasserted event even in CS-asserted ISR. - */ -DECLARE_IRQ(NPCX_IRQ_SHI, shi_int_handler, 0); +DECLARE_IRQ(NPCX_IRQ_SHI, shi_int_handler, 1); /* Handle an CS assert event on the SHI_CS_L pin */ void shi_cs_event(enum gpio_signal signal) diff --git a/chip/npcx/uart.c b/chip/npcx/uart.c index e92b5d18be..7aa0dacb6d 100644 --- a/chip/npcx/uart.c +++ b/chip/npcx/uart.c @@ -130,7 +130,7 @@ void uart_ec_interrupt(void) uart_process_input(); uart_process_output(); } -DECLARE_IRQ(NPCX_IRQ_UART, uart_ec_interrupt, 1); +DECLARE_IRQ(NPCX_IRQ_UART, uart_ec_interrupt, 0); static void uart_config(void) |