diff options
| -rw-r--r-- | board/storo/board.c | 15 | ||||
| -rw-r--r-- | board/storo/gpio.inc | 2 |
2 files changed, 16 insertions, 1 deletions
diff --git a/board/storo/board.c b/board/storo/board.c index 4b16b077f1..3a3e7ab53d 100644 --- a/board/storo/board.c +++ b/board/storo/board.c @@ -288,6 +288,21 @@ __override void board_ocpc_init(struct ocpc_data *ocpc) ocpc->chg_flags[CHARGER_SECONDARY] |= OCPC_NO_ISYS_MEAS_CAP; } +__override void board_pulse_entering_rw(void) +{ + /* + * On the ITE variants, the EC_ENTERING_RW signal was connected to a pin + * which is active high by default. This causes Cr50 to think that the + * EC has jumped to its RW image even though this may not be the case. + * The pin is changed to GPIO_EC_ENTERING_RW2. + */ + gpio_set_level(GPIO_EC_ENTERING_RW, 1); + gpio_set_level(GPIO_EC_ENTERING_RW2, 1); + usleep(MSEC); + gpio_set_level(GPIO_EC_ENTERING_RW, 0); + gpio_set_level(GPIO_EC_ENTERING_RW2, 0); +} + void board_reset_pd_mcu(void) { /* diff --git a/board/storo/gpio.inc b/board/storo/gpio.inc index 00a3e94289..fa805e03b4 100644 --- a/board/storo/gpio.inc +++ b/board/storo/gpio.inc @@ -89,6 +89,7 @@ GPIO(EC_AP_MKBP_INT_L, PIN(L, 5), GPIO_ODR_HIGH) /* Misc */ GPIO(EN_BL_OD, PIN(K, 4), GPIO_ODR_LOW) GPIO(EC_ENTERING_RW, PIN(G, 0), GPIO_OUT_LOW) +GPIO(EC_ENTERING_RW2, PIN(C, 7), GPIO_OUT_LOW) GPIO(CCD_MODE_ODL, PIN(H, 5), GPIO_INPUT) GPIO(EC_BATTERY_PRES_ODL, PIN(I, 4), GPIO_INPUT) GPIO(EN_PP3300_PEN, PIN(B, 5), GPIO_OUT_LOW) @@ -104,7 +105,6 @@ GPIO(GPIOC0_NC, PIN(C, 0), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIOC3_NC, PIN(C, 3), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIOC4_NC, PIN(C, 4), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIOC6_NC, PIN(C, 6), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(GPIOC7_NC, PIN(C, 7), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIOF0_NC, PIN(F, 0), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIOF1_NC, PIN(F, 1), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIOF4_NC, PIN(F, 4), GPIO_INPUT | GPIO_PULL_DOWN) |