diff options
36 files changed, 63 insertions, 70 deletions
diff --git a/board/cyan/board.h b/board/cyan/board.h index 4425d01c8c..da54191bf4 100644 --- a/board/cyan/board.h +++ b/board/cyan/board.h @@ -46,7 +46,7 @@ #define CONFIG_SPI_FLASH_PORT 1 #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_SIZE 524288 +#define CONFIG_FLASH_SIZE 524288 /* TODO: Add flash protect support for the SPI part cyan actually has */ #define CONFIG_SPI_FLASH_W25X40 diff --git a/board/glados/board.h b/board/glados/board.h index f2b1dc0434..bbbf7c111e 100644 --- a/board/glados/board.h +++ b/board/glados/board.h @@ -66,7 +66,7 @@ #define CONFIG_SPI_FLASH_PORT 1 #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_SIZE 524288 +#define CONFIG_FLASH_SIZE 524288 #define CONFIG_SPI_FLASH_W25Q64 #define CONFIG_TEMP_SENSOR diff --git a/board/glower/board.h b/board/glower/board.h index 5a1179bd31..4895da7032 100644 --- a/board/glower/board.h +++ b/board/glower/board.h @@ -52,7 +52,7 @@ #define CONFIG_CLOCK_CRYSTAL /* 512kb SPI flash */ -#define CONFIG_SPI_FLASH_SIZE 0x00080000 +#define CONFIG_FLASH_SIZE 0x00080000 #define CONFIG_SPI_FLASH_W25X40 #define CONFIG_SPI_FLASH_PORT 1 diff --git a/board/hoho/board.h b/board/hoho/board.h index 90256ea7a7..eaa1803f61 100644 --- a/board/hoho/board.h +++ b/board/hoho/board.h @@ -26,7 +26,6 @@ /* TODO(tbroch) Re-enable once STM spi master can be inhibited at boot so it doesn't interfere with HDMI loading its f/w */ #undef CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_SIZE 1048576 #define CONFIG_SPI_MASTER_PORT 2 #define CONFIG_SPI_CS_GPIO GPIO_PD_MCDP_SPI_CS_L #define CONFIG_USB diff --git a/board/kunimitsu/board.h b/board/kunimitsu/board.h index 21770782ab..e2421e1b24 100644 --- a/board/kunimitsu/board.h +++ b/board/kunimitsu/board.h @@ -75,7 +75,7 @@ #define CONFIG_SPI_FLASH_PORT 1 #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_SIZE 524288 +#define CONFIG_FLASH_SIZE 524288 #define CONFIG_SPI_FLASH_W25Q64 #define CONFIG_TEMP_SENSOR diff --git a/board/mec1322_evb/board.h b/board/mec1322_evb/board.h index 4c566e7e9e..58858de785 100644 --- a/board/mec1322_evb/board.h +++ b/board/mec1322_evb/board.h @@ -13,7 +13,7 @@ #define CONFIG_WATCHDOG_HELP #define CONFIG_FANS 1 #define CONFIG_ADC -#define CONFIG_SPI_FLASH_SIZE 0x00800000 +#define CONFIG_FLASH_SIZE 0x00800000 #define CONFIG_SPI_FLASH_W25Q64 #define CONFIG_SPI_FLASH_PORT 0 diff --git a/board/npcx_evb/board.h b/board/npcx_evb/board.h index bebdbb6a11..fd0ff65e75 100644 --- a/board/npcx_evb/board.h +++ b/board/npcx_evb/board.h @@ -19,7 +19,7 @@ #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */ #define CONFIG_SPI_FLASH_PORT 0 #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_SIZE 0x00800000 /* 8MB spi flash */ +#define CONFIG_FLASH_SIZE 0x00800000 /* 8MB spi flash */ #define CONFIG_SPI_FLASH_W25Q64 #define CONFIG_KEYBOARD_BOARD_CONFIG #define CONFIG_KEYBOARD_PROTOCOL_8042 diff --git a/board/npcx_evb_arm/board.h b/board/npcx_evb_arm/board.h index e9ccaea25b..1a8c85ea93 100644 --- a/board/npcx_evb_arm/board.h +++ b/board/npcx_evb_arm/board.h @@ -15,7 +15,7 @@ /* Optional features */ #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */ -#define CONFIG_SPI_FLASH_SIZE 0x00800000 /* 8MB spi flash */ +#define CONFIG_FLASH_SIZE 0x00800000 /* 8MB spi flash */ #define CONFIG_SPI_FLASH_W25Q64 #define CONFIG_KEYBOARD_BOARD_CONFIG #define CONFIG_KEYBOARD_PROTOCOL_MKBP /* Instead of 8042 protocol of keyboard */ diff --git a/board/strago/board.h b/board/strago/board.h index 5939013fe7..71f1b8fb2a 100644 --- a/board/strago/board.h +++ b/board/strago/board.h @@ -49,7 +49,7 @@ #define CONFIG_SPI_FLASH_PORT 1 #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_SIZE 524288 +#define CONFIG_FLASH_SIZE 524288 #define CONFIG_SPI_FLASH_W25Q64 #define CONFIG_USB_PORT_POWER_SMART diff --git a/chip/g/config_chip.h b/chip/g/config_chip.h index 1935378ba5..c2a75ce030 100644 --- a/chip/g/config_chip.h +++ b/chip/g/config_chip.h @@ -24,7 +24,7 @@ /* Describe the flash layout */ #define CONFIG_PROGRAM_MEMORY_BASE 0x40000 -#define CONFIG_FLASH_PHYSICAL_SIZE (512 * 1024) +#define CONFIG_FLASH_SIZE (512 * 1024) /* Compute the rest of the flash params from these */ #include "config_std_internal_flash.h" diff --git a/chip/host/config_chip.h b/chip/host/config_chip.h index eaaf46287f..4c8dc7fb75 100644 --- a/chip/host/config_chip.h +++ b/chip/host/config_chip.h @@ -9,8 +9,8 @@ #define __CROS_EC_CONFIG_CHIP_H /* Memory mapping */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000 -extern char __host_flash[CONFIG_FLASH_PHYSICAL_SIZE]; +#define CONFIG_FLASH_SIZE 0x00020000 +extern char __host_flash[CONFIG_FLASH_SIZE]; #define CONFIG_PROGRAM_MEMORY_BASE ((uintptr_t)__host_flash) #define CONFIG_FLASH_BANK_SIZE 0x1000 diff --git a/chip/host/flash.c b/chip/host/flash.c index 77639218aa..b83d72ff5f 100644 --- a/chip/host/flash.c +++ b/chip/host/flash.c @@ -12,7 +12,7 @@ #include "persistence.h" #include "util.h" -char __host_flash[CONFIG_FLASH_PHYSICAL_SIZE]; +char __host_flash[CONFIG_FLASH_SIZE]; uint8_t __host_flash_protect[PHYSICAL_BANKS]; /* Override this function to make flash erase/write operation fail */ diff --git a/chip/it83xx/config_chip.h b/chip/it83xx/config_chip.h index 5115e62c24..1d88e7df4f 100644 --- a/chip/it83xx/config_chip.h +++ b/chip/it83xx/config_chip.h @@ -59,7 +59,7 @@ * in order to emulate per-bank write-protection UNTIL REBOOT. The hardware * doesn't support a write-protect pin, and if we make the write-protection * permanent, it can't be undone easily enough to support RMA. */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000 +#define CONFIG_FLASH_SIZE 0x00040000 /****************************************************************************/ /* Define our flash layout. */ diff --git a/chip/it83xx/flash.c b/chip/it83xx/flash.c index 5155e94332..54e2bc650f 100644 --- a/chip/it83xx/flash.c +++ b/chip/it83xx/flash.c @@ -283,7 +283,7 @@ static enum flash_wp_status flash_check_wp(void) enum flash_wp_status wp_status; int all_bank_count, bank; - all_bank_count = CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE; + all_bank_count = CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE; for (bank = 0; bank < all_bank_count; bank++) { if (!(IT83XX_GCTRL_EWPR0PFEC(FWP_REG(bank)) & FWP_MASK(bank))) @@ -430,7 +430,7 @@ int flash_physical_protect_now(int all) if (all) { /* Protect the entire flash */ flash_protect_banks(0, - CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE, + CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE, FLASH_WP_EC); all_protected = 1; } else { @@ -572,11 +572,11 @@ int flash_pre_init(void) if (prot_flags & EC_FLASH_PROTECT_GPIO_ASSERTED) { /* Protect the entire flash of host interface */ flash_protect_banks(0, - CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE, + CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE, FLASH_WP_HOST); /* Protect the entire flash of DBGR interface */ flash_protect_banks(0, - CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE, + CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE, FLASH_WP_DBGR); /* * Write protect is asserted. If we want RO flash protected, diff --git a/chip/lm4/config_chip.h b/chip/lm4/config_chip.h index 65c3f07889..80b653274d 100644 --- a/chip/lm4/config_chip.h +++ b/chip/lm4/config_chip.h @@ -64,7 +64,7 @@ * in order to emulate per-bank write-protection UNTIL REBOOT. The hardware * doesn't support a write-protect pin, and if we make the write-protection * permanent, it can't be undone easily enough to support RMA. */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000 +#define CONFIG_FLASH_SIZE 0x00040000 /****************************************************************************/ /* Define our flash layout. */ diff --git a/chip/lm4/flash.c b/chip/lm4/flash.c index 6a5634f5b3..1c8da9b26a 100644 --- a/chip/lm4/flash.c +++ b/chip/lm4/flash.c @@ -193,7 +193,7 @@ int flash_physical_protect_now(int all) if (all) { /* Protect the entire flash */ all_protected = 1; - protect_banks(0, CONFIG_FLASH_PHYSICAL_SIZE / + protect_banks(0, CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE); } else /* Protect the WP region (read-only section and pstate) */ diff --git a/chip/mec1322/config_flash_layout.h b/chip/mec1322/config_flash_layout.h index 6b037df6d0..4822329ae3 100644 --- a/chip/mec1322/config_flash_layout.h +++ b/chip/mec1322/config_flash_layout.h @@ -21,9 +21,9 @@ #define CONFIG_SPI_FLASH /* EC region of SPI resides at end of ROM, protected region follows writable */ -#define CONFIG_EC_PROTECTED_STORAGE_OFF (CONFIG_SPI_FLASH_SIZE - 0x20000) +#define CONFIG_EC_PROTECTED_STORAGE_OFF (CONFIG_FLASH_SIZE - 0x20000) #define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x20000 -#define CONFIG_EC_WRITABLE_STORAGE_OFF (CONFIG_SPI_FLASH_SIZE - 0x40000) +#define CONFIG_EC_WRITABLE_STORAGE_OFF (CONFIG_FLASH_SIZE - 0x40000) #define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x20000 @@ -31,9 +31,6 @@ #ifndef CONFIG_FW_IMAGE_SIZE #define CONFIG_FW_IMAGE_SIZE (96 * 1024) #endif -/* redundant..*/ -#define CONFIG_FLASH_PHYSICAL_SIZE CONFIG_SPI_FLASH_SIZE -#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE /* Loader resides at the beginning of program memory */ #define CONFIG_LOADER_MEM_OFF 0 diff --git a/chip/mec1322/lfw/ec_lfw.c b/chip/mec1322/lfw/ec_lfw.c index 87940ad2f7..8dffa6da72 100644 --- a/chip/mec1322/lfw/ec_lfw.c +++ b/chip/mec1322/lfw/ec_lfw.c @@ -83,7 +83,7 @@ static int spi_flash_readloc(uint8_t *buf_usr, (offset >> 8) & 0xFF, offset & 0xFF}; - if (offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; return spi_transaction(SPI_FLASH_DEVICE, cmd, 4, buf_usr, bytes); diff --git a/chip/npcx/config_chip.h b/chip/npcx/config_chip.h index 17e366ccfd..2e99987a5f 100644 --- a/chip/npcx/config_chip.h +++ b/chip/npcx/config_chip.h @@ -74,8 +74,6 @@ #define CONFIG_FLASH_WRITE_SIZE 0x00000001 /* minimum write size */ #define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */ -/* 128 KB alignment for SPI status registers protection */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x40000 /* 256 KB Flash used for EC */ #include "config_flash_layout.h" diff --git a/chip/npcx/config_flash_layout.h b/chip/npcx/config_flash_layout.h index efdfdf171e..5d296c4836 100644 --- a/chip/npcx/config_flash_layout.h +++ b/chip/npcx/config_flash_layout.h @@ -20,14 +20,20 @@ #define CONFIG_MAPPED_STORAGE_BASE 0x64000000 #undef CONFIG_FLASH_PSTATE -#define CONFIG_EC_PROTECTED_STORAGE_OFF (CONFIG_SPI_FLASH_SIZE - 0x40000) +/* + * On NPCX, the first 256KB of external SPI storage belongs to the EC, + * regardless of the actual size of external SPI. + */ +#define NPCX_EC_FLASH_SIZE 0x40000 + +#define CONFIG_EC_PROTECTED_STORAGE_OFF 0 #define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x20000 -#define CONFIG_EC_WRITABLE_STORAGE_OFF (CONFIG_SPI_FLASH_SIZE - 0x20000) +#define CONFIG_EC_WRITABLE_STORAGE_OFF 0x20000 #define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x20000 /* Size of one firmware image in flash */ #ifndef CONFIG_FW_IMAGE_SIZE -#define CONFIG_FW_IMAGE_SIZE (CONFIG_FLASH_PHYSICAL_SIZE / 2) +#define CONFIG_FW_IMAGE_SIZE (96 * 1024) /* 96 KB for FW images */ #endif /* Header support which is used by booter to copy FW from flash to code ram */ @@ -40,12 +46,11 @@ /* RO firmware offset in flash */ #define CONFIG_RO_MEM_OFF CONFIG_RO_HDR_SIZE -#define CONFIG_RO_SIZE (96 * 1024) /* 96KB for RO FW */ -#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE +#define CONFIG_RO_SIZE CONFIG_FW_IMAGE_SIZE /* RW firmware offset in flash */ #define CONFIG_RW_MEM_OFF CONFIG_RW_STORAGE_OFF -#define CONFIG_RW_SIZE (96 * 1024) /* 96KB for RW FW */ +#define CONFIG_RW_SIZE CONFIG_FW_IMAGE_SIZE /* The storage offset of ec.R*.flat which is used for CONFIG_CDRAM_ARCH */ #define CONFIG_RO_STORAGE_OFF CONFIG_RO_HDR_SIZE diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c index 2bdcefe8a2..9a043f67ab 100644 --- a/chip/npcx/flash.c +++ b/chip/npcx/flash.c @@ -211,12 +211,12 @@ static int reg_to_protect(uint8_t sr1, uint8_t sr2, unsigned int *start, /* Determine bottom/top of memory to protect */ *start = tb ? 0 : - (CONFIG_FLASH_SIZE - *len) % CONFIG_FLASH_SIZE; + (NPCX_EC_FLASH_SIZE - *len) % NPCX_EC_FLASH_SIZE; /* Reverse computations if complement set */ if (cmp) { - *start = (*start + *len) % CONFIG_FLASH_SIZE; - *len = CONFIG_FLASH_SIZE - *len; + *start = (*start + *len) % NPCX_EC_FLASH_SIZE; + *len = NPCX_EC_FLASH_SIZE - *len; } /* @@ -261,19 +261,19 @@ static int protect_to_reg(unsigned int start, unsigned int len, return EC_ERROR_INVAL; /* Invalid data */ - if ((start && !len) || start + len > CONFIG_FLASH_SIZE) + if ((start && !len) || start + len > NPCX_EC_FLASH_SIZE) return EC_ERROR_INVAL; /* Set complement bit based on whether length is power of 2 */ if ((len & (len - 1)) != 0) { cmp = 1; - start = (start + len) % CONFIG_FLASH_SIZE; - len = CONFIG_FLASH_SIZE - len; + start = (start + len) % NPCX_EC_FLASH_SIZE; + len = NPCX_EC_FLASH_SIZE - len; } /* Set bottom/top bit based on start address */ - /* Do not set if len == 0 or len == CONFIG_FLASH_SIZE */ - if (!start && (len % CONFIG_FLASH_SIZE)) + /* Do not set if len == 0 or len == NPCX_EC_FLASH_SIZE */ + if (!start && (len % NPCX_EC_FLASH_SIZE)) tb = 1; /* Set sector bit and determine block length based on protect length */ @@ -333,7 +333,7 @@ int flash_set_status_for_prot(int reg1, int reg2) int flash_check_prot_range(unsigned int offset, unsigned int bytes) { /* Invalid value */ - if (offset + bytes > CONFIG_FLASH_PHYSICAL_SIZE) + if (offset + bytes > NPCX_EC_FLASH_SIZE) return EC_ERROR_INVAL; /* Check if ranges overlap */ if (MAX(addr_prot_start, offset) < MIN(addr_prot_start + @@ -354,7 +354,7 @@ int flash_check_prot_reg(unsigned int offset, unsigned int bytes) sr2 = flash_get_status2(); /* Invalid value */ - if (offset + bytes > CONFIG_FLASH_PHYSICAL_SIZE) + if (offset + bytes > NPCX_EC_FLASH_SIZE) return EC_ERROR_INVAL; /* Compute current protect range */ @@ -377,7 +377,7 @@ int flash_write_prot_reg(unsigned int offset, unsigned int bytes) uint8_t sr2 = flash_get_status2(); /* Invalid values */ - if (offset + bytes > CONFIG_FLASH_SIZE) + if (offset + bytes > NPCX_EC_FLASH_SIZE) return EC_ERROR_INVAL; /* Compute desired protect range */ diff --git a/chip/nrf51/config_chip.h b/chip/nrf51/config_chip.h index 6f17b59b98..cade6fed97 100644 --- a/chip/nrf51/config_chip.h +++ b/chip/nrf51/config_chip.h @@ -40,7 +40,7 @@ /* Flash mapping */ #define CONFIG_PROGRAM_MEMORY_BASE 0x00000000 -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000 +#define CONFIG_FLASH_SIZE 0x00040000 #define CONFIG_FLASH_BANK_SIZE 0x1000 #include "config_std_internal_flash.h" diff --git a/chip/stm32/config-stm32f03x.h b/chip/stm32/config-stm32f03x.h index 3cb6e955bd..c22855f046 100644 --- a/chip/stm32/config-stm32f03x.h +++ b/chip/stm32/config-stm32f03x.h @@ -4,7 +4,7 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00008000 +#define CONFIG_FLASH_SIZE 0x00008000 #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0400 /* erase bank size */ #define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ diff --git a/chip/stm32/config-stm32f05x.h b/chip/stm32/config-stm32f05x.h index e312e61cfd..648347879a 100644 --- a/chip/stm32/config-stm32f05x.h +++ b/chip/stm32/config-stm32f05x.h @@ -4,7 +4,7 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_PHYSICAL_SIZE (64 * 1024) +#define CONFIG_FLASH_SIZE (64 * 1024) #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ #define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ diff --git a/chip/stm32/config-stm32f07x.h b/chip/stm32/config-stm32f07x.h index 07e50d8d32..b530c564e0 100644 --- a/chip/stm32/config-stm32f07x.h +++ b/chip/stm32/config-stm32f07x.h @@ -4,7 +4,7 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_PHYSICAL_SIZE (128 * 1024) +#define CONFIG_FLASH_SIZE (128 * 1024) #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ #define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ diff --git a/chip/stm32/config-stm32f09x.h b/chip/stm32/config-stm32f09x.h index 29a0cd248b..cfd57e1bf9 100644 --- a/chip/stm32/config-stm32f09x.h +++ b/chip/stm32/config-stm32f09x.h @@ -4,7 +4,7 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000 +#define CONFIG_FLASH_SIZE 0x00040000 #define CONFIG_FLASH_BANK_SIZE 0x2000 #define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ #define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ diff --git a/chip/stm32/config-stm32f373.h b/chip/stm32/config-stm32f373.h index eca9bf58f8..b77b1d98a6 100644 --- a/chip/stm32/config-stm32f373.h +++ b/chip/stm32/config-stm32f373.h @@ -4,7 +4,7 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000 +#define CONFIG_FLASH_SIZE 0x00040000 #define CONFIG_FLASH_BANK_SIZE 0x2000 #define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ #define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ diff --git a/chip/stm32/config-stm32l100.h b/chip/stm32/config-stm32l100.h index 2e4f10ad6e..28e2f39068 100644 --- a/chip/stm32/config-stm32l100.h +++ b/chip/stm32/config-stm32l100.h @@ -4,7 +4,7 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000 +#define CONFIG_FLASH_SIZE 0x00020000 #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0100 /* erase bank size */ diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h index 480a0dcbee..1c599d9de7 100644 --- a/chip/stm32/config-stm32l15x.h +++ b/chip/stm32/config-stm32l15x.h @@ -4,7 +4,7 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000 +#define CONFIG_FLASH_SIZE 0x00020000 #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0100 /* erase bank size */ diff --git a/chip/stm32/config-stm32ts60.h b/chip/stm32/config-stm32ts60.h index fc6375f20d..e284b0aa7c 100644 --- a/chip/stm32/config-stm32ts60.h +++ b/chip/stm32/config-stm32ts60.h @@ -4,7 +4,7 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x0010000 /* Actually 0x8000 */ +#define CONFIG_FLASH_SIZE 0x8000 #define CONFIG_FLASH_BANK_SIZE 0x1000 /* TODO */ #define CONFIG_FLASH_ERASE_SIZE 0x0400 /* TODO erase bank size */ #define CONFIG_FLASH_WRITE_SIZE 0x0002 /* TODO minimum write size */ diff --git a/common/flash.c b/common/flash.c index 72dbe35843..ca07800ba7 100644 --- a/common/flash.c +++ b/common/flash.c @@ -538,7 +538,6 @@ static int command_flash_info(int argc, char **argv) { int i; - ccprintf("Physical:%4d KB\n", CONFIG_FLASH_PHYSICAL_SIZE / 1024); ccprintf("Usable: %4d KB\n", CONFIG_FLASH_SIZE / 1024); ccprintf("Write: %4d B (ideal %d B)\n", CONFIG_FLASH_WRITE_SIZE, CONFIG_FLASH_WRITE_IDEAL_SIZE); @@ -565,7 +564,7 @@ static int command_flash_info(int argc, char **argv) ccputs("\n"); ccputs("Protected now:"); - for (i = 0; i < CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE; + for (i = 0; i < CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE; i++) { if (!(i & 31)) ccputs("\n "); diff --git a/common/spi_flash.c b/common/spi_flash.c index 2407f9120d..248e401195 100644 --- a/common/spi_flash.c +++ b/common/spi_flash.c @@ -155,7 +155,7 @@ int spi_flash_read(uint8_t *buf_usr, unsigned int offset, unsigned int bytes) (offset >> 8) & 0xFF, offset & 0xFF}; - if (offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; return spi_transaction(SPI_FLASH_DEVICE, cmd, 4, buf_usr, bytes); @@ -218,7 +218,7 @@ int spi_flash_erase(unsigned int offset, unsigned int bytes) int rv = EC_SUCCESS; /* Invalid input */ - if (offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; /* Not aligned to sector (4kb) */ @@ -266,7 +266,7 @@ int spi_flash_write(unsigned int offset, unsigned int bytes, int rv, write_size; /* Invalid input */ - if (!data || offset + bytes > CONFIG_SPI_FLASH_SIZE || + if (!data || offset + bytes > CONFIG_FLASH_SIZE || bytes > SPI_FLASH_MAX_WRITE_SIZE) return EC_ERROR_INVAL; @@ -414,7 +414,7 @@ int spi_flash_check_protect(unsigned int offset, unsigned int bytes) int rv = EC_SUCCESS; /* Invalid value */ - if (sr1 == -1 || sr2 == -1 || offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (sr1 == -1 || sr2 == -1 || offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; /* Compute current protect range */ @@ -445,7 +445,7 @@ int spi_flash_set_protect(unsigned int offset, unsigned int bytes) uint8_t sr2 = spi_flash_get_status2(); /* Invalid values */ - if (sr1 == -1 || sr2 == -1 || offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (sr1 == -1 || sr2 == -1 || offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; /* Compute desired protect range */ @@ -592,7 +592,7 @@ static int command_spi_flashread(int argc, char **argv) spi_enable(CONFIG_SPI_FLASH_PORT, 1); /* Can't read past size of memory */ - if (offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; /* Wait for previous operation to complete */ diff --git a/common/spi_flash_reg.c b/common/spi_flash_reg.c index 9ee814bbe3..00041fb099 100644 --- a/common/spi_flash_reg.c +++ b/common/spi_flash_reg.c @@ -144,7 +144,7 @@ int spi_flash_protect_to_reg(unsigned int start, unsigned int len, uint8_t *sr1, return EC_ERROR_INVAL; /* Invalid data */ - if ((start && !len) || start + len > CONFIG_SPI_FLASH_SIZE) + if ((start && !len) || start + len > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; for (i = 0; i < ARRAY_SIZE(spi_flash_protect_ranges); ++i) { diff --git a/include/config.h b/include/config.h index c903a92758..6cd20f3ca8 100644 --- a/include/config.h +++ b/include/config.h @@ -705,7 +705,6 @@ */ #undef CONFIG_MAPPED_STORAGE_BASE -#undef CONFIG_FLASH_PHYSICAL_SIZE #undef CONFIG_FLASH_PROTECT_NEXT_BOOT /* @@ -1440,9 +1439,6 @@ /* SPI flash part supports SR2 register */ #undef CONFIG_SPI_FLASH_HAS_SR2 -/* Size (bytes) of SPI flash memory */ -#undef CONFIG_SPI_FLASH_SIZE - /* SPI master feature */ #undef CONFIG_SPI_MASTER diff --git a/include/config_std_internal_flash.h b/include/config_std_internal_flash.h index 35561a59da..ad97110547 100644 --- a/include/config_std_internal_flash.h +++ b/include/config_std_internal_flash.h @@ -48,9 +48,8 @@ #define CONFIG_FW_PSTATE_OFF (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE) /* Size of one firmware image in flash */ -#define CONFIG_FW_IMAGE_SIZE ((CONFIG_FLASH_PHYSICAL_SIZE - \ +#define CONFIG_FW_IMAGE_SIZE ((CONFIG_FLASH_SIZE - \ CONFIG_SHAREDLIB_SIZE) / 2) -#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE /* * By default, there is no shared objects library. However, if configured, the diff --git a/include/flash.h b/include/flash.h index 6117d30025..8d5d1b1c06 100644 --- a/include/flash.h +++ b/include/flash.h @@ -12,7 +12,7 @@ #include "ec_commands.h" /* For EC_FLASH_PROTECT_* flags */ /* Number of physical flash banks */ -#define PHYSICAL_BANKS (CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE) +#define PHYSICAL_BANKS (CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE) /*WP region offset and size in units of flash banks */ #define WP_BANK_OFFSET (CONFIG_WP_STORAGE_OFF / CONFIG_FLASH_BANK_SIZE) |