diff options
| -rw-r--r-- | board/glimmer/board.c | 200 | ||||
| -rw-r--r-- | board/glimmer/board.h | 179 | ||||
| -rw-r--r-- | board/glimmer/build.mk | 12 | ||||
| -rw-r--r-- | board/glimmer/ec.tasklist | 29 | ||||
| -rw-r--r-- | chip/lm4/openocd/lm4x_cmds.tcl | 12 | ||||
| -rwxr-xr-x | util/flash_ec | 2 |
6 files changed, 433 insertions, 1 deletions
diff --git a/board/glimmer/board.c b/board/glimmer/board.c new file mode 100644 index 0000000000..c1265bc50d --- /dev/null +++ b/board/glimmer/board.c @@ -0,0 +1,200 @@ +/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* EC for Glimmer board configuration */ + +#include "adc.h" +#include "adc_chip.h" +#include "backlight.h" +#include "common.h" +#include "driver/temp_sensor/tmp432.h" +#include "extpower.h" +#include "gpio.h" +#include "host_command.h" +#include "i2c.h" +#include "jtag.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "peci.h" +#include "power.h" +#include "power_button.h" +#include "pwm.h" +#include "pwm_chip.h" +#include "registers.h" +#include "switch.h" +#include "temp_sensor.h" +#include "temp_sensor_chip.h" +#include "thermal.h" +#include "timer.h" +#include "uart.h" +#include "util.h" + +/* GPIO signal list. Must match order from enum gpio_signal. */ +const struct gpio_info gpio_list[] = { + /* Inputs with interrupt handlers are first for efficiency */ + {"POWER_BUTTON_L", LM4_GPIO_A, (1<<2), GPIO_INT_BOTH_DSLEEP, + power_button_interrupt}, + {"LID_OPEN", LM4_GPIO_A, (1<<3), GPIO_INT_BOTH_DSLEEP, + lid_interrupt}, + {"AC_PRESENT", LM4_GPIO_H, (1<<3), GPIO_INT_BOTH_DSLEEP, + extpower_interrupt}, + {"PCH_SLP_S3_L", LM4_GPIO_G, (1<<7), GPIO_INT_BOTH_DSLEEP | + GPIO_PULL_UP, + power_signal_interrupt}, + {"PCH_SLP_S4_L", LM4_GPIO_H, (1<<1), GPIO_INT_BOTH_DSLEEP | + GPIO_PULL_UP, + power_signal_interrupt}, + {"PP1050_PGOOD", LM4_GPIO_H, (1<<4), GPIO_INT_BOTH, + power_signal_interrupt}, + {"PP3300_PCH_PGOOD", LM4_GPIO_C, (1<<4), GPIO_INT_BOTH, + power_signal_interrupt}, + {"PP5000_PGOOD", LM4_GPIO_N, (1<<0), GPIO_INT_BOTH, + power_signal_interrupt}, + {"S5_PGOOD", LM4_GPIO_G, (1<<0), GPIO_INT_BOTH, + power_signal_interrupt}, + {"VCORE_PGOOD", LM4_GPIO_C, (1<<6), GPIO_INT_BOTH, + power_signal_interrupt}, + {"WP_L", LM4_GPIO_A, (1<<4), GPIO_INT_BOTH, + switch_interrupt}, + {"JTAG_TCK", LM4_GPIO_C, (1<<0), GPIO_DEFAULT, + jtag_interrupt}, + {"UART0_RX", LM4_GPIO_A, (1<<0), GPIO_INT_BOTH_DSLEEP | + GPIO_PULL_UP, + uart_deepsleep_interrupt}, + + /* Other inputs */ + {"BOARD_VERSION1", LM4_GPIO_Q, (1<<5), GPIO_INPUT, NULL}, + {"BOARD_VERSION2", LM4_GPIO_Q, (1<<6), GPIO_INPUT, NULL}, + {"BOARD_VERSION3", LM4_GPIO_Q, (1<<7), GPIO_INPUT, NULL}, + {"PCH_SLP_SX_L", LM4_GPIO_G, (1<<3), GPIO_INPUT|GPIO_PULL_UP, + NULL}, + {"PCH_SUS_STAT_L", LM4_GPIO_G, (1<<6), GPIO_INPUT|GPIO_PULL_UP, + NULL}, + {"PCH_SUSPWRDNACK", LM4_GPIO_G, (1<<2), GPIO_INPUT|GPIO_PULL_UP, + NULL}, + {"PP1000_S0IX_PGOOD", LM4_GPIO_H, (1<<6), GPIO_INPUT, NULL}, + {"USB1_OC_L", LM4_GPIO_E, (1<<7), GPIO_INPUT, NULL}, + {"USB2_OC_L", LM4_GPIO_E, (1<<0), GPIO_INPUT, NULL}, + + /* Outputs; all unasserted by default except for reset signals */ + {"CPU_PROCHOT", LM4_GPIO_B, (1<<5), GPIO_OUT_LOW, NULL}, + {"ENABLE_BACKLIGHT", LM4_GPIO_M, (1<<7), GPIO_ODR_HIGH, NULL}, + {"ENABLE_TOUCHPAD", LM4_GPIO_N, (1<<1), GPIO_OUT_LOW, NULL}, + {"ENTERING_RW", LM4_GPIO_D, (1<<6), GPIO_OUT_LOW, NULL}, + {"LPC_CLKRUN_L", LM4_GPIO_M, (1<<2), GPIO_ODR_HIGH, NULL}, + {"PCH_CORE_PWROK", LM4_GPIO_F, (1<<5), GPIO_OUT_LOW, NULL}, + {"PCH_PWRBTN_L", LM4_GPIO_H, (1<<0), GPIO_ODR_HIGH, NULL}, + {"PCH_RCIN_L", LM4_GPIO_F, (1<<3), GPIO_ODR_HIGH, NULL}, + {"PCH_RSMRST_L", LM4_GPIO_F, (1<<1), GPIO_OUT_LOW, NULL}, + {"PCH_SMI_L", LM4_GPIO_F, (1<<4), GPIO_ODR_HIGH, NULL}, + {"PCH_SOC_OVERRIDE", LM4_GPIO_G, (1<<1), GPIO_OUT_LOW, NULL}, + {"PCH_SYS_PWROK", LM4_GPIO_J, (1<<1), GPIO_OUT_LOW, NULL}, + {"PCH_WAKE_L", LM4_GPIO_F, (1<<0), GPIO_ODR_HIGH, NULL}, + {"PP1350_EN", LM4_GPIO_H, (1<<5), GPIO_OUT_LOW, NULL}, + {"PP3300_DX_EN", LM4_GPIO_J, (1<<2), GPIO_OUT_LOW, NULL}, + {"PP3300_LTE_EN", LM4_GPIO_D, (1<<4), GPIO_OUT_LOW, NULL}, + {"PP3300_WLAN_EN", LM4_GPIO_J, (1<<0), GPIO_OUT_LOW, NULL}, + {"PP5000_EN", LM4_GPIO_H, (1<<7), GPIO_OUT_LOW, NULL}, + {"PPSX_EN", LM4_GPIO_L, (1<<6), GPIO_OUT_LOW, NULL}, + {"SUSP_VR_EN", LM4_GPIO_C, (1<<7), GPIO_OUT_LOW, NULL}, + {"TOUCHSCREEN_RESET_L", LM4_GPIO_N, (1<<7), GPIO_OUT_LOW, NULL}, + {"USB_CTL1", LM4_GPIO_E, (1<<6), GPIO_OUT_LOW, NULL}, + {"USB_ILIM_SEL", LM4_GPIO_E, (1<<5), GPIO_OUT_LOW, NULL}, + {"USB1_ENABLE", LM4_GPIO_E, (1<<4), GPIO_OUT_LOW, NULL}, + {"USB2_ENABLE", LM4_GPIO_D, (1<<5), GPIO_OUT_LOW, NULL}, + {"VCORE_EN", LM4_GPIO_C, (1<<5), GPIO_OUT_LOW, NULL}, + {"WLAN_OFF_L", LM4_GPIO_J, (1<<4), GPIO_OUT_LOW, NULL}, + {"PCH_SCI_L", LM4_GPIO_M, (1<<1), GPIO_ODR_HIGH, NULL}, + {"KBD_IRQ_L", LM4_GPIO_M, (1<<3), GPIO_ODR_HIGH, NULL}, +}; +BUILD_ASSERT(ARRAY_SIZE(gpio_list) == GPIO_COUNT); + +/* Pins with alternate functions */ +const struct gpio_alt_func gpio_alt_funcs[] = { + {GPIO_A, 0x03, 1, MODULE_UART}, /* UART0 */ + {GPIO_B, 0x04, 3, MODULE_I2C}, /* I2C0 SCL */ + {GPIO_B, 0x08, 3, MODULE_I2C, GPIO_OPEN_DRAIN}, /* I2C0 SDA */ + {GPIO_B, 0x40, 3, MODULE_I2C}, /* I2C5 SCL */ + {GPIO_B, 0x80, 3, MODULE_I2C, GPIO_OPEN_DRAIN}, /* I2C5 SDA */ + {GPIO_D, 0x0f, 2, MODULE_SPI}, /* SPI1 */ + {GPIO_L, 0x3f, 15, MODULE_LPC}, /* LPC */ + {GPIO_M, 0x21, 15, MODULE_LPC}, /* LPC */ + {GPIO_N, 0x50, 1, MODULE_PWM_LED, GPIO_OPEN_DRAIN}, /* FAN0PWM 3&4 */ +}; +const int gpio_alt_funcs_count = ARRAY_SIZE(gpio_alt_funcs); + +/* power signal list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { + {GPIO_PP1050_PGOOD, 1, "PGOOD_PP1050"}, + {GPIO_PP3300_PCH_PGOOD, 1, "PGOOD_PP3300_PCH"}, + {GPIO_PP5000_PGOOD, 1, "PGOOD_PP5000"}, + {GPIO_S5_PGOOD, 1, "PGOOD_S5"}, + {GPIO_VCORE_PGOOD, 1, "PGOOD_VCORE"}, + {GPIO_PP1000_S0IX_PGOOD, 1, "PGOOD_PP1000_S0IX"}, + {GPIO_PCH_SLP_S3_L, 1, "SLP_S3#_DEASSERTED"}, + {GPIO_PCH_SLP_S4_L, 1, "SLP_S4#_DEASSERTED"}, + {GPIO_PCH_SLP_SX_L, 1, "SLP_SX#_DEASSERTED"}, + {GPIO_PCH_SUS_STAT_L, 0, "SUS_STAT#_ASSERTED"}, + {GPIO_PCH_SUSPWRDNACK, 1, "SUSPWRDNACK_ASSERTED"}, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + +/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ +const struct adc_t adc_channels[] = { + /* EC internal temperature is calculated by + * 273 + (295 - 450 * ADC_VALUE / ADC_READ_MAX) / 2 + * = -225 * ADC_VALUE / ADC_READ_MAX + 420.5 + */ + {"ECTemp", LM4_ADC_SEQ0, -225, ADC_READ_MAX, 420, + LM4_AIN_NONE, 0x0e /* TS0 | IE0 | END0 */, 0, 0}, + + /* IOUT == ICMNT is on PE3/AIN0 */ + /* We have 0.01-ohm resistors, and IOUT is 20X the differential + * voltage, so 1000mA ==> 200mV. + * ADC returns 0x000-0xFFF, which maps to 0.0-3.3V (as configured). + * mA = 1000 * ADC_VALUE / ADC_READ_MAX * 3300 / 200 + */ + {"ChargerCurrent", LM4_ADC_SEQ1, 33000, ADC_READ_MAX * 2, 0, + LM4_AIN(0), 0x06 /* IE0 | END0 */, LM4_GPIO_E, (1<<3)}, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ +const struct pwm_t pwm_channels[] = { + {4, PWM_CONFIG_ACTIVE_LOW}, + {3, PWM_CONFIG_ACTIVE_LOW}, +}; + +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +/* I2C ports */ +const struct i2c_port_t i2c_ports[] = { + {"batt_chg", 0, 100}, + {"thermal", 5, 100}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +/* Temperature sensors data; must be in same order as enum temp_sensor_id. */ +const struct temp_sensor_t temp_sensors[] = { + {"ECInternal", TEMP_SENSOR_TYPE_BOARD, chip_temp_sensor_get_val, 0, 4}, + {"TMP432_Internal", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val, + TMP432_IDX_LOCAL, 4}, + /* TODO(crosbug.com/p/24965): Verify placement of temp sensors */ + {"TMP432_Power_top", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val, + TMP432_IDX_REMOTE1, 4}, + {"TMP432_CPU_bottom", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val, + TMP432_IDX_REMOTE2, 4}, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); + +/* Thermal limits for each temp sensor. All temps are in degrees K. Must be in + * same order as enum temp_sensor_id. To always ignore any temp, use 0. + */ +struct ec_thermal_config thermal_params[] = { + {{0, 0, 0}, 0, 0}, + {{0, 0, 0}, 0, 0}, + {{0, 0, 0}, 0, 0}, + {{0, 0, 0}, 0, 0}, +}; +BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/glimmer/board.h b/board/glimmer/board.h new file mode 100644 index 0000000000..e8a522ae64 --- /dev/null +++ b/board/glimmer/board.h @@ -0,0 +1,179 @@ +/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Configuration for Glimmer mainboard */ + +#ifndef __BOARD_H +#define __BOARD_H + +/* Optional features */ +#define CONFIG_AP_HANG_DETECT +#define CONFIG_BACKLIGHT_LID +#define CONFIG_BATTERY_SMART +#define CONFIG_BOARD_VERSION +#define CONFIG_CHARGER +#define CONFIG_CHARGER_BQ24715 +/* TODO(crosbug.com/p/24645): Set correct input current */ +#define CONFIG_CHARGER_INPUT_CURRENT 1700 /* 33 W adapter, 19 V, 1.75 A */ +#define CONFIG_CHARGER_SENSE_RESISTOR 10 /* Charge sense resistor, mOhm */ +#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 /* Input senso resistor, mOhm */ +#define CONFIG_CHIPSET_BAYTRAIL +#define CONFIG_CHIPSET_CAN_THROTTLE +#define CONFIG_CHIPSET_X86 +#define CONFIG_CMD_GSV +#define CONFIG_EXTPOWER_GPIO +#define CONFIG_KEYBOARD_COL2_INVERTED +#define CONFIG_KEYBOARD_IRQ_GPIO GPIO_KBD_IRQ_L +#define CONFIG_KEYBOARD_PROTOCOL_8042 +/* TODO(crosbug.com/p/24647): Add LED support */ +#undef CONFIG_LED_COMMON +#undef CONFIG_PECI +#define CONFIG_POWER_BUTTON +#define CONFIG_POWER_BUTTON_X86 +#define CONFIG_PWM +#define CONFIG_SCI_GPIO GPIO_PCH_SCI_L +#define CONFIG_TEMP_SENSOR +#define CONFIG_TEMP_SENSOR_TMP432 +#define CONFIG_USB_PORT_POWER_SMART +#define CONFIG_USB_PORT_POWER_SMART_SIMPLE +#define CONFIG_WIRELESS + +#ifndef __ASSEMBLER__ + +/* I2C ports */ +#define I2C_PORT_BATTERY 0 +#define I2C_PORT_CHARGER 0 +#define I2C_PORT_THERMAL 5 + +/* 13x8 keyboard scanner uses an entire GPIO bank for row inputs */ +#define KB_SCAN_ROW_IRQ LM4_IRQ_GPIOK +#define KB_SCAN_ROW_GPIO LM4_GPIO_K + +/* Host connects to keyboard controller module via LPC */ +#define HOST_KB_BUS_LPC + +/* USB ports */ +#define USB_PORT_COUNT 2 + +/* Wireless signals */ +#define WIRELESS_GPIO_WLAN GPIO_WLAN_OFF_L +#define WIRELESS_GPIO_WWAN GPIO_PP3300_LTE_EN +#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_WLAN_EN + +/* GPIO signal definitions. */ +enum gpio_signal { + /* Inputs with interrupt handlers are first for efficiency */ + GPIO_POWER_BUTTON_L = 0, /* Power button */ + GPIO_LID_OPEN, /* Lid switch */ + GPIO_AC_PRESENT, /* AC power present */ + GPIO_PCH_SLP_S3_L, /* SLP_S3# signal from PCH */ + GPIO_PCH_SLP_S4_L, /* SLP_S4# signal from PCH */ + GPIO_PP1050_PGOOD, /* Power good on 1.05V */ + GPIO_PP3300_PCH_PGOOD, /* Power good on 3.3V (PCH supply) */ + GPIO_PP5000_PGOOD, /* Power good on 5V */ + GPIO_S5_PGOOD, /* Power good on S5 supplies */ + GPIO_VCORE_PGOOD, /* Power good on core VR */ + GPIO_WP_L, /* Write protect input */ + GPIO_JTAG_TCK, /* JTAG clock input */ + GPIO_UART0_RX, /* UART0 RX input */ + + /* Other inputs */ + GPIO_BOARD_VERSION1, /* Board version stuffing resistor 1 */ + GPIO_BOARD_VERSION2, /* Board version stuffing resistor 2 */ + GPIO_BOARD_VERSION3, /* Board version stuffing resistor 3 */ + GPIO_PCH_SLP_SX_L, /* SLP_S0IX# signal from PCH */ + GPIO_PCH_SUS_STAT_L, /* SUS_STAT# signal from PCH */ + GPIO_PCH_SUSPWRDNACK, /* SUSPWRDNACK signal from PCH */ + GPIO_PP1000_S0IX_PGOOD, /* Power good on 1.00V (S0iX supplies) */ + GPIO_USB1_OC_L, /* USB port overcurrent warning */ + GPIO_USB2_OC_L, /* USB port overcurrent warning */ + + /* Outputs */ + GPIO_CPU_PROCHOT, /* Force CPU to think it's overheated */ + GPIO_ENABLE_BACKLIGHT, /* Enable backlight power */ + GPIO_ENABLE_TOUCHPAD, /* Enable touchpad power */ + GPIO_ENTERING_RW, /* Indicate when EC is entering RW code */ + GPIO_LPC_CLKRUN_L, /* Request that PCH drive LPC clock */ + GPIO_PCH_CORE_PWROK, /* Indicate core well power is stable */ + GPIO_PCH_PWRBTN_L, /* Power button output to PCH */ + GPIO_PCH_RCIN_L, /* Reset line to PCH (for 8042 emulation) */ + GPIO_PCH_RSMRST_L, /* Reset PCH resume power plane logic */ + GPIO_PCH_SMI_L, /* System management interrupt to PCH */ + GPIO_PCH_SOC_OVERRIDE, /* SOC override signal to PCH; when high, ME + * ignores security descriptor */ + GPIO_PCH_SYS_PWROK, /* EC thinks everything is up and ready */ + GPIO_PCH_WAKE_L, /* Wake signal from EC to PCH */ + GPIO_PP1350_EN, /* Enable 1.35V supply */ + GPIO_PP3300_DX_EN, /* Enable power to lots of peripherals */ + GPIO_PP3300_LTE_EN, /* Enable LTE radio */ + GPIO_PP3300_WLAN_EN, /* Enable WiFi power */ + GPIO_PP5000_EN, /* Enable 5V supply */ + GPIO_PPSX_EN, /* Enable PP1350_PCH_SX, PP1000_PCH_SX */ + GPIO_SUSP_VR_EN, /* Enable 1.05V regulator */ + GPIO_TOUCHSCREEN_RESET_L, /* Reset touch screen */ + GPIO_USB_CTL1, /* USB control signal 1 to both ports */ + GPIO_USB_ILIM_SEL, /* USB current limit to both ports */ + GPIO_USB1_ENABLE, /* USB port 1 output power enable */ + GPIO_USB2_ENABLE, /* USB port 2 output power enable */ + GPIO_VCORE_EN, /* Enable core power supplies */ + GPIO_WLAN_OFF_L, /* Disable WiFi radio */ + GPIO_PCH_SCI_L, /* Assert SCI to PCH */ + GPIO_KBD_IRQ_L, /* Negative edge triggered irq. */ + + /* Number of GPIOs; not an actual GPIO */ + GPIO_COUNT +}; + +/* power signal definitions */ +enum power_signal { + X86_PGOOD_PP1050 = 0, + X86_PGOOD_PP3300_PCH, + X86_PGOOD_PP5000, + X86_PGOOD_S5, + X86_PGOOD_VCORE, + X86_PGOOD_PP1000_S0IX, + X86_SLP_S3_DEASSERTED, + X86_SLP_S4_DEASSERTED, + X86_SLP_SX_DEASSERTED, + X86_SUS_STAT_ASSERTED, + X86_SUSPWRDNACK_ASSERTED, + + /* Number of X86 signals */ + POWER_SIGNAL_COUNT +}; + +enum adc_channel { + /* EC internal die temperature in degrees K. */ + ADC_CH_EC_TEMP = 0, + + /* Charger current in mA. */ + ADC_CH_CHARGER_CURRENT, + + ADC_CH_COUNT +}; + +enum pwm_channel { + PWM_CH_LED_GREEN, + PWM_CH_LED_RED, + + /* Number of PWM channels */ + PWM_CH_COUNT +}; + +enum temp_sensor_id { + /* EC internal temperature sensor */ + TEMP_SENSOR_EC_INTERNAL = 0, + + /* TMP432 local and remote sensors */ + TEMP_SENSOR_I2C_TMP432_LOCAL, + TEMP_SENSOR_I2C_TMP432_REMOTE1, + TEMP_SENSOR_I2C_TMP432_REMOTE2, + + TEMP_SENSOR_COUNT +}; + +#endif /* !__ASSEMBLER__ */ + +#endif /* __BOARD_H */ diff --git a/board/glimmer/build.mk b/board/glimmer/build.mk new file mode 100644 index 0000000000..3af88fc927 --- /dev/null +++ b/board/glimmer/build.mk @@ -0,0 +1,12 @@ +# -*- makefile -*- +# Copyright (c) 2014 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build +# + +# the IC is TI Stellaris LM4 +CHIP:=lm4 + +board-y=board.o diff --git a/board/glimmer/ec.tasklist b/board/glimmer/ec.tasklist new file mode 100644 index 0000000000..51a3cdc017 --- /dev/null +++ b/board/glimmer/ec.tasklist @@ -0,0 +1,29 @@ +/* -*- c -*- */ +/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * List of enabled tasks in the priority order + * + * The first one has the lowest priority. + * + * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and + * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries, + * where : + * 'n' is the name of the task + * 'r' is the main routine of the task + * 'd' is an opaque parameter passed to the routine at startup + * 's' is the stack size in bytes; must be a multiple of 8 + */ +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(VBOOTHASH, vboot_hash_task, NULL, LARGER_TASK_STACK_SIZE) \ + /* TASK_ALWAYS(CHARGER, charger_task, NULL, TASK_STACK_SIZE) */ \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) diff --git a/chip/lm4/openocd/lm4x_cmds.tcl b/chip/lm4/openocd/lm4x_cmds.tcl index 962ee9f033..e35b4296bb 100644 --- a/chip/lm4/openocd/lm4x_cmds.tcl +++ b/chip/lm4/openocd/lm4x_cmds.tcl @@ -31,6 +31,18 @@ proc flash_bds { } { flash_lm4 ../../../build/bds/ec.bin 0 } +proc flash_glimmer { } { + flash_lm4 ../../../build/glimmer/ec.bin 0 +} + +proc flash_glimmer_ro { } { + flash_lm4 ../../../build/glimmer/ec.RO.flat 0 +} + +proc flash_glimmer_rw { } { + flash_lm4 ../../../build/glimmer/ec.RW.bin 131072 +} + proc flash_rambi { } { flash_lm4 ../../../build/rambi/ec.bin 0 } diff --git a/util/flash_ec b/util/flash_ec index 9a64bde8c4..0f1e679824 100755 --- a/util/flash_ec +++ b/util/flash_ec @@ -223,7 +223,7 @@ save="$(servo_save)" case "${BOARD}" in discovery | nyan | pit | snow | spring ) flash_stm32 ;; - falco | peppy | rambi | samus | squawks ) flash_lm4 ;; + falco | glimmer | peppy | rambi | samus | squawks ) flash_lm4 ;; link ) flash_link ;; *) die "board ${BOARD} not supported" ;; esac |