diff options
Diffstat (limited to 'baseboard/volteer/baseboard.h')
| -rw-r--r-- | baseboard/volteer/baseboard.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/baseboard/volteer/baseboard.h b/baseboard/volteer/baseboard.h index c7f7c0d047..3b8e475fe5 100644 --- a/baseboard/volteer/baseboard.h +++ b/baseboard/volteer/baseboard.h @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,11 +13,11 @@ /* * By default, enable all console messages excepted HC */ -#define CC_DEFAULT (CC_ALL & ~(BIT(CC_HOSTCMD))) +#define CC_DEFAULT (CC_ALL & ~(BIT(CC_HOSTCMD))) /* NPCX7 config */ -#define NPCX7_PWM1_SEL 1 /* GPIO C2 is used as PWM1. */ -#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ +#define NPCX7_PWM1_SEL 1 /* GPIO C2 is used as PWM1. */ +#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ /* Internal SPI flash on NPCX796FC is 512 kB */ #define CONFIG_FLASH_SIZE_BYTES (512 * 1024) #define CONFIG_SPI_FLASH_REGS @@ -44,8 +44,8 @@ /* Host communication */ #define CONFIG_HOST_INTERFACE_ESPI -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S5 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S5 /* Chipset config */ #define CONFIG_CHIPSET_TIGERLAKE @@ -94,10 +94,10 @@ #define CONFIG_CMD_ACCEL_INFO /* Thermal features */ -#define CONFIG_FANS FAN_CH_COUNT +#define CONFIG_FANS FAN_CH_COUNT #define CONFIG_TEMP_SENSOR #define CONFIG_TEMP_SENSOR_POWER -#define GPIO_TEMP_SENSOR_POWER GPIO_PG_EC_DSW_PWROK +#define GPIO_TEMP_SENSOR_POWER GPIO_PG_EC_DSW_PWROK #define CONFIG_THERMISTOR #define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B #define CONFIG_THROTTLE_AP @@ -107,7 +107,7 @@ #define CONFIG_CHARGE_MANAGER #define CONFIG_CHARGER #define CONFIG_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHARGER_INPUT_CURRENT 512 +#define CONFIG_CHARGER_INPUT_CURRENT 512 /* * Hardware based charge ramp is broken in the ISL9241 (b/169350714). @@ -115,7 +115,7 @@ #define CONFIG_CHARGE_RAMP_SW #define CONFIG_CHARGER_ISL9241 /* Setting ISL9241 Register Control1 switching frequency to 724kHz. */ -#define CONFIG_ISL9241_SWITCHING_FREQ ISL9241_CONTROL1_SWITCHING_FREQ_724KHZ +#define CONFIG_ISL9241_SWITCHING_FREQ ISL9241_CONTROL1_SWITCHING_FREQ_724KHZ #define CONFIG_USB_CHARGER #define CONFIG_BC12_DETECT_PI3USB9201 @@ -124,8 +124,8 @@ * Don't allow the system to boot to S0 when the battery is low and unable to * communicate on locked systems (which haven't PD negotiated) */ -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT 15000 -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 15001 +#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT 15000 +#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 15001 /* Common battery defines */ #define CONFIG_BATTERY_SMART @@ -140,7 +140,7 @@ /* EDP back-light control defines */ #define CONFIG_BACKLIGHT_LID -#define GPIO_ENABLE_BACKLIGHT GPIO_EC_EDP_BL_EN +#define GPIO_ENABLE_BACKLIGHT GPIO_EC_EDP_BL_EN /* USB Type C and USB PD defines */ /* Enable the new USB-C PD stack */ @@ -169,11 +169,11 @@ #define CONFIG_USB_PD_TCPC_LOW_POWER #define CONFIG_USB_PD_TCPM_TCPCI #define CONFIG_USB_PD_TCPM_RT1715 -#define CONFIG_USB_PD_TCPM_TUSB422 /* USBC port C0 */ -#define CONFIG_USB_PD_TCPM_PS8815 /* USBC port USB3 DB */ +#define CONFIG_USB_PD_TCPM_TUSB422 /* USBC port C0 */ +#define CONFIG_USB_PD_TCPM_PS8815 /* USBC port USB3 DB */ #define CONFIG_USB_PD_TCPM_PS8815_FORCE_DID #define CONFIG_USB_PD_TCPM_MUX -#define CONFIG_HOSTCMD_PD_CONTROL /* Needed for TCPC FW update */ +#define CONFIG_HOSTCMD_PD_CONTROL /* Needed for TCPC FW update */ #define CONFIG_CMD_USB_PD_PE /* @@ -190,7 +190,7 @@ * with non-PD chargers. Override the default low-power mode exit delay. */ #undef CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE -#define CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE (50*MSEC) +#define CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE (50 * MSEC) /* Enable USB3.2 DRD */ #define CONFIG_USB_PD_USB32_DRD |