diff options
Diffstat (limited to 'baseboard')
-rw-r--r-- | baseboard/mancomb/base_ec.tasklist | 21 | ||||
-rw-r--r-- | baseboard/mancomb/base_gpio.inc | 176 | ||||
-rw-r--r-- | baseboard/mancomb/baseboard.c | 859 | ||||
-rw-r--r-- | baseboard/mancomb/baseboard.h | 336 | ||||
-rw-r--r-- | baseboard/mancomb/build.mk | 15 | ||||
-rw-r--r-- | baseboard/mancomb/cbi.c | 97 | ||||
-rw-r--r-- | baseboard/mancomb/usb_pd_policy.c | 81 |
7 files changed, 0 insertions, 1585 deletions
diff --git a/baseboard/mancomb/base_ec.tasklist b/baseboard/mancomb/base_ec.tasklist deleted file mode 100644 index f6870b1ebd..0000000000 --- a/baseboard/mancomb/base_ec.tasklist +++ /dev/null @@ -1,21 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define BASEBOARD_CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) diff --git a/baseboard/mancomb/base_gpio.inc b/baseboard/mancomb/base_gpio.inc deleted file mode 100644 index 2e9dbafc8f..0000000000 --- a/baseboard/mancomb/base_gpio.inc +++ /dev/null @@ -1,176 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* GSC Signals */ -GPIO_INT(EC_WP_L, PIN(5, 0), GPIO_INT_BOTH, switch_interrupt) /* Write Protect Enabled */ -GPIO(CCD_MODE_ODL, PIN(C, 6), GPIO_ODR_HIGH) /* Case Closed Debug Mode */ -GPIO(EC_GSC_PACKET_MODE, PIN(B, 1), GPIO_OUT_LOW) /* GSC Packet Mode */ -GPIO(GSC_EC_RECOVERY_BTN_ODL, PIN(2, 7), GPIO_INT_BOTH) -ALTERNATE( PIN_MASK(6, BIT(4) | BIT(5)), 0, MODULE_UART, 0) /* UART_EC_TX_GSC_DBG_RX_R, UART_GSC_DBG_TX_EC_RX_R */ - -/* Power Signals */ -GPIO_INT(MECH_PWR_BTN_ODL, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW, power_button_interrupt) /* Mechanical Power Button */ -GPIO_INT(EC_I2C_EXT_INT_ODL, PIN(2, 4), GPIO_INT_BOTH, ext_charger_interrupt) -GPIO_INT(EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) /* Power Button */ -GPIO_INT(SLP_S3_L, PIN(6, 1), GPIO_INT_BOTH, baseboard_en_pwr_s0) /* Sleep S3 */ -GPIO_INT(SLP_S5_L, PIN(7, 2), GPIO_INT_BOTH, power_signal_interrupt) /* Sleep S5 */ -GPIO_INT(SLP_S3_S0I3_L, PIN(7, 4), GPIO_INT_BOTH, power_signal_interrupt) /* Sleep S0ix */ -GPIO_INT(PG_PWR_S5, PIN(C, 0), GPIO_INT_BOTH, baseboard_en_pwr_s0) /* S5 Power OK */ -GPIO_INT(PG_PCORE_S0_R_OD, PIN(B, 6), GPIO_INT_BOTH, power_signal_interrupt) /* S0 Power OK */ -GPIO_INT(EC_PCORE_INT_ODL, PIN(F, 0), GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_interrupt) /* Power Core Interrupt */ -GPIO_INT(PG_GROUPC_S0_OD, PIN(A, 3), GPIO_INT_BOTH, baseboard_en_pwr_pcore_s0) /* Power Group C S0 */ -GPIO_INT(PG_DDR4_S3_OD, PIN(9, 5), GPIO_INT_BOTH, baseboard_en_pwr_pcore_s0) /* Power Group LPDDR4 S3 */ -GPIO_INT(BJ_ADP_PRESENT_L, PIN(3, 0), GPIO_INT_BOTH | GPIO_PULL_UP, baseboard_bj_connect_interrupt) /* Barrel Jack Adapter Present */ -GPIO(EC_RECOVERY_BTN_ODL, PIN(3, 1), GPIO_INT_BOTH) -GPIO(EN_PWR_S5, PIN(B, 7), GPIO_OUT_LOW) /* Enable S5 Power */ -GPIO(EN_PWR_S0_R, PIN(F, 1), GPIO_OUT_LOW) -GPIO(EN_PWR_PCORE_S0_R, PIN(E, 1), GPIO_OUT_LOW) -GPIO(EN_PPVAR_BJ_ADP_L, PIN(2, 1), GPIO_OUT_LOW) /* Enable Barrel Jack Adapter Power */ -GPIO(EN_USM_ODL, PIN(1, 2), GPIO_ODR_HIGH) /* Enable ultrasonic mode */ -ALTERNATE(/*MECH_PWR_BTN_ODL*/ PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* PSL - Mechanical Power Button */ - -/* SOC Signals */ -UNIMPLEMENTED(ENTERING_RW) /* GPIO_ENTERING_RW */ -GPIO(EC_SYS_RST_L, PIN(7, 6), GPIO_ODR_HIGH) /* Cold Reset SOC */ -GPIO(EC_SOC_RSMRST_L, PIN(C, 5), GPIO_OUT_LOW) /* Resume Reset SOC */ -GPIO(EC_CLR_CMOS, PIN(A, 1), GPIO_OUT_LOW) /* Clear SOC CMOS */ -GPIO(EC_MEM_EVENT, PIN(A, 5), GPIO_OUT_LOW) /* Memory Thermal Event to SOC*/ -GPIO(EC_SOC_PWR_BTN_L, PIN(6, 3), GPIO_OUT_HIGH) /* Power Button to SOC */ -GPIO(EC_SOC_PWR_GOOD, PIN(1, 3), GPIO_OUT_LOW) /* Power Good to SOC */ -GPIO(EC_SOC_WAKE_L, PIN(0, 3), GPIO_OUT_HIGH) /* Wake SOC */ -GPIO(EC_SOC_INT_L, PIN(8, 3), GPIO_OUT_HIGH) /* Matrix Keyboard Protocol Event to SOC */ -GPIO(PROCHOT_ODL, PIN(D, 5), GPIO_ODR_HIGH) /* Force SOC into HTC-active state */ -GPIO(SOC_ALERT_EC_L, PIN(E, 2), GPIO_INPUT) /* Sideband-Temperature Iterrupt */ -GPIO(SOC_THERMTRIP_ODL, PIN(E, 5), GPIO_INPUT) /* Temperature Trip Sensor */ - -/* USB Signals */ -GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event) -GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(C, 7), GPIO_INT_FALLING, tcpc_alert_event) -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(7, 5), GPIO_INT_FALLING, ppc_interrupt) -GPIO_INT(USB_C1_PPC_INT_ODL, PIN(D, 4), GPIO_INT_FALLING, ppc_interrupt) -GPIO_INT(USB_C0_BC12_INT_ODL, PIN(A, 4), GPIO_INT_FALLING | GPIO_PULL_UP, bc12_interrupt) -GPIO_INT(USB_C1_BC12_INT_ODL, PIN(9, 6), GPIO_INT_FALLING | GPIO_PULL_UP, bc12_interrupt) -GPIO(USB_FAULT_ODL, PIN(1, 4), GPIO_OUT_HIGH) /* C0/C1 Fault to SOC */ -GPIO(USB_C0_TCPC_RST_L, PIN(1, 5), GPIO_OUT_HIGH) /* C0 TCPC Reset */ -GPIO(USB_C1_TCPC_RST_L, PIN(1, 6), GPIO_OUT_HIGH) /* C1 TCPC Reset */ -GPIO(USB_C0_HPD, PIN(F, 5), GPIO_OUT_LOW) /* C0 DP Hotplug Detect */ -GPIO(USB_C1_HPD, PIN(F, 4), GPIO_OUT_LOW) /* C1 DP Hotplug Detect */ -GPIO_INT(USB_A4_FAULT_R_ODL, PIN(1, 1), GPIO_INT_BOTH, baseboard_usb_fault_alert) -GPIO_INT(USB_A3_FAULT_R_ODL, PIN(1, 0), GPIO_INT_BOTH, baseboard_usb_fault_alert) -GPIO_INT(USB_A2_FAULT_R_ODL, PIN(0, 7), GPIO_INT_BOTH, baseboard_usb_fault_alert) -GPIO_INT(USB_A1_FAULT_R_ODL, PIN(0, 6), GPIO_INT_BOTH, baseboard_usb_fault_alert) -GPIO_INT(USB_A0_FAULT_R_ODL, PIN(0, 5), GPIO_INT_BOTH, baseboard_usb_fault_alert) - -/* Sensor Signals */ -ALTERNATE(/*TEMP_SOC|MEM*/ PIN_MASK(4, BIT(3) | BIT(5)), 0, MODULE_ADC, 0) /* SOC and Memory Temperature */ -ALTERNATE( PIN_MASK(4, BIT(4)), 0, MODULE_ADC, 0) /* ANALOG_PPVAR_PWR_IN_IMON */ -ALTERNATE( PIN_MASK(4, BIT(1) | BIT(2)), 0, MODULE_ADC, 0) /* EC_ADC_CORE_IMON1, EC_ADC_SOC_IMON2 */ -ALTERNATE( PIN_MASK(3, BIT(7)), 0, MODULE_ADC, 0) /* SNS_PPVAR_PWR_IN */ -ALTERNATE( PIN_MASK(3, BIT(4)), 0, MODULE_ADC, 0) /* TEMP_AMBIENT_VR */ - -/* LED Signals */ -GPIO(EC_DISABLE_DISP_BL, PIN(A, 6), GPIO_OUT_HIGH) /* Disable Display Backlight */ -ALTERNATE( PIN_MASK(C, BIT(4)), 0, MODULE_PWM, 0) /* EC_PWM_LED1_L */ -ALTERNATE( PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0) /* EC_PWM_LED2_L */ - -/* Fan Signals */ -ALTERNATE( PIN_MASK(C, BIT(3)), 0, MODULE_PWM, 0) /* EC_FAN_PWM - Fan PWM */ -ALTERNATE( PIN_MASK(4, BIT(0)), 0, MODULE_PWM, 0) /* EC_FAN_SPEED - Fan Speed */ - -/* I2C Signals -- i2c pins need to be exposed as GPIO for bit banging, even though set to alternate mode below */ -GPIO(EC_I2C_USB_HUB_SCL, PIN(9, 2), GPIO_INPUT) -GPIO(EC_I2C_USB_HUB_SDA, PIN(9, 1), GPIO_INPUT) -GPIO(EC_I2C_USB_C0_SCL, PIN(B, 5), GPIO_INPUT) -GPIO(EC_I2C_USB_C0_SDA, PIN(B, 4), GPIO_INPUT) -GPIO(EC_I2C_USB_C1_SCL, PIN(9, 0), GPIO_INPUT) -GPIO(EC_I2C_USB_C1_SDA, PIN(8, 7), GPIO_INPUT) -GPIO(EC_I2C_USBC_MUX_SCL, PIN(D, 1), GPIO_INPUT) -GPIO(EC_I2C_USBC_MUX_SDA, PIN(D, 0), GPIO_INPUT) -GPIO(EC_I2C_POWER_SCL, PIN(F, 3), GPIO_INPUT) -GPIO(EC_I2C_POWER_SDA, PIN(F, 2), GPIO_INPUT) -GPIO(EC_I2C_CBI_SCL, PIN(3, 3), GPIO_INPUT) -GPIO(EC_I2C_CBI_SDA, PIN(3, 6), GPIO_INPUT) -GPIO(EC_I2C_SENSOR_SCL, PIN(E, 4), GPIO_INPUT) -GPIO(EC_I2C_SENSOR_SDA, PIN(E, 3), GPIO_INPUT) -GPIO(EC_I2C_SOC_SIC, PIN(B, 3), GPIO_INPUT) -GPIO(EC_I2C_SOC_SID, PIN(B, 2), GPIO_INPUT) - -ALTERNATE( PIN_MASK(B, BIT(4) | BIT(5)), 0, MODULE_I2C, 0) /* I2C0 */ -ALTERNATE( PIN_MASK(9, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ -ALTERNATE( PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0) /* I2C1 SDA */ -ALTERNATE( PIN_MASK(D, BIT(0) | BIT(1)), 0, MODULE_I2C, 0) /* I2C3 */ -ALTERNATE( PIN_MASK(F, BIT(2) | BIT(3)), 0, MODULE_I2C, 0) /* I2C4 */ -ALTERNATE( PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0) /* I2C5 */ -ALTERNATE( PIN_MASK(E, BIT(3) | BIT(4)), 0, MODULE_I2C, 0) /* I2C6 */ -ALTERNATE( PIN_MASK(B, BIT(2) | BIT(3)), 0, MODULE_I2C, 0) /* I2C7 */ - -/* HDMI/DP Signals */ -GPIO(HDMI_1_CEC, PIN(1, 7), GPIO_OUT_LOW) -GPIO_INT(FAULT_HDMI_1_L, PIN(2, 5), GPIO_INT_FALLING, hdmi_fault_interrupt) -GPIO_INT(FAULT_DP_L, PIN(2, 6), GPIO_INT_FALLING, dp_fault_interrupt) - -/* b/186135022: Pull eSPI RST# high to disable */ -GPIO(EC_ESPI_RST_L, PIN(5, 4), GPIO_PULL_UP) - -#if 0 -/* - * SOC eSPI Bus - * These signals do not need to be explicitly configured. - * Leaving here so all signals are documented. - */ -GPIO(ESPI_SOC_CLK, PIN(5, 5), GPIO_DEFAULT) -GPIO(ESPI_SOC_CS_EC_L, PIN(5, 3), GPIO_DEFAULT) -GPIO(ESPI_SOC_D0_EC, PIN(4, 6), GPIO_DEFAULT) -GPIO(ESPI_SOC_D1_EC, PIN(4, 7), GPIO_DEFAULT) -GPIO(ESPI_SOC_D2_EC, PIN(5, 1), GPIO_DEFAULT) -GPIO(ESPI_SOC_D3_EC, PIN(5, 2), GPIO_DEFAULT) -GPIO(ESPI_EC_ALERT_SOC_L, PIN(5, 7), GPIO_DEFAULT) -#endif - -/* TCPC C0 */ -IOEX(EN_PP5000_USB_A0_VBUS, EXPIN(USBC_PORT_C0, 1, 5), GPIO_OUT_LOW) -IOEX(USB_A0_LIMIT_SDP, EXPIN(USBC_PORT_C0, 1, 6), GPIO_OUT_LOW) -IOEX(USB_C0_PPC_EN_L, EXPIN(USBC_PORT_C0, 1, 0), GPIO_OUT_LOW) -IOEX(USB_C0_PPC_ILIM_3A_EN, EXPIN(USBC_PORT_C0, 1, 1), GPIO_OUT_LOW) -IOEX_INT(USB_C0_SBU_FAULT_ODL, EXPIN(USBC_PORT_C0, 1, 2), GPIO_INT_FALLING, sbu_fault_interrupt) -IOEX(USB_C0_SBU_FLIP, EXPIN(USBC_PORT_C0, 1, 7), GPIO_OUT_LOW) - -/* TCPC C1 */ -IOEX(USB_A1_LIMIT_SDP, EXPIN(USBC_PORT_C1, 1, 6), GPIO_OUT_LOW) -IOEX(USB_C1_IN_HPD, EXPIN(USBC_PORT_C1, 0, 3), GPIO_OUT_LOW) -IOEX(USB_C1_PPC_EN_L, EXPIN(USBC_PORT_C1, 1, 0), GPIO_OUT_LOW) -IOEX(USB_C1_PPC_ILIM_3A_EN, EXPIN(USBC_PORT_C1, 1, 1), GPIO_OUT_LOW) -IOEX_INT(USB_C1_SBU_FAULT_ODL, EXPIN(USBC_PORT_C1, 1, 2), GPIO_INT_FALLING, sbu_fault_interrupt) -IOEX(USB_C1_SBU_FLIP, EXPIN(USBC_PORT_C1, 1, 7), GPIO_OUT_LOW) - -/* Test Points */ -GPIO(EC_ADC_6, PIN(3, 4), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_FLPRG2, PIN(8, 6), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO04, PIN(0, 4), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO20, PIN(2, 0), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO22, PIN(2, 2), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO23, PIN(2, 3), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO56, PIN(5, 6), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO73, PIN(7, 3), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO81, PIN(8, 1), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO82, PIN(8, 2), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO94, PIN(9, 4), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIO97, PIN(9, 7), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIOA0, PIN(A, 0), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIOA2, PIN(A, 2), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIOB0, PIN(B, 0), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIOC1, PIN(C, 1), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_GPIOC2, PIN(C, 2), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_PS2_CLK, PIN(6, 7), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_PS2_DAT, PIN(7, 0), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_PS2_RST, PIN(6, 2), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_PSL_GPO, PIN(D, 7), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_PSL_IN2, PIN(0, 0), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_PSL_IN4, PIN(0, 2), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_PWM7, PIN(6, 0), GPIO_INPUT | GPIO_PULL_UP) -GPIO(VOLDN_BTN_ODL, PIN(A, 7), GPIO_INPUT | GPIO_PULL_UP) -GPIO(VOLUP_BTN_ODL, PIN(9, 3), GPIO_INPUT | GPIO_PULL_UP) diff --git a/baseboard/mancomb/baseboard.c b/baseboard/mancomb/baseboard.c deleted file mode 100644 index 26604cf41b..0000000000 --- a/baseboard/mancomb/baseboard.c +++ /dev/null @@ -1,859 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Mancomb family-specific configuration */ - -#include "adc.h" -#include "charge_manager.h" -#include "charge_ramp.h" -#include "charge_state_v2.h" -#include "charge_state.h" -#include "charger.h" -#include "chip/npcx/ps2_chip.h" -#include "chip/npcx/pwm_chip.h" -#include "chipset.h" -#include "driver/ppc/aoz1380.h" -#include "driver/ppc/nx20p348x.h" -#include "driver/retimer/tdp142.h" -#include "driver/tcpm/nct38xx.h" -#include "driver/temp_sensor/sb_tsi.h" -#include "driver/usb_mux/amd_fp6.h" -#include "fan.h" -#include "fan_chip.h" -#include "gpio.h" -#include "hooks.h" -#include "i2c.h" -#include "ioexpander.h" -#include "keyboard_scan.h" -#include "nct38xx.h" -#include "pi3usb9201.h" -#include "power.h" -#include "pwm.h" -#include "temp_sensor.h" -#include "thermal.h" -#include "temp_sensor/thermistor.h" -#include "usb_mux.h" -#include "usb_pd_tcpm.h" -#include "usbc_ppc.h" - -#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) - -/* Power Signal Input List */ -const struct power_signal_info power_signal_list[] = { - [X86_SLP_S0_N] = { - .gpio = GPIO_PCH_SLP_S0_L, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "SLP_S0_DEASSERTED", - }, - [X86_SLP_S3_N] = { - .gpio = GPIO_PCH_SLP_S3_L, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "SLP_S3_DEASSERTED", - }, - [X86_SLP_S5_N] = { - .gpio = GPIO_PCH_SLP_S5_L, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "SLP_S5_DEASSERTED", - }, - [X86_S0_PGOOD] = { - .gpio = GPIO_S0_PGOOD, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "S0_PGOOD", - }, - [X86_S5_PGOOD] = { - .gpio = GPIO_S5_PGOOD, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "S5_PGOOD", - }, -}; -BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); - -const struct i2c_port_t i2c_ports[] = { - { - .name = "tcpc0", - .port = I2C_PORT_TCPC0, - .kbps = 400, - .scl = GPIO_EC_I2C_USB_C0_SCL, - .sda = GPIO_EC_I2C_USB_C0_SDA, - }, - { - .name = "tcpc1", - .port = I2C_PORT_TCPC1, - .kbps = 400, - .scl = GPIO_EC_I2C_USB_C1_SCL, - .sda = GPIO_EC_I2C_USB_C1_SDA, - }, - { - .name = "usb_hub", - .port = I2C_PORT_USB_HUB, - .kbps = 100, - .scl = GPIO_EC_I2C_USBC_MUX_SCL, - .sda = GPIO_EC_I2C_USBC_MUX_SDA, - }, - { - .name = "usb_mux", - .port = I2C_PORT_USB_MUX, - .kbps = 400, - .scl = GPIO_EC_I2C_USBC_MUX_SCL, - .sda = GPIO_EC_I2C_USBC_MUX_SDA, - }, - { - .name = "eeprom", - .port = I2C_PORT_EEPROM, - .kbps = 400, - .scl = GPIO_EC_I2C_CBI_SCL, - .sda = GPIO_EC_I2C_CBI_SDA, - }, - { - .name = "sensor", - .port = I2C_PORT_SENSOR, - .kbps = 400, - .scl = GPIO_EC_I2C_SENSOR_SCL, - .sda = GPIO_EC_I2C_SENSOR_SDA, - }, - { - .name = "soc_thermal", - .port = I2C_PORT_THERMAL_AP, - .kbps = 400, - .scl = GPIO_EC_I2C_SOC_SIC, - .sda = GPIO_EC_I2C_SOC_SID, - }, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* ADC Channels */ -const struct adc_t adc_channels[] = { - [ADC_TEMP_SENSOR_SOC] = { - .name = "SOC", - .input_ch = NPCX_ADC_CH0, - .factor_mul = ADC_MAX_VOLT, - .factor_div = ADC_READ_MAX + 1, - .shift = 0, - }, - [ANALOG_PPVAR_PWR_IN_IMON] = { - .name = "POWER_I", - .input_ch = NPCX_ADC_CH1, - .factor_mul = ADC_MAX_VOLT, - .factor_div = ADC_READ_MAX + 1, - .shift = 0, - }, - [ADC_TEMP_SENSOR_MEMORY] = { - .name = "MEMORY", - .input_ch = NPCX_ADC_CH2, - .factor_mul = ADC_MAX_VOLT, - .factor_div = ADC_READ_MAX + 1, - .shift = 0, - }, - /* 100K/(680K+100K) = 5/39 voltage divider */ - [SNS_PPVAR_PWR_IN] = { - .name = "POWER_V", - .input_ch = NPCX_ADC_CH5, - .factor_mul = (ADC_MAX_VOLT) * 39, - .factor_div = (ADC_READ_MAX + 1) * 5, - .shift = 0, - }, - [ADC_TEMP_SENSOR_AMBIENT] = { - .name = "AMBIENT", - .input_ch = NPCX_ADC_CH6, - .factor_mul = ADC_MAX_VOLT, - .factor_div = ADC_READ_MAX + 1, - .shift = 0, - }, - -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/* Temp Sensors */ -const struct temp_sensor_t temp_sensors[] = { - [TEMP_SENSOR_SOC] = { - .name = "SOC", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_SOC, - }, - [TEMP_SENSOR_MEMORY] = { - .name = "Memory", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_MEMORY, - }, - [TEMP_SENSOR_AMBIENT] = { - .name = "Ambient", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_AMBIENT, - }, - [TEMP_SENSOR_CPU] = { - .name = "CPU", - .type = TEMP_SENSOR_TYPE_CPU, - .read = sb_tsi_get_val, - .idx = 0, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); - -struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT] = { - [TEMP_SENSOR_SOC] = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(100), - [EC_TEMP_THRESH_HALT] = C_TO_K(105), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - }, - /* TODO: Setting fan off to 0 so it's always on */ - .temp_fan_off = C_TO_K(0), - .temp_fan_max = C_TO_K(70), - }, - [TEMP_SENSOR_MEMORY] = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(100), - [EC_TEMP_THRESH_HALT] = C_TO_K(105), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - }, - .temp_fan_off = 0, - .temp_fan_max = 0, - }, - [TEMP_SENSOR_AMBIENT] = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - [EC_TEMP_THRESH_HALT] = C_TO_K(92), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - }, - .temp_fan_off = 0, - .temp_fan_max = 0, - }, - [TEMP_SENSOR_CPU] = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(100), - [EC_TEMP_THRESH_HALT] = C_TO_K(105), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - }, - .temp_fan_off = 0, - .temp_fan_max = 0, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); - -const struct tcpc_config_t tcpc_config[] = { - [USBC_PORT_C0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_TCPC0, - .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, - }, - .drv = &nct38xx_tcpm_drv, - .flags = TCPC_FLAGS_TCPCI_REV2_0, - }, - [USBC_PORT_C1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_TCPC1, - .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, - }, - .drv = &nct38xx_tcpm_drv, - .flags = TCPC_FLAGS_TCPCI_REV2_0, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); -BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); - -/* A1-A4 are controlled by USB MUX */ -const int usb_port_enable[] = { - IOEX_EN_PP5000_USB_A0_VBUS, -}; - -static void baseboard_interrupt_init(void) -{ - /* Enable Power Group interrupts. */ - gpio_enable_interrupt(GPIO_PG_GROUPC_S0_OD); - gpio_enable_interrupt(GPIO_PG_DDR4_S3_OD); - - /* Enable PPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); - - /* Enable TCPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); - - /* Enable BC 1.2 interrupts */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); - - /* Enable SBU fault interrupts */ - ioex_enable_interrupt(IOEX_USB_C0_SBU_FAULT_ODL); - ioex_enable_interrupt(IOEX_USB_C1_SBU_FAULT_ODL); - - /* Enable USB-A fault interrupts */ - gpio_enable_interrupt(GPIO_USB_A4_FAULT_R_ODL); - gpio_enable_interrupt(GPIO_USB_A3_FAULT_R_ODL); - gpio_enable_interrupt(GPIO_USB_A2_FAULT_R_ODL); - gpio_enable_interrupt(GPIO_USB_A1_FAULT_R_ODL); - gpio_enable_interrupt(GPIO_USB_A0_FAULT_R_ODL); - - /* Enable BJ insertion interrupt */ - gpio_enable_interrupt(GPIO_BJ_ADP_PRESENT_L); -} -DECLARE_HOOK(HOOK_INIT, baseboard_interrupt_init, HOOK_PRIO_INIT_I2C + 1); - -struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - /* Device does not talk I2C */ - .drv = &aoz1380_drv - }, - - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_TCPC1, - .i2c_addr_flags = NX20P3483_ADDR1_FLAGS, - .drv = &nx20p348x_drv - }, -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_TCPC0, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, - - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_TCPC1, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); - -/* - * .init is not necessary here because it has nothing - * to do. Primary mux will handle mux state so .get is - * not needed as well. usb_mux.c can handle the situation - * properly. - */ -static int fsusb42umx_set_mux(const struct usb_mux*, mux_state_t, bool *); -const struct usb_mux_driver usbc_sbu_mux_driver = { - .set = fsusb42umx_set_mux, -}; - -/* - * Since FSUSB42UMX is not a i2c device, .i2c_port and - * .i2c_addr_flags are not required here. - */ -const struct usb_mux usbc0_sbu_mux = { - .usb_port = USBC_PORT_C0, - .driver = &usbc_sbu_mux_driver, -}; - -const struct usb_mux usbc1_sbu_mux = { - .usb_port = USBC_PORT_C1, - .driver = &usbc_sbu_mux_driver, -}; - -const struct usb_mux usb_muxes[] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = AMD_FP6_C0_MUX_I2C_ADDR, - .driver = &amd_fp6_usb_mux_driver, - .next_mux = &usbc0_sbu_mux, - }, - [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = AMD_FP6_C4_MUX_I2C_ADDR, - .driver = &amd_fp6_usb_mux_driver, - .next_mux = &usbc1_sbu_mux, - } -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); - -struct ioexpander_config_t ioex_config[] = { - [USBC_PORT_C0] = { - .i2c_host_port = I2C_PORT_TCPC0, - .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, - .drv = &nct38xx_ioexpander_drv, - }, - [USBC_PORT_C1] = { - .i2c_host_port = I2C_PORT_TCPC1, - .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, - .drv = &nct38xx_ioexpander_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(ioex_config) == USBC_PORT_COUNT); -BUILD_ASSERT(CONFIG_IO_EXPANDER_PORT_COUNT == USBC_PORT_COUNT); - -const struct pwm_t pwm_channels[] = { - [PWM_CH_FAN] = { - .channel = 0, - .flags = PWM_CONFIG_OPEN_DRAIN, - .freq = 25000, - }, - [PWM_CH_LED1] = { - .channel = 2, - .flags = PWM_CONFIG_DSLEEP, - .freq = 100, - }, - [PWM_CH_LED2] = { - .channel = 3, - .flags = PWM_CONFIG_DSLEEP, - .freq = 100, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -const struct mft_t mft_channels[] = { - [MFT_CH_0] = { - .module = NPCX_MFT_MODULE_1, - .clk_src = TCKC_LFCLK, - .pwm_id = PWM_CH_FAN, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); - -const struct fan_conf fan_conf_0 = { - .flags = FAN_USE_RPM_MODE, - .ch = MFT_CH_0, /* Use MFT id to control fan */ - .pgood_gpio = -1, - .enable_gpio = -1, -}; - -const struct fan_rpm fan_rpm_0 = { - .rpm_min = 1000, - .rpm_start = 1000, - .rpm_max = 4500, -}; - -const struct fan_t fans[] = { - [FAN_CH_0] = { - .conf = &fan_conf_0, - .rpm = &fan_rpm_0, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(fans) == FAN_CH_COUNT); - -/* - * USB C0/C1 port SBU mux use standalone FSUSB42UMX - * chip and it needs a board specific driver. - * Overall, it will use chained mux framework. - */ -static int fsusb42umx_set_mux(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - bool inverted = mux_state & USB_PD_MUX_POLARITY_INVERTED; - - /* This driver does not use host command ACKs */ - *ack_required = false; - - if (me->usb_port == USBC_PORT_C0) - RETURN_ERROR(ioex_set_level(IOEX_USB_C0_SBU_FLIP, inverted)); - else if (me->usb_port == USBC_PORT_C1) - RETURN_ERROR(ioex_set_level(IOEX_USB_C1_SBU_FLIP, inverted)); - - return EC_SUCCESS; -} - -#define BJ_DEBOUNCE_MS 1000 /* Debounce time for BJ plug/unplug */ - -static int8_t bj_connected = -1; - -static void bj_connect_deferred(void) -{ - struct charge_port_info pi = { 0 }; - int connected = !gpio_get_level(GPIO_BJ_ADP_PRESENT_L); - - /* Debounce */ - if (connected == bj_connected) - return; - - if (connected) - board_get_bj_power(&pi.voltage, &pi.current); - - charge_manager_update_charge(CHARGE_SUPPLIER_DEDICATED, - DEDICATED_CHARGE_PORT, &pi); - bj_connected = connected; -} -DECLARE_DEFERRED(bj_connect_deferred); - -/* IRQ for BJ plug/unplug. It shouldn't be called if BJ is the power source. */ -void baseboard_bj_connect_interrupt(enum gpio_signal signal) -{ - hook_call_deferred(&bj_connect_deferred_data, BJ_DEBOUNCE_MS * MSEC); -} - -static void charge_port_init(void) -{ - /* - * Initialize all charge suppliers to 0. The charge manager waits until - * all ports have reported in before doing anything. - */ - for (int i = 0; i < CHARGE_PORT_COUNT; i++) { - for (int j = 0; j < CHARGE_SUPPLIER_COUNT; j++) - charge_manager_update_charge(j, i, NULL); - } - - /* Report charge state from the barrel jack. */ - bj_connect_deferred(); -} -DECLARE_HOOK(HOOK_INIT, charge_port_init, HOOK_PRIO_CHARGE_MANAGER_INIT + 1); - -int board_set_active_charge_port(int port) -{ - int rv, i; - - CPRINTSUSB("Requested charge port change to %d", port); - - /* - * The charge manager may ask us to switch to no charger if we're - * running off USB-C only but upstream doesn't support PD. It requires - * that we accept this switch otherwise it triggers an assert and EC - * reset; it's not possible to boot the AP anyway, but we want to avoid - * resetting the EC so we can continue to do the "low power" LED blink. - */ - if (port == CHARGE_PORT_NONE) - return EC_SUCCESS; - - if (port < 0 || CHARGE_PORT_COUNT <= port) - return EC_ERROR_INVAL; - - if (port == charge_manager_get_active_charge_port()) - return EC_SUCCESS; - - /* Don't charge from a source port */ - if (board_vbus_source_enabled(port)) - return EC_ERROR_INVAL; - - if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) { - int bj_active, bj_requested; - - if (charge_manager_get_active_charge_port() != CHARGE_PORT_NONE) - /* Change is only permitted while the system is off */ - return EC_ERROR_INVAL; - - /* - * Current setting is no charge port but the AP is on, so the - * charge manager is out of sync (probably because we're - * reinitializing after sysjump). Reject requests that aren't - * in sync with our outputs. - */ - bj_active = !gpio_get_level(GPIO_EN_PPVAR_BJ_ADP_L); - bj_requested = port == CHARGE_PORT_BARRELJACK; - if (bj_active != bj_requested) - return EC_ERROR_INVAL; - } - - /* Make sure BJ adapter is sourcing power */ - if (port == CHARGE_PORT_BARRELJACK && - gpio_get_level(GPIO_BJ_ADP_PRESENT_L)) { - CPRINTSUSB("BJ port selected, but not present!"); - return EC_ERROR_INVAL; - } - - CPRINTSUSB("New charger p%d", port); - - /* - * Disable PPCs on all ports which aren't enabled. - * - * Note: this assumes that the CHARGE_PORT_ enum is ordered with the - * type-c ports first always. - */ - for (i = 0; i < board_get_usb_pd_port_count(); i++) { - if (i == port) - continue; - - rv = ppc_vbus_sink_enable(i, 0); - if (rv) { - CPRINTSUSB("Failed to disable C%d sink path", i); - return rv; - } - } - - switch (port) { - case CHARGE_PORT_TYPEC0: - case CHARGE_PORT_TYPEC1: - gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_L, 1); - rv = ppc_vbus_sink_enable(port, 1); - if (rv) { - CPRINTSUSB("Failed to enable sink path"); - return rv; - } - break; - case CHARGE_PORT_BARRELJACK: - gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_L, 0); - break; - default: - return EC_ERROR_INVAL; - } - - return EC_SUCCESS; -} - -int board_is_i2c_port_powered(int port) -{ - if (port == I2C_PORT_THERMAL_AP) - /* SOC thermal i2c bus is unpowered in S0i3/S3/S5/Z1 */ - return chipset_in_state(CHIPSET_STATE_ANY_OFF | - CHIPSET_STATE_ANY_SUSPEND) ? 0 : 1; - /* All other i2c ports are always powered when EC is powered */ - return 1; -} - -/* - * In the AOZ1380 PPC, there are no programmable features. We use - * the attached NCT3807 to control a GPIO to indicate 1A5 or 3A0 - * current limits. - */ -int board_aoz1380_set_vbus_source_current_limit(int port, - enum tcpc_rp_value rp) -{ - int rv; - - /* Use the TCPC to set the current limit */ - rv = ioex_set_level(IOEX_USB_C0_PPC_ILIM_3A_EN, - (rp == TYPEC_RP_3A0) ? 1 : 0); - - return rv; -} - -/* Called when the charge manager has switched to a new port. */ -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - /* TODO: blink led if power insufficient */ -} - -int extpower_is_present(void) -{ - return 1; -} - -void sbu_fault_interrupt(enum ioex_signal signal) -{ - int port = (signal == IOEX_USB_C0_SBU_FAULT_ODL) ? 0 : 1; - - pd_handle_overcurrent(port); -} - -void hdmi_fault_interrupt(enum gpio_signal signal) -{ - /* TODO: Report HDMI fault */ -} - -void dp_fault_interrupt(enum gpio_signal signal) -{ - /* TODO: Report DP fault */ -} - -void ext_charger_interrupt(enum gpio_signal signal) -{ - /* TODO: Handle ext charger interrupt */ -} - -void tcpc_alert_event(enum gpio_signal signal) -{ - int port; - - switch (signal) { - case GPIO_USB_C0_TCPC_INT_ODL: - port = 0; - break; - case GPIO_USB_C1_TCPC_INT_ODL: - port = 1; - break; - default: - return; - } - - schedule_deferred_pd_interrupt(port); -} - -static void reset_pd_port(int port, enum gpio_signal reset_gpio_l, - int hold_delay, int post_delay) -{ - gpio_set_level(reset_gpio_l, 0); - msleep(hold_delay); - gpio_set_level(reset_gpio_l, 1); - if (post_delay) - msleep(post_delay); -} - - -void board_reset_pd_mcu(void) -{ - /* Reset TCPC0 */ - reset_pd_port(USBC_PORT_C0, GPIO_USB_C0_TCPC_RST_L, - NCT38XX_RESET_HOLD_DELAY_MS, - NCT3807_RESET_POST_DELAY_MS); - - /* Reset TCPC1 */ - reset_pd_port(USBC_PORT_C1, GPIO_USB_C1_TCPC_RST_L, - NCT38XX_RESET_HOLD_DELAY_MS, - NCT3807_RESET_POST_DELAY_MS); -} - -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - /* - * Check which port has the ALERT line set and ignore if that TCPC has - * its reset line active. - */ - if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) { - if (gpio_get_level(GPIO_USB_C0_TCPC_RST_L) != 0) - status |= PD_STATUS_TCPC_ALERT_0; - } - - if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) { - if (gpio_get_level(GPIO_USB_C1_TCPC_RST_L) != 0) - status |= PD_STATUS_TCPC_ALERT_1; - } - - return status; -} - -void ppc_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_PPC_INT_ODL: - aoz1380_interrupt(USBC_PORT_C0); - break; - - case GPIO_USB_C1_PPC_INT_ODL: - nx20p348x_interrupt(USBC_PORT_C1); - break; - - default: - break; - } -} - -void bc12_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_BC12_INT_ODL: - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); - break; - - case GPIO_USB_C1_BC12_INT_ODL: - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); - break; - - default: - break; - } -} - -/** - * b/175324615: On G3->S5, wait for RSMRST_L to be deasserted before asserting - * PCH_PWRBTN_L. - */ -void board_pwrbtn_to_pch(int level) -{ - timestamp_t start; - const uint32_t timeout_rsmrst_rise_us = 30 * MSEC; - - /* Add delay for G3 exit if asserting PWRBTN_L and RSMRST_L is low. */ - if (!level && !gpio_get_level(GPIO_PCH_RSMRST_L)) { - start = get_time(); - do { - usleep(200); - if (gpio_get_level(GPIO_PCH_RSMRST_L)) - break; - } while (time_since32(start) < timeout_rsmrst_rise_us); - - if (!gpio_get_level(GPIO_PCH_RSMRST_L)) - ccprints("Error pwrbtn: RSMRST_L still low"); - - msleep(G3_TO_PWRBTN_DELAY_MS); - } - gpio_set_level(GPIO_PCH_PWRBTN_L, level); -} - -static void baseboard_chipset_suspend(void) -{ - /* TODO: Handle baseboard chipset suspend */ -} -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, baseboard_chipset_suspend, - HOOK_PRIO_DEFAULT); - -static void baseboard_chipset_resume(void) -{ - /* Enable the DP redriver, which powers on in S0 */ - tdp142_set_ctlsel(TDP142_CTLSEL_ENABLED); -} -DECLARE_HOOK(HOOK_CHIPSET_RESUME, baseboard_chipset_resume, HOOK_PRIO_DEFAULT); - -static bool ocp_tracker[CONFIG_USB_PD_PORT_MAX_COUNT]; - -static void set_usb_fault_output(void) -{ - bool fault_present = false; - int i; - - /* - * EC must OR all fault alerts and pass them to USB_FAULT_ODL, including - * overcurrents. - */ - for (i = 0; i < board_get_usb_pd_port_count(); i++) - if (ocp_tracker[i]) - fault_present = true; - - fault_present = fault_present || - !gpio_get_level(GPIO_USB_A4_FAULT_R_ODL) || - !gpio_get_level(GPIO_USB_A3_FAULT_R_ODL) || - !gpio_get_level(GPIO_USB_A2_FAULT_R_ODL) || - !gpio_get_level(GPIO_USB_A1_FAULT_R_ODL) || - !gpio_get_level(GPIO_USB_A0_FAULT_R_ODL); - - gpio_set_level(GPIO_USB_FAULT_ODL, !fault_present); -} - -void board_overcurrent_event(int port, int is_overcurrented) -{ - switch (port) { - case USBC_PORT_C0: - case USBC_PORT_C1: - ocp_tracker[port] = is_overcurrented; - set_usb_fault_output(); - break; - - default: - break; - } -} - -void baseboard_usb_fault_alert(enum gpio_signal signal) -{ - set_usb_fault_output(); -} - -void baseboard_en_pwr_pcore_s0(enum gpio_signal signal) -{ - - /* EC must AND signals PG_LPDDR4X_S3_OD and PG_GROUPC_S0_OD */ - gpio_set_level(GPIO_EN_PWR_PCORE_S0_R, - gpio_get_level(GPIO_PG_DDR4_S3_OD) && - gpio_get_level(GPIO_PG_GROUPC_S0_OD)); -} - -void baseboard_en_pwr_s0(enum gpio_signal signal) -{ - - /* EC must AND signals SLP_S3_L and PG_PWR_S5 */ - gpio_set_level(GPIO_EN_PWR_S0_R, - gpio_get_level(GPIO_SLP_S3_L) && - gpio_get_level(GPIO_PG_PWR_S5)); - - /* Now chain off to the normal power signal interrupt handler. */ - power_signal_interrupt(signal); -} diff --git a/baseboard/mancomb/baseboard.h b/baseboard/mancomb/baseboard.h deleted file mode 100644 index 4a6fd102dc..0000000000 --- a/baseboard/mancomb/baseboard.h +++ /dev/null @@ -1,336 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Mancomb baseboard configuration */ - -#ifndef __CROS_EC_BASEBOARD_H -#define __CROS_EC_BASEBOARD_H - -/* NPCX9 config */ -#define CONFIG_PORT80_4_BYTE -#define NPCX9_PWM1_SEL 1 /* GPIO C2 is used as PWM1. */ -#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ - -/* Optional features */ -#define CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ -#define CONFIG_LTO /* Link-Time Optimizations to reduce code size */ -#define CONFIG_I2C_DEBUG /* Print i2c traces */ - -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 - -/* Vboot Config */ -#define CONFIG_CRC8 -#define CONFIG_VBOOT_EFS2 -#define CONFIG_VBOOT_HASH -#define CONFIG_VSTORE -#define CONFIG_VSTORE_SLOT_COUNT 1 -#define GPIO_PACKET_MODE_EN GPIO_EC_GSC_PACKET_MODE - -/* CBI Config */ -#define CONFIG_CBI_EEPROM -#define CONFIG_BOARD_VERSION_CBI - -/* Undefs because Box */ -#undef CONFIG_LID_SWITCH -#undef CONFIG_HIBERNATE -#undef CONFIG_KEYBOARD_BOOT_KEYS -#undef CONFIG_KEYBOARD_PRINT_SCAN_TIMES - -/* Power Config */ -#define CONFIG_CHIPSET_X86_RSMRST_DELAY -#define CONFIG_DEDICATED_RECOVERY_BUTTON -#define CONFIG_DEDICATED_RECOVERY_BUTTON_2 -#undef CONFIG_EXTPOWER_DEBOUNCE_MS -#define CONFIG_EXTPOWER_DEBOUNCE_MS 16 -#define CONFIG_LOW_POWER_IDLE -#define CONFIG_POWER_BUTTON -#define CONFIG_POWER_BUTTON_IGNORE_LID -#define CONFIG_POWER_BUTTON_INIT_IDLE -#define CONFIG_POWER_BUTTON_TO_PCH_CUSTOM -#define CONFIG_POWER_BUTTON_X86 -#define CONFIG_POWER_COMMON -#define CONFIG_POWER_S0IX -#define CONFIG_POWER_SLEEP_FAILURE_DETECTION -#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE -#define G3_TO_PWRBTN_DELAY_MS 80 -#define GPIO_EN_PWR_A GPIO_EN_PWR_S5 -#define GPIO_PCH_PWRBTN_L GPIO_EC_SOC_PWR_BTN_L -#define GPIO_PCH_RSMRST_L GPIO_EC_SOC_RSMRST_L -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S3_S0I3_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PCH_SLP_S5_L GPIO_SLP_S5_L -#define GPIO_PCH_SYS_PWROK GPIO_EC_SOC_PWR_GOOD -#define GPIO_PCH_WAKE_L GPIO_EC_SOC_WAKE_L -#define GPIO_POWER_BUTTON_L GPIO_MECH_PWR_BTN_ODL -#define GPIO_RECOVERY_L GPIO_EC_RECOVERY_BTN_ODL -#define GPIO_RECOVERY_L_2 GPIO_GSC_EC_RECOVERY_BTN_ODL -#define GPIO_S0_PGOOD GPIO_PG_PCORE_S0_R_OD -#define GPIO_S5_PGOOD GPIO_PG_PWR_S5 -#define GPIO_SYS_RESET_L GPIO_EC_SYS_RST_L -#define SAFE_RESET_VBUS_DELAY_MS 900 -#define SAFE_RESET_VBUS_MV 5000 - -/* - * On power-on, H1 releases the EC from reset but then quickly asserts and - * releases the reset a second time. This means the EC sees 2 resets: - * (1) power-on reset, (2) reset-pin reset. This config will - * allow the second reset to be treated as a power-on. - */ -#define CONFIG_BOARD_RESET_AFTER_POWER_ON - -/* Thermal Config */ -#define CONFIG_ADC -#define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B -#define CONFIG_THROTTLE_AP -#define CONFIG_TEMP_SENSOR_SB_TSI -#define CONFIG_THERMISTOR -#define CONFIG_CPU_PROCHOT_ACTIVE_LOW -#define GPIO_CPU_PROCHOT GPIO_PROCHOT_ODL -#define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_EN_PWR_S5 - -/* Flash Config */ -/* See config_chip-npcx9.h for SPI flash configuration */ -#undef CONFIG_SPI_FLASH /* Don't enable external flash interface */ -#define GPIO_WP_L GPIO_EC_WP_L - -/* Host communication */ -#define CONFIG_CMD_CHARGEN -#define CONFIG_HOSTCMD_ESPI -#define CONFIG_MKBP_EVENT -#define CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT -#define GPIO_EC_INT_L GPIO_EC_SOC_INT_L - -/* Chipset config */ -#define CONFIG_CHIPSET_CEZANNE -#define CONFIG_CHIPSET_CAN_THROTTLE -#define CONFIG_CHIPSET_RESET_HOOK - -/* Charger Config */ -#define CONFIG_CHARGE_MANAGER -#undef CONFIG_CHARGE_MANAGER_SAFE_MODE -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 50000 -#define ADC_VBUS SNS_PPVAR_PWR_IN - -/* Dedicated barreljack charger port */ -#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT -#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 -#define DEDICATED_CHARGE_PORT CONFIG_USB_PD_PORT_MAX_COUNT - -/* DisplayPort redriver */ -#define CONFIG_DP_REDRIVER_TDP142 -#define TDP142_I2C_PORT I2C_PORT_USB_HUB -#define TDP142_I2C_ADDR TDP142_I2C_ADDR3 - -/* USB Type C and USB PD config */ -#define CONFIG_USB_PD_REV30 -#define CONFIG_USB_PD_TCPMV2 -#define CONFIG_USB_PD_DECODE_SOP -#define CONFIG_USB_DRP_ACC_TRYSRC -/* TODO: Enable TCPMv2 Fast Role Swap (FRS) */ -#define CONFIG_HOSTCMD_PD_CONTROL -#define CONFIG_CMD_TCPC_DUMP -#define CONFIG_USB_CHARGER -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE_DFP -#define CONFIG_USB_PD_DISCHARGE_TCPC -#define CONFIG_USB_PD_DP_HPD_GPIO -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -#define CONFIG_USB_PD_LOGGING -#define CONFIG_USB_PD_TCPC_LOW_POWER -#define CONFIG_USB_PD_TCPM_MUX -#define CONFIG_USB_PD_TCPM_NCT38XX -#define CONFIG_USB_PD_TCPM_TCPCI -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_VBUS_DETECT_TCPC -#define CONFIG_USBC_PPC -#define CONFIG_USBC_PPC_SBU -#define CONFIG_USBC_PPC_AOZ1380 -#define CONFIG_USBC_RETIMER_PI3HDX1204 -#define CONFIG_USBC_SS_MUX -#define CONFIG_USBC_SS_MUX_DFP_ONLY -#define CONFIG_USBC_VCONN -#define CONFIG_USBC_VCONN_SWAP -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USBC_PPC_NX20P3483 -#define CONFIG_USBC_RETIMER_PS8818 -#define CONFIG_USB_MUX_AMD_FP6 - -#define GPIO_USB_C0_DP_HPD GPIO_USB_C0_HPD -#define GPIO_USB_C1_DP_HPD GPIO_USB_C1_HPD - -#define CONFIG_IO_EXPANDER -#define CONFIG_IO_EXPANDER_NCT38XX -#define CONFIG_IO_EXPANDER_PORT_COUNT USBC_PORT_COUNT - -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ - -#define PD_OPERATING_POWER_MW CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON -#define PD_MAX_CURRENT_MA 5000 -#define PD_MAX_VOLTAGE_MV 20000 -/* Max Power = 100 W */ -#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000) - -/* USB-A config */ -#define USB_PORT_COUNT USBA_PORT_COUNT -#define CONFIG_USB_PORT_POWER_SMART -#define CONFIG_USB_PORT_POWER_SMART_CDP_SDP_ONLY -#define CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE USB_CHARGE_MODE_CDP -#define CONFIG_USB_PORT_POWER_SMART_INVERTED - -#define GPIO_USB1_ILIM_SEL IOEX_USB_A0_LIMIT_SDP -#define GPIO_USB2_ILIM_SEL IOEX_USB_A1_LIMIT_SDP - -/* Round up 3250 max current to multiple of 128mA for ISL9241 AC prochot. */ -#define MANCOMB_AC_PROCHOT_CURRENT_MA 3328 - -/* - * USB ID - This is allocated specifically for Mancomb - */ -#define CONFIG_USB_PID 0x504D - -/* BC 1.2 */ -/* - * For legacy BC1.2 charging with CONFIG_CHARGE_RAMP_SW, ramp up input current - * until voltage drops to 4.5V. Don't go lower than this to be kind to the - * charger (see b/67964166). - */ -#define BC12_MIN_VOLTAGE 4500 -#define CONFIG_BC12_DETECT_PI3USB9201 - -/* I2C Bus Configuration */ -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER -#define CONFIG_I2C_UPDATE_IF_CHANGED -#define I2C_PORT_TCPC0 NPCX_I2C_PORT0_0 -#define I2C_PORT_TCPC1 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_HUB NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_MUX NPCX_I2C_PORT3_0 -#define I2C_PORT_POWER NPCX_I2C_PORT4_1 -#define I2C_PORT_EEPROM NPCX_I2C_PORT5_0 -#define I2C_PORT_SENSOR NPCX_I2C_PORT6_1 -#define I2C_PORT_THERMAL_AP NPCX_I2C_PORT7_0 -#define I2C_ADDR_EEPROM_FLAGS 0x50 - -/* Fan Config */ -#define CONFIG_FANS FAN_CH_COUNT -/* TODO: Set CONFIG_FAN_INIT_SPEED, defaults to 100 */ - -/* LED Config */ -#define CONFIG_PWM - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -/* Power input signals */ -enum power_signal { - X86_SLP_S0_N, /* SOC -> SLP_S3_S0I3_L */ - X86_SLP_S3_N, /* SOC -> SLP_S3_L */ - X86_SLP_S5_N, /* SOC -> SLP_S5_L */ - - X86_S0_PGOOD, /* PMIC -> S0_PWROK_OD */ - X86_S5_PGOOD, /* PMIC -> S5_PWROK */ - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT, -}; - -/* USB-C ports */ -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; - -enum charge_port { - CHARGE_PORT_TYPEC0, - CHARGE_PORT_TYPEC1, - CHARGE_PORT_BARRELJACK, - CHARGE_PORT_COUNT -}; - -/* - * USB-A ports - * Port A1-A4 are controlled by the USB HUB - */ -enum usba_port { - USBA_PORT_A0 = 0, - USBA_PORT_A1, - USBA_PORT_A2, - USBA_PORT_A3, - USBA_PORT_A4, - USBA_PORT_COUNT -}; - -/* ADC Channels */ -enum adc_channel { - ADC_TEMP_SENSOR_SOC = 0, - ANALOG_PPVAR_PWR_IN_IMON, - ADC_TEMP_SENSOR_MEMORY, - SNS_PPVAR_PWR_IN, - ADC_TEMP_SENSOR_AMBIENT, - ADC_CH_COUNT -}; - -/* Temp Sensors */ -enum temp_sensor_id { - TEMP_SENSOR_SOC = 0, - TEMP_SENSOR_MEMORY, - TEMP_SENSOR_AMBIENT, - TEMP_SENSOR_CPU, - TEMP_SENSOR_COUNT -}; - -/* PWM Channels */ -enum pwm_channel { - PWM_CH_FAN = 0, - PWM_CH_LED1, - PWM_CH_LED2, - PWM_CH_COUNT -}; - -/* Fan Channels */ -enum fan_channel { - FAN_CH_0 = 0, - /* Number of FAN channels */ - FAN_CH_COUNT, -}; - -enum mft_channel { - MFT_CH_0 = 0, - /* Number of MFT channels */ - MFT_CH_COUNT, -}; - -/* Baseboard Interrupt handlers. */ -void baseboard_bj_connect_interrupt(enum gpio_signal signal); -void baseboard_en_pwr_pcore_s0(enum gpio_signal signal); -void baseboard_en_pwr_s0(enum gpio_signal signal); -void baseboard_usb_fault_alert(enum gpio_signal signal); -void bc12_interrupt(enum gpio_signal signal); -void ext_charger_interrupt(enum gpio_signal signal); -void dp_fault_interrupt(enum gpio_signal signal); -void hdmi_fault_interrupt(enum gpio_signal signal); -void ppc_interrupt(enum gpio_signal signal); -void sbu_fault_interrupt(enum ioex_signal signal); -void tcpc_alert_event(enum gpio_signal signal); - -/* Required board functions */ -void board_get_bj_power(int *voltage, int *current); - -/* CBI utility functions */ -uint32_t get_sku_id(void); -uint32_t get_board_version(void); -uint32_t get_fw_config(void); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/mancomb/build.mk b/baseboard/mancomb/build.mk deleted file mode 100644 index 391bd70ab2..0000000000 --- a/baseboard/mancomb/build.mk +++ /dev/null @@ -1,15 +0,0 @@ -# -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Mancomb baseboard specific files build -# - -CHIP:=npcx -CHIP_FAMILY:=npcx9 -CHIP_VARIANT:=npcx9m3f - -baseboard-y=baseboard.o -baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o -baseboard-$(CONFIG_CBI_EEPROM)+=cbi.o
\ No newline at end of file diff --git a/baseboard/mancomb/cbi.c b/baseboard/mancomb/cbi.c deleted file mode 100644 index f5fdac8539..0000000000 --- a/baseboard/mancomb/cbi.c +++ /dev/null @@ -1,97 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Mancomb CrOS Board Info(CBI) utilities */ - -#include "console.h" -#include "common.h" -#include "cros_board_info.h" -#include "hooks.h" - -#define UNINITIALIZED_FW_CONFIG 0xFFFFFFFF - -uint32_t get_sku_id(void) -{ - static uint32_t sku_id; - - if (sku_id == 0) { - uint32_t val; - - if (cbi_get_sku_id(&val) != EC_SUCCESS) - return 0; - sku_id = val; - } - return sku_id; -} - -uint32_t get_board_version(void) -{ - static uint32_t board_version; - - if (board_version == 0) { - uint32_t val; - - if (cbi_get_board_version(&val) != EC_SUCCESS) - return -1; - board_version = val; - } - return board_version; -} - -uint32_t get_fw_config(void) -{ - static uint32_t fw_config = UNINITIALIZED_FW_CONFIG; - - if (fw_config == UNINITIALIZED_FW_CONFIG) { - uint32_t val; - - if (cbi_get_fw_config(&val) != EC_SUCCESS) - return UNINITIALIZED_FW_CONFIG; - fw_config = val; - } - return fw_config; -} - - -int get_fw_config_field(uint8_t offset, uint8_t width) -{ - uint32_t fw_config = get_fw_config(); - - if (fw_config == UNINITIALIZED_FW_CONFIG) - return -1; - - return (fw_config >> offset) & ((1 << width) - 1); -} - - -__overridable void board_cbi_init(void) -{ -} - -static void cbi_init(void) -{ - uint32_t board_ver = get_board_version(); - uint32_t sku_id = get_sku_id(); - uint32_t fw_config = get_fw_config(); - - if (board_ver != 0) - ccprints("Board Version: %d (0x%x)", board_ver, board_ver); - else - ccprints("Board Version: not set in cbi"); - - if (sku_id != 0) - ccprints("SKU ID: %d (0x%x)", sku_id, sku_id); - else - ccprints("SKU ID: not set in cbi"); - - if (fw_config != UNINITIALIZED_FW_CONFIG) - ccprints("FW Config: %d (0x%x)", fw_config, fw_config); - else - ccprints("FW Config: not set in cbi"); - - /* Allow the board project to make runtime changes based on CBI data */ - board_cbi_init(); -} -DECLARE_HOOK(HOOK_INIT, cbi_init, HOOK_PRIO_INIT_I2C + 1); diff --git a/baseboard/mancomb/usb_pd_policy.c b/baseboard/mancomb/usb_pd_policy.c deleted file mode 100644 index 66b565382b..0000000000 --- a/baseboard/mancomb/usb_pd_policy.c +++ /dev/null @@ -1,81 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Shared USB-C policy for Zork boards */ - -#include "charge_manager.h" -#include "chipset.h" -#include "common.h" -#include "compile_time_macros.h" -#include "console.h" -#include "ec_commands.h" -#include "gpio.h" -#include "system.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usbc_ppc.h" -#include "util.h" - -int pd_check_vconn_swap(int port) -{ - /* - * Do not allow vconn swap 5V rail is off - * S5_PGOOD depends on PG_PP5000_S5 being asserted, - * so GPIO_S5_PGOOD is a reasonable proxy for PP5000_S5 - */ - return gpio_get_level(GPIO_S5_PGOOD); -} - -void pd_power_supply_reset(int port) -{ - /* - * Don't need to shutoff VBus if we are not sourcing it - * TODO: Ensure Vbus sourcing is being disabled appropriately to - * avoid invalid TC states - */ - if (ppc_is_sourcing_vbus(port)) { - /* Disable VBUS. */ - ppc_vbus_source_enable(port, 0); - - /* Enable discharge if we were previously sourcing 5V */ - if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) - pd_set_vbus_discharge(port, 1); - } - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_set_power_supply_ready(int port) -{ - int rv; - - /* Disable charging. */ - rv = ppc_vbus_sink_enable(port, 0); - if (rv) - return rv; - - if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) - pd_set_vbus_discharge(port, 0); - - /* Provide Vbus. */ - rv = ppc_vbus_source_enable(port, 1); - if (rv) - return rv; - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; -} - -int board_vbus_source_enabled(int port) -{ - /* Answer is always "no" from the BJ port */ - if (port >= CONFIG_USB_PD_PORT_MAX_COUNT) - return 0; - - return ppc_is_sourcing_vbus(port); -} |