diff options
Diffstat (limited to 'board/adlrvpp_mchp1521/board.h')
| -rw-r--r-- | board/adlrvpp_mchp1521/board.h | 109 |
1 files changed, 58 insertions, 51 deletions
diff --git a/board/adlrvpp_mchp1521/board.h b/board/adlrvpp_mchp1521/board.h index a76fbd87df..bcd46acf25 100644 --- a/board/adlrvpp_mchp1521/board.h +++ b/board/adlrvpp_mchp1521/board.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,6 +17,14 @@ #include "adlrvp.h" +#undef CONFIG_CMD_ADC +#undef CONFIG_CMD_APTHROTTLE +#undef CONFIG_CMD_BATTFAKE +#undef CONFIG_CMD_GETTIME + +/* Enable LTO */ +#define CONFIG_LTO + /* * Macros for GPIO signals used in common code that don't match the * schematic names. Signal names in gpio.inc match the schematic and are @@ -24,77 +32,76 @@ * which purpose. */ /* Power sequencing */ -#define GPIO_EC_SPI_OE_N GPIO_EC_PCH_SPI_OE_N -#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_ALL_SYS_PWRGD -#define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_PWRGD_EC_N -#define GPIO_PCH_SLP_S0_L GPIO_PM_SLP_S0_R_N -#define GPIO_PG_EC_DSW_PWROK GPIO_EC_TRACE_DATA_2 -#define GPIO_VCCST_PWRGD GPIO_EC_TRACE_DATA_3 -#define GPIO_SLP_SUS_L GPIO_PM_SLP_SUS_N -#define GPIO_SYS_RESET_L GPIO_DG2_PRESENT -#define GPIO_PCH_RSMRST_L GPIO_PM_RSMRST_R -#define GPIO_PCH_PWRBTN_L GPIO_PM_PWRBTN_N_R -#define GPIO_EN_PP3300_A GPIO_EC_DS3_R -#define GPIO_SYS_PWROK_EC GPIO_SYS_PWROK_EC_R -#define GPIO_PCH_DSW_PWROK GPIO_EC_TRACE_DATA_1 +#define GPIO_EC_SPI_OE_N GPIO_EC_PCH_SPI_OE_N +#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_ALL_SYS_PWRGD +#define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_PWRGD_EC_N +#define GPIO_PCH_SLP_S0_L GPIO_PM_SLP_S0_R_N +#define GPIO_PG_EC_DSW_PWROK GPIO_EC_TRACE_DATA_2 +#define GPIO_VCCST_PWRGD GPIO_EC_TRACE_DATA_3 +#define GPIO_SLP_SUS_L GPIO_PM_SLP_SUS_N +#define GPIO_SYS_RESET_L GPIO_DG2_PRESENT +#define GPIO_PCH_RSMRST_L GPIO_PM_RSMRST_R +#define GPIO_PCH_PWRBTN_L GPIO_PM_PWRBTN_N_R +#define GPIO_EN_PP3300_A GPIO_EC_DS3_R +#define GPIO_SYS_PWROK_EC GPIO_SYS_PWROK_EC_R +#define GPIO_PCH_DSW_PWROK GPIO_EC_TRACE_DATA_1 /* Buttons */ -#define GPIO_LID_OPEN GPIO_SMC_LID -#define GPIO_VOLUME_UP_L GPIO_VOL_UP_EC -#define GPIO_VOLUME_DOWN_L GPIO_VOL_DOWN_EC -#define GPIO_POWER_BUTTON_L GPIO_PWRBTN_EC_IN_N +#define GPIO_LID_OPEN GPIO_SMC_LID +#define GPIO_VOLUME_UP_L GPIO_VOL_UP_EC +#define GPIO_VOLUME_DOWN_L GPIO_VOL_DOWN_EC +#define GPIO_POWER_BUTTON_L GPIO_PWRBTN_EC_IN_N /* Sensors */ -#define GPIO_TABLET_MODE_L GPIO_EC_SLATEMODE_HALLOUT_SNSR_R -#define GPIO_CPU_PROCHOT GPIO_PROCHOT_EC_R +#define GPIO_TABLET_MODE_L GPIO_EC_SLATEMODE_HALLOUT_SNSR_R +#define GPIO_CPU_PROCHOT GPIO_PROCHOT_EC_R /* AC & Battery */ -#define GPIO_DC_JACK_PRESENT GPIO_STD_ADP_PRSNT_EC -#define GPIO_AC_PRESENT GPIO_BC_ACOK_EC_IN -#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BATT_ID_R +#define GPIO_DC_JACK_PRESENT GPIO_STD_ADP_PRSNT_EC +#define GPIO_AC_PRESENT GPIO_BC_ACOK_EC_IN +#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BATT_ID_R /* eSPI/Host communication */ -#define GPIO_ESPI_RESET_L GPIO_ESPI_RST_EC_R_N -#define GPIO_PCH_WAKE_L GPIO_SMC_WAKE_SCI_N -#define GPIO_EC_INT_L GPIO_EC_TRACE_DATA_0 +#define GPIO_ESPI_RESET_L GPIO_ESPI_RST_EC_R_N +#define GPIO_PCH_WAKE_L GPIO_SMC_WAKE_SCI_N +#define GPIO_EC_INT_L GPIO_EC_TRACE_DATA_0 /* H1 */ -#define GPIO_WP_L GPIO_EC_WAKE_CLK_R -#define GPIO_PACKET_MODE_EN GPIO_EC_TRACE_CLK -#define GPIO_ENTERING_RW GPIO_DNX_FORCE_RELOAD_EC_R +#define GPIO_WP_L GPIO_EC_WAKE_CLK_R +#define GPIO_PACKET_MODE_EN GPIO_EC_TRACE_CLK +#define GPIO_ENTERING_RW GPIO_DNX_FORCE_RELOAD_EC_R /* FAN */ -#define GPIO_FAN_POWER_EN GPIO_FAN_PWR_DISABLE +#define GPIO_FAN_POWER_EN GPIO_FAN_PWR_DISABLE /* LEDs */ -#define GPIO_BAT_LED_RED_L GPIO_PM_BAT_STATUS_LED2 -#define GPIO_PWR_LED_WHITE_L GPIO_PM_PWRBTN_LED +#define GPIO_BAT_LED_RED_L GPIO_PM_BAT_STATUS_LED2 +#define GPIO_PWR_LED_WHITE_L GPIO_PM_PWRBTN_LED /* Uart */ -#define GPIO_UART2_RX GPIO_EC_UART_RX +#define GPIO_UART2_RX GPIO_EC_UART_RX /* Case Closed Debug Mode interrupt */ -#define GPIO_CCD_MODE_ODL GPIO_KBC_NUMLOCK +#define GPIO_CCD_MODE_ODL GPIO_KBC_NUMLOCK /* USB-C interrupts */ -#define GPIO_USBC_TCPC_ALRT_P0 GPIO_TYPEC_EC_SMBUS_ALERT_0_R -#define GPIO_USBC_TCPC_ALRT_P1 GPIO_TYPEC_EC_SMBUS_ALERT_1_R -#define GPIO_USBC_TCPC_PPC_ALRT_P0 GPIO_KBC_SCANOUT_15 -#define GPIO_USBC_TCPC_PPC_ALRT_P1 GPIO_KBC_CAPSLOCK - +#define GPIO_USBC_TCPC_ALRT_P0 GPIO_TYPEC_EC_SMBUS_ALERT_0_R +#define GPIO_USBC_TCPC_ALRT_P1 GPIO_TYPEC_EC_SMBUS_ALERT_1_R +#define GPIO_USBC_TCPC_PPC_ALRT_P0 GPIO_KBC_SCANOUT_15 +#define GPIO_USBC_TCPC_PPC_ALRT_P1 GPIO_KBC_CAPSLOCK /* I2C ports & Configs */ /* Charger */ -#define I2C_PORT_CHARGER MCHP_I2C_PORT0 +#define I2C_PORT_CHARGER MCHP_I2C_PORT0 /* Port 80 */ -#define I2C_PORT_PORT80 MCHP_I2C_PORT0 +#define I2C_PORT_PORT80 MCHP_I2C_PORT0 /* Board ID */ -#define I2C_PORT_PCA9555_BOARD_ID_GPIO MCHP_I2C_PORT0 +#define I2C_PORT_PCA9555_BOARD_ID_GPIO MCHP_I2C_PORT0 /* Battery */ -#define I2C_PORT_BATTERY MCHP_I2C_PORT0 +#define I2C_PORT_BATTERY MCHP_I2C_PORT0 /* USB-C I2C */ -#define I2C_PORT_TYPEC_0 MCHP_I2C_PORT1 -#define I2C_PORT_TYPEC_1 MCHP_I2C_PORT5 +#define I2C_PORT_TYPEC_0 MCHP_I2C_PORT1 +#define I2C_PORT_TYPEC_1 MCHP_I2C_PORT5 /* * MEC1521H loads firmware using QMSPI controller @@ -109,8 +116,8 @@ * is of size 512KB. This bin is then later appended with 0xFF to become 32MB * binary for flashing purpose. */ -#define CONFIG_FLASH_SIZE_BYTES (512 * 1024) -#define CONFIG_SPI_FLASH_W25X40 /* TODO: change to W25R256 */ +#define CONFIG_FLASH_SIZE_BYTES (512 * 1024) +#define CONFIG_SPI_FLASH_W25X40 /* TODO: change to W25R256 */ /* ADC channels */ /* @@ -122,10 +129,10 @@ #undef ADC_TEMP_SNS_DDR_CHANNEL #undef ADC_TEMP_SNS_SKIN_CHANNEL -#define ADC_TEMP_SNS_AMBIENT_CHANNEL CHIP_ADC_CH4 -#define ADC_TEMP_SNS_VR_CHANNEL CHIP_ADC_CH5 -#define ADC_TEMP_SNS_DDR_CHANNEL CHIP_ADC_CH6 -#define ADC_TEMP_SNS_SKIN_CHANNEL CHIP_ADC_CH7 +#define ADC_TEMP_SNS_AMBIENT_CHANNEL CHIP_ADC_CH4 +#define ADC_TEMP_SNS_VR_CHANNEL CHIP_ADC_CH5 +#define ADC_TEMP_SNS_DDR_CHANNEL CHIP_ADC_CH6 +#define ADC_TEMP_SNS_SKIN_CHANNEL CHIP_ADC_CH7 /* To do: Remove once fan register details are added in mchp/fan.c */ #undef CONFIG_FANS |