1 files changed, 367 insertions, 0 deletions
diff --git a/board/draco/usbc_config.c b/board/draco/usbc_config.c
new file mode 100644
index 0000000000..1475e1f536
--- /dev/null
+++ b/board/draco/usbc_config.c
@@ -0,0 +1,367 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "cbi.h"
+#include "charger.h"
+#include "charge_ramp.h"
+#include "common.h"
+#include "compile_time_macros.h"
+#include "console.h"
+#include "driver/bc12/pi3usb9201_public.h"
+#include "driver/ppc/nx20p348x.h"
+#include "driver/ppc/syv682x_public.h"
+#include "driver/tcpm/nct38xx.h"
+#include "driver/tcpm/ps8xxx_public.h"
+#include "driver/tcpm/tcpci.h"
+#include "ec_commands.h"
+#include "fw_config.h"
+#include "gpio.h"
+#include "gpio_signal.h"
+#include "hooks.h"
+#include "system.h"
+#include "task.h"
+#include "task_id.h"
+#include "timer.h"
+#include "usbc_config.h"
+#include "usbc_ppc.h"
+#include "usb_charge.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usb_pd_tcpm.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+/* USBC TCPC configuration */
+const struct tcpc_config_t tcpc_config[] = {
+	[USBC_PORT_C0] = {
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_USB_C0_C2_TCPC,
+			.addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
+		},
+		.drv = &nct38xx_tcpm_drv,
+		.flags = TCPC_FLAGS_TCPCI_REV2_0 |
+			TCPC_FLAGS_NO_DEBUG_ACC_CONTROL,
+	},
+	[USBC_PORT_C1] = {
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_USB_C1_TCPC,
+			.addr_flags = PS8751_I2C_ADDR1_FLAGS,
+		},
+		.drv = &ps8xxx_tcpm_drv,
+		.flags = TCPC_FLAGS_TCPCI_REV2_0 |
+			 TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V |
+			 TCPC_FLAGS_CONTROL_VCONN,
+	},
+	[USBC_PORT_C2] = {
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_USB_C0_C2_TCPC,
+			.addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS,
+		},
+		.drv = &nct38xx_tcpm_drv,
+		.flags = TCPC_FLAGS_TCPCI_REV2_0,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT);
+BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT);
+
+/******************************************************************************/
+/* USB-A charging control */
+
+const int usb_port_enable[USB_PORT_COUNT] = {
+	GPIO_EN_PP5000_USBA_R,
+};
+BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT);
+
+/******************************************************************************/
+
+/* USBC PPC configuration */
+struct ppc_config_t ppc_chips[] = {
+	[USBC_PORT_C0] = {
+		.i2c_port = I2C_PORT_USB_C0_C2_PPC,
+		.i2c_addr_flags = SYV682X_ADDR0_FLAGS,
+		.drv = &syv682x_drv,
+	},
+	[USBC_PORT_C1] = {
+		/* Compatible with Silicon Mitus SM536A0 */
+		.i2c_port = I2C_PORT_USB_C1_PPC,
+		.i2c_addr_flags = NX20P3483_ADDR2_FLAGS,
+		.drv = &nx20p348x_drv,
+	},
+	[USBC_PORT_C2] = {
+		.i2c_port = I2C_PORT_USB_C0_C2_PPC,
+		.i2c_addr_flags = SYV682X_ADDR2_FLAGS,
+		.drv = &syv682x_drv,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT);
+
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+/* USBC mux configuration - Alder Lake includes internal mux */
+static const struct usb_mux usbc0_tcss_usb_mux = {
+	.usb_port = USBC_PORT_C0,
+	.driver = &virtual_usb_mux_driver,
+	.hpd_update = &virtual_hpd_update,
+};
+static const struct usb_mux usbc2_tcss_usb_mux = {
+	.usb_port = USBC_PORT_C2,
+	.driver = &virtual_usb_mux_driver,
+	.hpd_update = &virtual_hpd_update,
+};
+
+/*
+ * USB3 DB mux configuration - the top level mux still needs to be set
+ * to the virtual_usb_mux_driver so the AP gets notified of mux changes
+ * and updates the TCSS configuration on state changes.
+ */
+static const struct usb_mux usbc1_usb3_db_retimer = {
+	.usb_port = USBC_PORT_C1,
+	.driver = &tcpci_tcpm_usb_mux_driver,
+	.hpd_update = &ps8xxx_tcpc_update_hpd_status,
+};
+
+const struct usb_mux usb_muxes[] = {
+	[USBC_PORT_C0] = {
+		.usb_port = USBC_PORT_C0,
+		.driver = &virtual_usb_mux_driver,
+		.hpd_update = &virtual_hpd_update,
+		.next_mux = &usbc0_tcss_usb_mux,
+	},
+	[USBC_PORT_C1] = {
+		.usb_port = USBC_PORT_C1,
+		.driver = &virtual_usb_mux_driver,
+		.hpd_update = &virtual_hpd_update,
+		.next_mux = &usbc1_usb3_db_retimer,
+	},
+	[USBC_PORT_C2] = {
+		.usb_port = USBC_PORT_C2,
+		.driver = &virtual_usb_mux_driver,
+		.hpd_update = virtual_hpd_update,
+		.next_mux = &usbc2_tcss_usb_mux,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT);
+
+/* BC1.2 charger detect configuration */
+const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
+	[USBC_PORT_C0] = {
+		.i2c_port = I2C_PORT_USB_C0_C2_BC12,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
+	},
+	[USBC_PORT_C1] = {
+		.i2c_port = I2C_PORT_USB_C1_BC12,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
+	},
+	[USBC_PORT_C2] = {
+		.i2c_port = I2C_PORT_USB_C0_C2_BC12,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT);
+
+#ifdef CONFIG_CHARGE_RAMP_SW
+
+#define BC12_MIN_VOLTAGE 4400
+
+/**
+ * Return true if VBUS is too low
+ */
+int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state)
+{
+	int voltage;
+
+	if (charger_get_vbus_voltage(port, &voltage))
+		voltage = 0;
+
+	if (voltage == 0) {
+		CPRINTS("%s: must be disconnected", __func__);
+		return 1;
+	}
+
+	if (voltage < BC12_MIN_VOLTAGE) {
+		CPRINTS("%s: port %d: vbus %d lower than %d", __func__,
+			port, voltage, BC12_MIN_VOLTAGE);
+		return 1;
+	}
+
+	return 0;
+}
+
+#endif /* CONFIG_CHARGE_RAMP_SW */
+
+void config_usb_db_type(void)
+{
+	enum ec_cfg_usb_db_type db_type = ec_cfg_usb_db_type();
+
+	CPRINTS("Configured USB DB type number is %d", db_type);
+}
+
+void board_reset_pd_mcu(void)
+{
+	enum gpio_signal tcpc_rst;
+
+	tcpc_rst = GPIO_USB_C0_C2_TCPC_RST_ODL;
+
+	gpio_set_level(tcpc_rst, 0);
+	if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
+		gpio_set_level(GPIO_USB_C1_RST_ODL, 0);
+		gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
+	}
+
+	/*
+	 * delay for power-on to reset-off and min. assertion time
+	 */
+
+	msleep(20);
+
+	gpio_set_level(tcpc_rst, 1);
+	if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
+		gpio_set_level(GPIO_USB_C1_RST_ODL, 1);
+		gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
+	}
+
+	/* wait for chips to come up */
+
+	msleep(50);
+}
+
+static void board_tcpc_init(void)
+{
+	/* Don't reset TCPCs after initial reset */
+	if (!system_jumped_late())
+		board_reset_pd_mcu();
+
+	/* Enable PPC interrupts. */
+	gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C2_PPC_INT_ODL);
+
+	/* Enable TCPC interrupts. */
+	gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL);
+
+	/* Enable BC1.2 interrupts. */
+	gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL);
+
+	if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
+		gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
+		gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
+		gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL);
+	}
+}
+DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET);
+
+uint16_t tcpc_get_alert_status(void)
+{
+	uint16_t status = 0;
+
+	if (gpio_get_level(GPIO_USB_C0_C2_TCPC_INT_ODL) == 0)
+		status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2;
+
+	if ((ec_cfg_usb_db_type() != DB_USB_ABSENT) &&
+	    gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0)
+		status |= PD_STATUS_TCPC_ALERT_1;
+
+	return status;
+}
+
+int ppc_get_alert_status(int port)
+{
+	if (port == USBC_PORT_C0)
+		return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0;
+	else if ((port == USBC_PORT_C1) &&
+		 (ec_cfg_usb_db_type() != DB_USB_ABSENT))
+		return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0;
+	else if (port == USBC_PORT_C2)
+		return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0;
+	return 0;
+}
+
+void tcpc_alert_event(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_USB_C0_C2_TCPC_INT_ODL:
+		schedule_deferred_pd_interrupt(USBC_PORT_C0);
+		break;
+	case GPIO_USB_C1_TCPC_INT_ODL:
+		if (ec_cfg_usb_db_type() == DB_USB_ABSENT)
+			break;
+		schedule_deferred_pd_interrupt(USBC_PORT_C1);
+		break;
+	default:
+		break;
+	}
+}
+
+void bc12_interrupt(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_USB_C0_BC12_INT_ODL:
+		task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12);
+		break;
+	case GPIO_USB_C1_BC12_INT_ODL:
+		if (ec_cfg_usb_db_type() == DB_USB_ABSENT)
+			break;
+		task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12);
+		break;
+	case GPIO_USB_C2_BC12_INT_ODL:
+		task_set_event(TASK_ID_USB_CHG_P2, USB_CHG_EVENT_BC12);
+		break;
+	default:
+		break;
+	}
+}
+
+void ppc_interrupt(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_USB_C0_PPC_INT_ODL:
+		syv682x_interrupt(USBC_PORT_C0);
+		break;
+	case GPIO_USB_C1_PPC_INT_ODL:
+		switch (ec_cfg_usb_db_type()) {
+		case DB_USB_ABSENT:
+		case DB_USB_ABSENT2:
+			break;
+		case DB_USB3_PS8815:
+			nx20p348x_interrupt(USBC_PORT_C1);
+			break;
+		}
+		break;
+	case GPIO_USB_C2_PPC_INT_ODL:
+		syv682x_interrupt(USBC_PORT_C2);
+		break;
+	default:
+		break;
+	}
+}
+
+void retimer_interrupt(enum gpio_signal signal)
+{
+}
+
+__override bool board_is_dts_port(int port)
+{
+	return port == USBC_PORT_C0;
+}
+
+__override bool board_is_tbt_usb4_port(int port)
+{
+	return false;
+}
+
+__override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port)
+{
+	if (!board_is_tbt_usb4_port(port))
+		return TBT_SS_RES_0;
+
+	return TBT_SS_TBT_GEN3;
+}