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-rw-r--r--board/panqueque/board.c100
-rw-r--r--board/panqueque/board.h14
-rw-r--r--board/panqueque/build.mk2
-rw-r--r--board/panqueque/ec.tasklist2
-rw-r--r--board/panqueque/gpio.inc2
5 files changed, 57 insertions, 63 deletions
diff --git a/board/panqueque/board.c b/board/panqueque/board.c
index cea834c75e..786fe5f5aa 100644
--- a/board/panqueque/board.c
+++ b/board/panqueque/board.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -28,8 +28,8 @@
#include "usb_tc_sm.h"
#include "util.h"
-#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args)
+#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args)
#define QUICHE_PD_DEBUG_LVL 1
@@ -84,25 +84,25 @@ static void board_usbc_usb3_interrupt(enum gpio_signal signal)
* signals is driven by USB/MST hub power sequencing requirements.
*/
const struct power_seq board_power_seq[] = {
- {GPIO_EN_AC_JACK, 1, 20},
- {GPIO_EC_DFU_MUX_CTRL, 0, 0},
- {GPIO_EN_PP5000_A, 1, 31},
- {GPIO_MST_LP_CTL_L, 1, 0},
- {GPIO_EN_PP3300_B, 1, 1},
- {GPIO_EN_PP1100_A, 1, 100+30},
- {GPIO_EN_BB, 1, 30},
- {GPIO_EN_PP1050_A, 1, 30},
- {GPIO_EN_PP1200_A, 1, 20},
- {GPIO_EN_PP5000_C, 1, 20},
- {GPIO_EN_PP5000_HSPORT, 1, 31},
- {GPIO_EN_DP_SINK, 1, 80},
- {GPIO_MST_RST_L, 1, 61},
- {GPIO_EC_HUB2_RESET_L, 1, 41},
- {GPIO_EC_HUB3_RESET_L, 1, 33},
- {GPIO_DP_SINK_RESET, 1, 100},
- {GPIO_USBC_UF_RESET_L, 1, 33},
- {GPIO_DEMUX_DP_HDMI_PD_N, 1, 10},
- {GPIO_DEMUX_DP_HDMI_MODE, 1, 5},
+ { GPIO_EN_AC_JACK, 1, 20 },
+ { GPIO_EC_DFU_MUX_CTRL, 0, 0 },
+ { GPIO_EN_PP5000_A, 1, 31 },
+ { GPIO_MST_LP_CTL_L, 1, 0 },
+ { GPIO_EN_PP3300_B, 1, 1 },
+ { GPIO_EN_PP1100_A, 1, 100 + 30 },
+ { GPIO_EN_BB, 1, 30 },
+ { GPIO_EN_PP1050_A, 1, 30 },
+ { GPIO_EN_PP1200_A, 1, 20 },
+ { GPIO_EN_PP5000_C, 1, 20 },
+ { GPIO_EN_PP5000_HSPORT, 1, 31 },
+ { GPIO_EN_DP_SINK, 1, 80 },
+ { GPIO_MST_RST_L, 1, 61 },
+ { GPIO_EC_HUB2_RESET_L, 1, 41 },
+ { GPIO_EC_HUB3_RESET_L, 1, 33 },
+ { GPIO_DP_SINK_RESET, 1, 100 },
+ { GPIO_USBC_UF_RESET_L, 1, 33 },
+ { GPIO_DEMUX_DP_HDMI_PD_N, 1, 10 },
+ { GPIO_DEMUX_DP_HDMI_MODE, 1, 5 },
};
const size_t board_power_seq_count = ARRAY_SIZE(board_power_seq);
@@ -110,13 +110,13 @@ const size_t board_power_seq_count = ARRAY_SIZE(board_power_seq);
* Define the strings used in our USB descriptors.
*/
const void *const usb_strings[] = {
- [USB_STR_DESC] = usb_string_desc,
- [USB_STR_VENDOR] = USB_STRING_DESC("Plugable"),
- [USB_STR_PRODUCT] = USB_STRING_DESC("UC-MSTHDC"),
- [USB_STR_SERIALNO] = 0,
- [USB_STR_VERSION] =
- USB_STRING_DESC(CROS_EC_SECTION ":" CROS_EC_VERSION32),
- [USB_STR_UPDATE_NAME] = USB_STRING_DESC("Firmware update"),
+ [USB_STR_DESC] = usb_string_desc,
+ [USB_STR_VENDOR] = USB_STRING_DESC("Plugable"),
+ [USB_STR_PRODUCT] = USB_STRING_DESC("UC-MSTHDC"),
+ [USB_STR_SERIALNO] = 0,
+ [USB_STR_VERSION] =
+ USB_STRING_DESC(CROS_EC_SECTION ":" CROS_EC_VERSION32),
+ [USB_STR_UPDATE_NAME] = USB_STRING_DESC("Firmware update"),
};
BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
@@ -135,8 +135,7 @@ struct ppc_config_t ppc_chips[] = {
* PS8802 set mux board tuning.
* Adds in board specific gain and DP lane count configuration
*/
-static int board_ps8822_mux_set(const struct usb_mux *me,
- mux_state_t mux_state)
+static int board_ps8822_mux_set(const struct usb_mux *me, mux_state_t mux_state)
{
int rv = EC_SUCCESS;
@@ -155,28 +154,26 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
},
};
-const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+const struct usb_mux_chain usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
[USB_PD_PORT_HOST] = {
- .usb_port = USB_PD_PORT_HOST,
- .i2c_port = I2C_PORT_I2C1,
- .i2c_addr_flags = PS8822_I2C_ADDR3_FLAG,
- .driver = &ps8822_usb_mux_driver,
- .board_set = &board_ps8822_mux_set,
+ .mux = &(const struct usb_mux) {
+ .usb_port = USB_PD_PORT_HOST,
+ .i2c_port = I2C_PORT_I2C1,
+ .i2c_addr_flags = PS8822_I2C_ADDR3_FLAG,
+ .driver = &ps8822_usb_mux_driver,
+ .board_set = &board_ps8822_mux_set,
+ },
},
};
/* USB-C PPC Configuration */
struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = {
- [USB_PD_PORT_HOST] = {
- .i2c_port = I2C_PORT_I2C1,
- .i2c_addr_flags = SN5S330_ADDR0_FLAGS,
- .drv = &sn5s330_drv
- },
- [USB_PD_PORT_USB3] = {
- .i2c_port = I2C_PORT_I2C3,
- .i2c_addr_flags = SN5S330_ADDR1_FLAGS,
- .drv = &sn5s330_drv
- },
+ [USB_PD_PORT_HOST] = { .i2c_port = I2C_PORT_I2C1,
+ .i2c_addr_flags = SN5S330_ADDR0_FLAGS,
+ .drv = &sn5s330_drv },
+ [USB_PD_PORT_USB3] = { .i2c_port = I2C_PORT_I2C3,
+ .i2c_addr_flags = SN5S330_ADDR1_FLAGS,
+ .drv = &sn5s330_drv },
};
unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
@@ -284,14 +281,13 @@ static void board_usb_tc_disconnect(void)
if (port == USB_PD_PORT_HOST)
gpio_set_level(GPIO_UFP_PLUG_DET, 1);
}
-DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, board_usb_tc_disconnect,\
+DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, board_usb_tc_disconnect,
HOOK_PRIO_DEFAULT);
#endif /* SECTION_IS_RW */
static void board_init(void)
{
-
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
@@ -328,7 +324,7 @@ void board_debug_gpio(enum debug_gpio trigger, int level, int pulse_usec)
}
}
-static int command_dplane(int argc, char **argv)
+static int command_dplane(int argc, const char **argv)
{
char *e;
int lane;
@@ -356,6 +352,4 @@ static int command_dplane(int argc, char **argv)
return EC_SUCCESS;
}
-DECLARE_CONSOLE_COMMAND(dplane, command_dplane,
- "<2 | 4>",
- "MST lane control.");
+DECLARE_CONSOLE_COMMAND(dplane, command_dplane, "<2 | 4>", "MST lane control.");
diff --git a/board/panqueque/board.h b/board/panqueque/board.h
index 39aed68f8e..24eeebabe5 100644
--- a/board/panqueque/board.h
+++ b/board/panqueque/board.h
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -21,8 +21,8 @@
#undef CONFIG_FLASH_PSTATE_LOCKED
/* USB Type C and USB PD defines */
-#define USB_PD_PORT_HOST 0
-#define USB_PD_PORT_USB3 1
+#define USB_PD_PORT_HOST 0
+#define USB_PD_PORT_USB3 1
/*
* Only the host and display usbc ports are usb-pd capable. There is a 2nd usbc
@@ -40,9 +40,9 @@
#define CONFIG_USB_PD_IDENTITY_SW_VERS 1
/* I2C port names */
-#define I2C_PORT_I2C1 0
-#define I2C_PORT_I2C2 1
-#define I2C_PORT_I2C3 2
+#define I2C_PORT_I2C1 0
+#define I2C_PORT_I2C2 1
+#define I2C_PORT_I2C3 2
/* Required symbolic I2C port names */
#define I2C_PORT_MP4245 I2C_PORT_I2C3
@@ -68,7 +68,7 @@
#define GPIO_TRIGGER_1 GPIO_USB3_A5_CDP_EN
#define GPIO_TRIGGER_2 GPIO_USB3_A6_CDP_EN
-enum debug_gpio {
+enum debug_gpio {
TRIGGER_1 = 0,
TRIGGER_2,
};
diff --git a/board/panqueque/build.mk b/board/panqueque/build.mk
index 49775523af..8f9795eca9 100644
--- a/board/panqueque/build.mk
+++ b/board/panqueque/build.mk
@@ -1,5 +1,5 @@
# -*- makefile -*-
-# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Copyright 2022 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
diff --git a/board/panqueque/ec.tasklist b/board/panqueque/ec.tasklist
index 7a67fce776..7bd8acaa5f 100644
--- a/board/panqueque/ec.tasklist
+++ b/board/panqueque/ec.tasklist
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/board/panqueque/gpio.inc b/board/panqueque/gpio.inc
index fa1b900c82..4fd80ec754 100644
--- a/board/panqueque/gpio.inc
+++ b/board/panqueque/gpio.inc
@@ -1,6 +1,6 @@
/* -*- mode:c -*-
*
- * Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
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