diff options
Diffstat (limited to 'board/samus/power_sequence.c')
| -rw-r--r-- | board/samus/power_sequence.c | 45 |
1 files changed, 13 insertions, 32 deletions
diff --git a/board/samus/power_sequence.c b/board/samus/power_sequence.c index cac9647a44..804d3ef208 100644 --- a/board/samus/power_sequence.c +++ b/board/samus/power_sequence.c @@ -111,41 +111,22 @@ static void chipset_reset_rtc(void) udelay(10 * MSEC); } -void chipset_reset(int cold_reset) +void chipset_reset(void) { - CPRINTS("%s(%d)", __func__, cold_reset); - if (cold_reset) { - /* - * Drop and restore PWROK. This causes the PCH to reboot, - * regardless of its after-G3 setting. This type of reboot - * causes the PCH to assert PLTRST#, SLP_S3#, and SLP_S5#, so - * we actually drop power to the rest of the system (hence, a - * "cold" reboot). - */ - - /* Ignore if PWROK is already low */ - if (gpio_get_level(GPIO_PCH_PWROK) == 0) - return; - - /* PWROK must deassert for at least 3 RTC clocks = 91 us */ - gpio_set_level(GPIO_PCH_PWROK, 0); - udelay(100); - gpio_set_level(GPIO_PCH_PWROK, 1); + CPRINTS("%s", __func__); - } else { - /* - * Send a RCIN# pulse to the PCH. This just causes it to - * assert INIT# to the CPU without dropping power or asserting - * PLTRST# to reset the rest of the system. - */ + /* + * Send a RCIN# pulse to the PCH. This just causes it to + * assert INIT# to the CPU without dropping power or asserting + * PLTRST# to reset the rest of the system. + */ - /* - * Pulse must be at least 16 PCI clocks long = 500 ns. - */ - gpio_set_level(GPIO_PCH_RCIN_L, 0); - udelay(10); - gpio_set_level(GPIO_PCH_RCIN_L, 1); - } + /* + * Pulse must be at least 16 PCI clocks long = 500 ns. + */ + gpio_set_level(GPIO_PCH_RCIN_L, 0); + udelay(10); + gpio_set_level(GPIO_PCH_RCIN_L, 1); } void chipset_throttle_cpu(int throttle) |