diff options
Diffstat (limited to 'board/samus_pd')
| -rw-r--r-- | board/samus_pd/board.c | 613 | ||||
| -rw-r--r-- | board/samus_pd/board.h | 149 | ||||
| -rw-r--r-- | board/samus_pd/build.mk | 17 | ||||
| -rw-r--r-- | board/samus_pd/ec.tasklist | 17 | ||||
| -rw-r--r-- | board/samus_pd/gpio.inc | 137 | ||||
| -rw-r--r-- | board/samus_pd/usb_mux.c | 115 | ||||
| -rw-r--r-- | board/samus_pd/usb_pd_config.h | 278 | ||||
| -rw-r--r-- | board/samus_pd/usb_pd_policy.c | 388 |
8 files changed, 0 insertions, 1714 deletions
diff --git a/board/samus_pd/board.c b/board/samus_pd/board.c deleted file mode 100644 index 69a67f6e44..0000000000 --- a/board/samus_pd/board.c +++ /dev/null @@ -1,613 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* samus_pd board configuration */ - -#include "adc.h" -#include "adc_chip.h" -#include "battery.h" -#include "charge_manager.h" -#include "charge_ramp.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "pi3usb9281.h" -#include "power.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "registers.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "usb_charge.h" -#include "usb_descriptor.h" -#include "usb_pd.h" -#include "util.h" - -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) - -/* - * When battery is high, system may not be pulling full current. Also, when - * high AND input voltage is below boost bypass, then limit input current - * limit to HIGH_BATT_LIMIT_CURR_MA to reduce audible ringing. - */ -#define HIGH_BATT_THRESHOLD 90 -#define HIGH_BATT_LIMIT_BOOST_BYPASS_MV 11000 -#define HIGH_BATT_LIMIT_CURR_MA 2000 - -/* Chipset power state */ -static enum power_state ps; - -/* Battery state of charge */ -static int batt_soc; - -/* Default to 5V charging allowed for dead battery case */ -static enum pd_charge_state charge_state = PD_CHARGE_5V; - -/* PD MCU status and host event status for host command */ -static int32_t host_event_status_flags; -static int32_t pd_status_flags; - -static struct ec_response_pd_status pd_status; - -/* Desired input current limit */ -static int desired_charge_rate_ma = -1; - -/* PWM channels. Must be in the exact same order as in enum pwm_channel. */ -const struct pwm_t pwm_channels[] = { - {STM32_TIM(15), STM32_TIM_CH(2), 0}, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -struct mutex pericom_mux_lock; -struct pi3usb9281_config pi3usb9281_chips[] = { - { - .i2c_port = I2C_PORT_PERICOM, - .mux_gpio = GPIO_USB_C_BC12_SEL, - .mux_gpio_level = 0, - .mux_lock = &pericom_mux_lock, - }, - { - .i2c_port = I2C_PORT_PERICOM, - .mux_gpio = GPIO_USB_C_BC12_SEL, - .mux_gpio_level = 1, - .mux_lock = &pericom_mux_lock, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pi3usb9281_chips) == - CONFIG_BC12_DETECT_PI3USB9281_CHIP_COUNT); - -static void pericom_port0_reenable_interrupts(void) -{ - CPRINTS("VBUS p0 %d", gpio_get_level(GPIO_USB_C0_VBUS_WAKE)); - pi3usb9281_enable_interrupts(0); -} -DECLARE_DEFERRED(pericom_port0_reenable_interrupts); - -static void pericom_port1_reenable_interrupts(void) -{ - CPRINTS("VBUS p1 %d", gpio_get_level(GPIO_USB_C1_VBUS_WAKE)); - pi3usb9281_enable_interrupts(1); -} -DECLARE_DEFERRED(pericom_port1_reenable_interrupts); - -void vbus0_evt(enum gpio_signal signal) -{ - usb_charger_vbus_change(0, gpio_get_level(signal)); - task_wake(TASK_ID_PD_C0); -} - -void vbus1_evt(enum gpio_signal signal) -{ - usb_charger_vbus_change(1, gpio_get_level(signal)); - task_wake(TASK_ID_PD_C1); -} - -void usb0_evt(enum gpio_signal signal) -{ - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12, 0); -} - -void usb1_evt(enum gpio_signal signal) -{ - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12, 0); -} - -static void chipset_s5_to_s3(void) -{ - ps = POWER_S3; - hook_notify(HOOK_CHIPSET_STARTUP); -} - -static void chipset_s3_to_s0(void) -{ - /* Disable deep sleep and restore charge override port */ - disable_sleep(SLEEP_MASK_AP_RUN); - ps = POWER_S0; - hook_notify(HOOK_CHIPSET_RESUME); -} - -static void chipset_s3_to_s5(void) -{ - ps = POWER_S5; - hook_notify(HOOK_CHIPSET_SHUTDOWN); -} - -static void chipset_s0_to_s3(void) -{ - /* Enable deep sleep and store charge override port */ - enable_sleep(SLEEP_MASK_AP_RUN); - ps = POWER_S3; - hook_notify(HOOK_CHIPSET_SUSPEND); -} - -static void pch_evt_deferred(void) -{ - /* Determine new chipset state, trigger corresponding transition */ - switch (ps) { - case POWER_S5: - if (gpio_get_level(GPIO_PCH_SLP_S5_L)) - chipset_s5_to_s3(); - if (gpio_get_level(GPIO_PCH_SLP_S3_L)) - chipset_s3_to_s0(); - break; - case POWER_S3: - if (gpio_get_level(GPIO_PCH_SLP_S3_L)) - chipset_s3_to_s0(); - else if (!gpio_get_level(GPIO_PCH_SLP_S5_L)) - chipset_s3_to_s5(); - break; - case POWER_S0: - if (!gpio_get_level(GPIO_PCH_SLP_S3_L)) - chipset_s0_to_s3(); - if (!gpio_get_level(GPIO_PCH_SLP_S5_L)) - chipset_s3_to_s5(); - break; - default: - break; - } -} -DECLARE_DEFERRED(pch_evt_deferred); - -void pch_evt(enum gpio_signal signal) -{ - hook_call_deferred(&pch_evt_deferred_data, 0); -} - -void board_config_pre_init(void) -{ - /* enable SYSCFG clock */ - STM32_RCC_APB2ENR |= BIT(0); - /* - * the DMA mapping is : - * Chan 2 : TIM1_CH1 (C0 RX) - * Chan 3 : SPI1_TX (C1 TX) - * Chan 4 : USART1_TX - * Chan 5 : USART1_RX - * Chan 6 : TIM3_CH1 (C1 RX) - * Chan 7 : SPI2_TX (C0 TX) - */ - - /* - * Remap USART1 RX/TX DMA to match uart driver. Remap SPI2 RX/TX and - * TIM3_CH1 for unique DMA channels. - */ - STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10) | BIT(24) | BIT(30); -} - -#include "gpio_list.h" - -/* Initialize board. */ -static void board_init(void) -{ - int slp_s5 = gpio_get_level(GPIO_PCH_SLP_S5_L); - int slp_s3 = gpio_get_level(GPIO_PCH_SLP_S3_L); - - /* - * Enable CC lines after all GPIO have been initialized. Note, it is - * important that this is enabled after the CC_ODL lines are set low - * to specify device mode. - */ - gpio_set_level(GPIO_USB_C_CC_EN, 1); - - /* Enable interrupts on VBUS transitions. */ - gpio_enable_interrupt(GPIO_USB_C0_VBUS_WAKE); - gpio_enable_interrupt(GPIO_USB_C1_VBUS_WAKE); - - /* Enable pericom BC1.2 interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); - - /* Determine initial chipset state */ - if (slp_s5 && slp_s3) { - disable_sleep(SLEEP_MASK_AP_RUN); - hook_notify(HOOK_CHIPSET_RESUME); - ps = POWER_S0; - } else if (slp_s5 && !slp_s3) { - enable_sleep(SLEEP_MASK_AP_RUN); - hook_notify(HOOK_CHIPSET_STARTUP); - ps = POWER_S3; - } else { - enable_sleep(SLEEP_MASK_AP_RUN); - hook_notify(HOOK_CHIPSET_SHUTDOWN); - ps = POWER_S5; - } - - /* Enable interrupts on PCH state change */ - gpio_enable_interrupt(GPIO_PCH_SLP_S3_L); - gpio_enable_interrupt(GPIO_PCH_SLP_S5_L); - - /* Initialize active charge port to none */ - pd_status.active_charge_port = CHARGE_PORT_NONE; - - /* Set PD MCU system status bits */ - if (system_jumped_to_this_image()) - pd_status_flags |= PD_STATUS_JUMPED_TO_IMAGE; - if (system_is_in_rw()) - pd_status_flags |= PD_STATUS_IN_RW; - -#ifdef CONFIG_PWM - /* Enable ILIM PWM: initial duty cycle 0% = 500mA limit. */ - pwm_enable(PWM_CH_ILIM, 1); - pwm_set_duty(PWM_CH_ILIM, 0); -#endif -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -/* ADC channels */ -const struct adc_t adc_channels[] = { - /* USB PD CC lines sensing. Converted to mV (3300mV/4096). */ - [ADC_C0_CC1_PD] = {"C0_CC1_PD", 3300, 4096, 0, STM32_AIN(0)}, - [ADC_C1_CC1_PD] = {"C1_CC1_PD", 3300, 4096, 0, STM32_AIN(2)}, - [ADC_C0_CC2_PD] = {"C0_CC2_PD", 3300, 4096, 0, STM32_AIN(4)}, - [ADC_C1_CC2_PD] = {"C1_CC2_PD", 3300, 4096, 0, STM32_AIN(5)}, - - /* Vbus sensing. Converted to mV, full ADC is equivalent to 25.774V. */ - [ADC_VBUS] = {"VBUS", 25774, 4096, 0, STM32_AIN(11)}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, - {"slave", I2C_PORT_SLAVE, 100, - GPIO_SLAVE_I2C_SCL, GPIO_SLAVE_I2C_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -int board_get_battery_soc(void) -{ - return batt_soc; -} - -enum battery_present battery_is_present(void) -{ - if (batt_soc >= 0) - return BP_YES; - return BP_NOT_SURE; -} - -static void pd_send_ec_int(void) -{ - gpio_set_level(GPIO_EC_INT, 1); - - /* - * Delay long enough to guarantee EC see's the change. Slowest - * EC clock speed is 250kHz in deep sleep -> 4us, and add 1us - * for buffer. - */ - usleep(5); - - gpio_set_level(GPIO_EC_INT, 0); -} - -/** - * Set active charge port -- only one port can be active at a time. - * - * @param charge_port Charge port to enable. - * - * Returns EC_SUCCESS if charge port is accepted and made active, - * EC_ERROR_* otherwise. - */ -int board_set_active_charge_port(int charge_port) -{ - /* charge port is a realy physical port */ - int is_real_port = (charge_port >= 0 && - charge_port < CONFIG_USB_PD_PORT_MAX_COUNT); - /* check if we are source vbus on that port */ - if (is_real_port && usb_charger_port_is_sourcing_vbus(charge_port)) { - CPRINTS("Skip enable p%d", charge_port); - return EC_ERROR_INVAL; - } - - CPRINTS("New chg p%d", charge_port); - - /* - * If charging and the active charge port is changed, then disable - * charging to guarantee charge circuit starts up cleanly. - */ - if (pd_status.active_charge_port != CHARGE_PORT_NONE && - (charge_port == CHARGE_PORT_NONE || - charge_port != pd_status.active_charge_port)) { - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 1); - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 1); - charge_state = PD_CHARGE_NONE; - pd_status.active_charge_port = charge_port; - CPRINTS("Chg: None"); - return EC_SUCCESS; - } - - /* Save active charge port and enable charging if allowed */ - pd_status.active_charge_port = charge_port; - if (charge_state != PD_CHARGE_NONE) { - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, !(charge_port == 0)); - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, !(charge_port == 1)); - } - - return EC_SUCCESS; -} - -/** - * Return if max voltage charging is allowed. - */ -int pd_is_max_request_allowed(void) -{ - return charge_state == PD_CHARGE_MAX; -} - -/** - * Return if board is consuming full amount of input current - */ -int charge_is_consuming_full_input_current(void) -{ - return batt_soc >= 1 && batt_soc < HIGH_BATT_THRESHOLD; -} - -/* - * Number of VBUS samples to average when computing if VBUS is too low - * for the ramp stable state. - */ -#define VBUS_STABLE_SAMPLE_COUNT 4 - -/* VBUS too low threshold */ -#define VBUS_LOW_THRESHOLD_MV 4600 - -/** - * Return if VBUS is sagging too low - */ -int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) -{ - static int vbus[VBUS_STABLE_SAMPLE_COUNT]; - static int vbus_idx, vbus_samples_full; - int vbus_sum, i; - - /* - * If we are not allowing charging, it's because the EC saw - * ACOK go low, so we know VBUS is drooping too far. - */ - if (charge_state == PD_CHARGE_NONE) - return 1; - - /* If we are ramping, only look at one reading */ - if (ramp_state == CHG_RAMP_VBUS_RAMPING) { - /* Reset the VBUS array vars used for the stable state */ - vbus_idx = vbus_samples_full = 0; - return adc_read_channel(ADC_VBUS) < VBUS_LOW_THRESHOLD_MV; - } - - /* Fill VBUS array with ADC readings */ - vbus[vbus_idx] = adc_read_channel(ADC_VBUS); - vbus_idx = (vbus_idx == VBUS_STABLE_SAMPLE_COUNT-1) ? 0 : vbus_idx + 1; - if (vbus_idx == 0) - vbus_samples_full = 1; - - /* If VBUS array is not full yet, then return ok */ - if (!vbus_samples_full) - return 0; - - /* All VBUS samples are populated, take average */ - vbus_sum = 0; - for (i = 0; i < VBUS_STABLE_SAMPLE_COUNT; i++) - vbus_sum += vbus[i]; - - /* Return if average is lower than threshold */ - return vbus_sum < (VBUS_STABLE_SAMPLE_COUNT * VBUS_LOW_THRESHOLD_MV); -} - -static int board_update_charge_limit(int charge_ma) -{ -#ifdef CONFIG_PWM - int pwm_duty; -#endif - static int actual_charge_rate_ma = -1; - - desired_charge_rate_ma = charge_ma; - - if (batt_soc >= HIGH_BATT_THRESHOLD && - adc_read_channel(ADC_VBUS) < HIGH_BATT_LIMIT_BOOST_BYPASS_MV) - charge_ma = MIN(charge_ma, HIGH_BATT_LIMIT_CURR_MA); - - /* if current hasn't changed, don't do anything */ - if (charge_ma == actual_charge_rate_ma) - return 0; - - actual_charge_rate_ma = charge_ma; - -#ifdef CONFIG_PWM - pwm_duty = MA_TO_PWM(charge_ma); - if (pwm_duty < 0) - pwm_duty = 0; - else if (pwm_duty > 100) - pwm_duty = 100; - - pwm_set_duty(PWM_CH_ILIM, pwm_duty); -#endif - - pd_status.curr_lim_ma = charge_ma >= 500 ? - (charge_ma - 500) * 92 / 100 + 256 : 0; - - CPRINTS("New ilim %d", charge_ma); - return 1; -} - -/** - * Set the charge limit based upon desired maximum. - * - * @param port Port number. - * @param supplier Charge supplier type. - * @param charge_ma Desired charge limit (mA). - * @param charge_mv Negotiated charge voltage (mV). - */ -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - /* Update current limit and notify EC if it changed */ - if (board_update_charge_limit(charge_ma), charge_mv) - pd_send_ec_int(); -} - -static void board_update_battery_soc(int soc) -{ - if (batt_soc != soc) { - batt_soc = soc; - if (batt_soc >= CONFIG_CHARGE_MANAGER_BAT_PCT_SAFE_MODE_EXIT) - charge_manager_leave_safe_mode(); - board_update_charge_limit(desired_charge_rate_ma); - hook_notify(HOOK_BATTERY_SOC_CHANGE); - } -} - -/* Send host event up to AP */ -void pd_send_host_event(int mask) -{ - /* mask must be set */ - if (!mask) - return; - - atomic_or(&(host_event_status_flags), mask); - atomic_or(&(pd_status_flags), PD_STATUS_HOST_EVENT); - pd_send_ec_int(); -} - -/****************************************************************************/ -/* Console commands */ -static int command_ec_int(int argc, char **argv) -{ - pd_send_ec_int(); - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(ecint, command_ec_int, - "", - "Toggle EC interrupt line"); - -static int command_pd_host_event(int argc, char **argv) -{ - int event_mask; - char *e; - - if (argc < 2) - return EC_ERROR_PARAM_COUNT; - - event_mask = strtoi(argv[1], &e, 10); - if (*e) - return EC_ERROR_PARAM1; - - pd_send_host_event(event_mask); - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(pdevent, command_pd_host_event, - "event_mask", - "Send PD host event"); - -/****************************************************************************/ -/* Host commands */ -static enum ec_status ec_status_host_cmd(struct host_cmd_handler_args *args) -{ - const struct ec_params_pd_status *p = args->params; - struct ec_response_pd_status *r = args->response; - - /* update battery soc */ - board_update_battery_soc(p->batt_soc); - - if (p->charge_state != charge_state) { - switch (p->charge_state) { - case PD_CHARGE_NONE: - /* - * No current allowed in, set new power request - * so that PD negotiates down to vSafe5V. - */ - charge_state = p->charge_state; - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 1); - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 1); - pd_set_new_power_request( - pd_status.active_charge_port); - /* - * Wake charge ramp task so that it will check - * board_is_vbus_too_low() and stop ramping up. - */ - task_wake(TASK_ID_CHG_RAMP); - CPRINTS("Chg: None"); - break; - case PD_CHARGE_5V: - /* Allow current on the active charge port */ - charge_state = p->charge_state; - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, - !(pd_status.active_charge_port == 0)); - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, - !(pd_status.active_charge_port == 1)); - CPRINTS("Chg: 5V"); - break; - case PD_CHARGE_MAX: - /* - * Allow negotiation above vSafe5V. Should only - * ever get this command when 5V charging is - * already allowed. - */ - if (charge_state == PD_CHARGE_5V) { - charge_state = p->charge_state; - pd_set_new_power_request( - pd_status.active_charge_port); - CPRINTS("Chg: Max"); - } - break; - default: - break; - } - } - - *r = pd_status; - r->status = pd_status_flags; - - /* Clear host event */ - atomic_clear(&(pd_status_flags), PD_STATUS_HOST_EVENT); - - args->response_size = sizeof(*r); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_PD_EXCHANGE_STATUS, ec_status_host_cmd, - EC_VER_MASK(EC_VER_PD_EXCHANGE_STATUS)); - -static enum ec_status -host_event_status_host_cmd(struct host_cmd_handler_args *args) -{ - struct ec_response_host_event_status *r = args->response; - - /* Clear host event bit to avoid sending more unnecessary events */ - atomic_clear(&(pd_status_flags), PD_STATUS_HOST_EVENT); - - /* Read and clear the host event status to return to AP */ - r->status = atomic_read_clear(&(host_event_status_flags)); - - args->response_size = sizeof(*r); - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_PD_HOST_EVENT_STATUS, host_event_status_host_cmd, - EC_VER_MASK(0)); diff --git a/board/samus_pd/board.h b/board/samus_pd/board.h deleted file mode 100644 index 9fc09340c1..0000000000 --- a/board/samus_pd/board.h +++ /dev/null @@ -1,149 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* samus_pd board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* 48 MHz SYSCLK clock frequency */ -#define CPU_CLOCK 48000000 - -/* the UART console is on USART1 (PA9/PA10) */ -#undef CONFIG_UART_CONSOLE -#define CONFIG_UART_CONSOLE 1 - -/* Optional features */ -#define CONFIG_ADC -#undef CONFIG_ADC_WATCHDOG -#define CONFIG_BOARD_PRE_INIT -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CHARGE_RAMP_SW -#undef CONFIG_CMD_ADC -#undef CONFIG_CMD_CHARGE_SUPPLIER_INFO -#undef CONFIG_CMD_CRASH -#undef CONFIG_CMD_HASH -#undef CONFIG_CMD_HCDEBUG -#undef CONFIG_CMD_I2C_SCAN -#undef CONFIG_CMD_I2C_XFER -/* Minimum ilim = 500 mA */ -#define CONFIG_CHARGER_INPUT_CURRENT PWM_0_MA -#undef CONFIG_CMD_IDLE_STATS -#undef CONFIG_CMD_MD -#undef CONFIG_CMD_SHMEM -#undef CONFIG_CMD_TIMERINFO -#define CONFIG_COMMON_GPIO_SHORTNAMES -#undef CONFIG_CONSOLE_CMDHELP -#undef CONFIG_CONSOLE_HISTORY -#undef CONFIG_DEBUG_ASSERT -#define CONFIG_FORCE_CONSOLE_RESUME -#define CONFIG_HIBERNATE_WAKEUP_PINS (STM32_PWR_CSR_EWUP3|STM32_PWR_CSR_EWUP8) -#define CONFIG_HOSTCMD_ALIGNED -#undef CONFIG_HOSTCMD_EVENTS -#define CONFIG_HW_CRC -#define CONFIG_I2C -#define CONFIG_I2C_MASTER -#define CONFIG_I2C_SLAVE -#undef CONFIG_LID_SWITCH -#define CONFIG_LOW_POWER_IDLE -#define CONFIG_LTO -#undef CONFIG_PWM -#define CONFIG_STM_HWTIMER32 -#undef CONFIG_TASK_PROFILING -#define CONFIG_USB_CHARGER -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE_DFP -#define CONFIG_USB_PD_CHECK_MAX_REQUEST_ALLOWED -#define CONFIG_USB_PD_COMM_LOCKED -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_FLASH_ERASE_CHECK -#define CONFIG_USB_PD_INTERNAL_COMP -#define CONFIG_USB_PD_LOGGING -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USB_PD_TCPC -#define CONFIG_USB_PD_TCPM_STUB -#define CONFIG_USB_PD_VBUS_DETECT_GPIO -#define CONFIG_BC12_DETECT_PI3USB9281 -#define CONFIG_BC12_DETECT_PI3USB9281_CHIP_COUNT 2 -#define CONFIG_USBC_SS_MUX_DFP_ONLY -#define CONFIG_USBC_SS_MUX -#define CONFIG_USBC_VCONN -#define CONFIG_USBC_VCONN_SWAP -#define CONFIG_VBOOT_HASH -#undef CONFIG_WATCHDOG_HELP - -/* Use PSTATE embedded in the RO image, not in its own erase block */ -#undef CONFIG_FLASH_PSTATE_BANK -#undef CONFIG_FW_PSTATE_SIZE -#define CONFIG_FW_PSTATE_SIZE 0 - -/* I2C ports configuration */ -#define I2C_PORT_MASTER 1 -#define I2C_PORT_SLAVE 0 -#define I2C_PORT_EC I2C_PORT_SLAVE -#define I2C_PORT_PERICOM I2C_PORT_MASTER - -/* slave address for host commands */ -#ifdef HAS_TASK_HOSTCMD -#define CONFIG_HOSTCMD_I2C_SLAVE_ADDR_FLAGS CONFIG_USB_PD_I2C_SLAVE_ADDR_FLAGS -#endif - -#ifndef __ASSEMBLER__ - -/* Timer selection */ -#define TIM_CLOCK32 2 -#define TIM_ADC 3 - -#include "gpio_signal.h" - -/* ADC signal */ -enum adc_channel { - ADC_C0_CC1_PD = 0, - ADC_C1_CC1_PD, - ADC_C0_CC2_PD, - ADC_C1_CC2_PD, - ADC_VBUS, - /* Number of ADC channels */ - ADC_CH_COUNT -}; - -enum pwm_channel { - PWM_CH_ILIM = 0, - /* Number of PWM channels */ - PWM_CH_COUNT -}; - -/* Standard-current Rp */ -#define PD_SRC_VNC PD_SRC_DEF_VNC_MV -#define PD_SRC_RD_THRESHOLD PD_SRC_DEF_RD_THRESH_MV - -/* - * delay to turn on the power supply max is ~16ms. - * delay to turn off the power supply max is about ~180ms. - */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* delay to turn on/off vconn */ -#define PD_VCONN_SWAP_DELAY 5000 /* us */ - -/* Define typical operating power and max power */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 - -/* Charge current limit min / max, based on PWM duty cycle */ -#define PWM_0_MA 500 -#define PWM_100_MA 4000 - -/* Map current in milli-amps to PWM duty cycle percentage */ -#define MA_TO_PWM(curr) (((curr) - PWM_0_MA) * 100 / (PWM_100_MA - PWM_0_MA)) - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/samus_pd/build.mk b/board/samus_pd/build.mk deleted file mode 100644 index 1946fc303c..0000000000 --- a/board/samus_pd/build.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -*- makefile -*- -# Copyright 2014 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build - -# the IC is STmicro STM32F072VBH6 -CHIP:=stm32 -CHIP_FAMILY:=stm32f0 -CHIP_VARIANT:=stm32f07x - -# Not enough SRAM: Disable all tests -test-list-y= - -board-y=board.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_mux.o usb_pd_policy.o diff --git a/board/samus_pd/ec.tasklist b/board/samus_pd/ec.tasklist deleted file mode 100644 index 297661df0b..0000000000 --- a/board/samus_pd/ec.tasklist +++ /dev/null @@ -1,17 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * See CONFIG_TASK_LIST in config.h for details. - */ -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/samus_pd/gpio.inc b/board/samus_pd/gpio.inc deleted file mode 100644 index a22f15375f..0000000000 --- a/board/samus_pd/gpio.inc +++ /dev/null @@ -1,137 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Interrupts */ -GPIO_INT(USB_C0_VBUS_WAKE, PIN(E, 6), GPIO_INT_BOTH, vbus0_evt) -GPIO_INT(USB_C1_VBUS_WAKE, PIN(F, 2), GPIO_INT_BOTH, vbus1_evt) -GPIO_INT(USB_C0_BC12_INT_L, PIN(B, 0), GPIO_INT_FALLING, usb0_evt) -GPIO_INT(USB_C1_BC12_INT_L, PIN(C, 11), GPIO_INT_FALLING, usb1_evt) -GPIO_INT(PCH_SLP_S0_L, PIN(C, 14), GPIO_INT_BOTH, pch_evt) -GPIO_INT(PCH_SLP_S3_L, PIN(C, 15), GPIO_INT_BOTH, pch_evt) -GPIO_INT(PCH_SLP_S5_L, PIN(D, 7), GPIO_INT_BOTH, pch_evt) -GPIO_INT(WP_L, PIN(D, 2), GPIO_INT_BOTH, switch_interrupt) - -/* PD RX/TX */ -GPIO(USB_C0_CC1_PD, PIN(A, 0), GPIO_ANALOG) -GPIO(USB_C0_REF, PIN(A, 1), GPIO_ANALOG) -GPIO(USB_C1_CC1_PD, PIN(A, 2), GPIO_ANALOG) -GPIO(USB_C0_CC2_PD, PIN(A, 4), GPIO_ANALOG) -GPIO(USB_C1_CC2_PD, PIN(A, 5), GPIO_ANALOG) -GPIO(USB_C0_REF_PD_ODL, PIN(A, 6), GPIO_ODR_LOW) - -GPIO(USB_C_CC_EN, PIN(C, 10), GPIO_OUT_LOW) -GPIO(USB_C1_CC_TX_EN, PIN(A, 15), GPIO_OUT_LOW) -GPIO(USB_C0_CC_TX_EN, PIN(B, 9), GPIO_OUT_LOW) -GPIO(USB_C1_CC1_TX_DATA, PIN(B, 4), GPIO_OUT_LOW) -GPIO(USB_C0_CC1_TX_DATA, PIN(B, 14), GPIO_OUT_LOW) -GPIO(USB_C1_CC2_TX_DATA, PIN(E, 14), GPIO_OUT_LOW) -GPIO(USB_C0_CC2_TX_DATA, PIN(D, 3), GPIO_OUT_LOW) - -#if 0 -/* Alternate functions */ -GPIO(USB_C1_TX_CLKOUT, PIN(B, 1), GPIO_OUT_LOW) -GPIO(USB_C0_TX_CLKOUT, PIN(E, 1), GPIO_OUT_LOW) -GPIO(USB_C1_TX_CLKIN, PIN(B, 3), GPIO_OUT_LOW) -GPIO(USB_C0_TX_CLKIN, PIN(B, 13), GPIO_OUT_LOW) -#endif - -/* Power and muxes control */ -GPIO(PPVAR_BOOSTIN_SENSE, PIN(C, 1), GPIO_ANALOG) -GPIO(PP3300_USB_PD_EN, PIN(A, 8), GPIO_OUT_HIGH) -GPIO(USB_C0_CHARGE_EN_L, PIN(D, 12), GPIO_OUT_LOW) -GPIO(USB_C1_CHARGE_EN_L, PIN(D, 13), GPIO_OUT_LOW) -GPIO(USB_C0_5V_EN, PIN(D, 14), GPIO_OUT_LOW) -GPIO(USB_C1_5V_EN, PIN(D, 15), GPIO_OUT_LOW) -GPIO(USB_C0_CC1_VCONN1_EN_L, PIN(D, 8), GPIO_OUT_HIGH) -GPIO(USB_C0_CC2_VCONN1_EN_L, PIN(D, 9), GPIO_OUT_HIGH) -GPIO(USB_C1_CC1_VCONN1_EN_L, PIN(D, 10), GPIO_OUT_HIGH) -GPIO(USB_C1_CC2_VCONN1_EN_L, PIN(D, 11), GPIO_OUT_HIGH) -GPIO(USB_C0_CC_1A5_EN, PIN(B, 12), GPIO_OUT_LOW) -GPIO(USB_C1_CC_1A5_EN, PIN(E, 12), GPIO_OUT_LOW) -GPIO(ILIM_ADJ_PWM, PIN(B, 15), GPIO_OUT_LOW) - -GPIO(USB_C0_CC1_ODL, PIN(B, 8), GPIO_ODR_LOW) -GPIO(USB_C0_CC2_ODL, PIN(E, 0), GPIO_ODR_LOW) -GPIO(USB_C1_CC1_ODL, PIN(F, 9), GPIO_ODR_LOW) -GPIO(USB_C1_CC2_ODL, PIN(F, 10), GPIO_ODR_LOW) - -GPIO(USB_C_BC12_SEL, PIN(C, 0), GPIO_OUT_LOW) -GPIO(USB_C0_SS1_EN_L, PIN(E, 2), GPIO_OUT_HIGH) -GPIO(USB_C0_SS2_EN_L, PIN(E, 3), GPIO_OUT_HIGH) -GPIO(USB_C1_SS1_EN_L, PIN(E, 9), GPIO_OUT_HIGH) -GPIO(USB_C1_SS2_EN_L, PIN(E, 10), GPIO_OUT_HIGH) -GPIO(USB_C0_SS1_DP_MODE, PIN(E, 4), GPIO_OUT_HIGH) -GPIO(USB_C0_SS2_DP_MODE, PIN(E, 5), GPIO_OUT_HIGH) -GPIO(USB_C1_SS1_DP_MODE, PIN(E, 11), GPIO_OUT_HIGH) -GPIO(USB_C1_SS2_DP_MODE, PIN(E, 13), GPIO_OUT_HIGH) -GPIO(USB_C0_DP_MODE_L, PIN(E, 8), GPIO_OUT_HIGH) -GPIO(USB_C1_DP_MODE_L, PIN(F, 6), GPIO_OUT_HIGH) -GPIO(USB_C0_DP_POLARITY, PIN(E, 7), GPIO_OUT_HIGH) -GPIO(USB_C1_DP_POLARITY, PIN(F, 3), GPIO_OUT_HIGH) -GPIO(USB_C0_DP_HPD, PIN(F, 0), GPIO_OUT_LOW) -GPIO(USB_C1_DP_HPD, PIN(F, 1), GPIO_OUT_LOW) - -#if 0 -/* Alternate functions */ -GPIO(USB_DM, PIN(A, 11), GPIO_ANALOG) -GPIO(USB_DP, PIN(A, 12), GPIO_ANALOG) -GPIO(UART_TX, PIN(A, 9), GPIO_OUT_LOW) -GPIO(UART_RX, PIN(A, 10), GPIO_OUT_LOW) -GPIO(TP64, PIN(A, 13), GPIO_ODR_HIGH) -GPIO(TP71, PIN(A, 14), GPIO_ODR_HIGH) -#endif - -/* - * I2C pins should be configured as inputs until I2C module is - * initialized. This will avoid driving the lines unintentionally. - */ -GPIO(SLAVE_I2C_SCL, PIN(B, 6), GPIO_INPUT) -GPIO(SLAVE_I2C_SDA, PIN(B, 7), GPIO_INPUT) -GPIO(MASTER_I2C_SCL, PIN(B, 10), GPIO_INPUT) -GPIO(MASTER_I2C_SDA, PIN(B, 11), GPIO_INPUT) - -/* Case closed debugging. */ -GPIO(EC_INT, PIN(B, 2), GPIO_OUT_LOW) -GPIO(EC_IN_RW, PIN(C, 12), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_RST_L, PIN(C, 13), GPIO_OUT_HIGH) -GPIO(SPI_FLASH_CS_L, PIN(D, 0), GPIO_INPUT) -GPIO(SPI_FLASH_CSK, PIN(D, 1), GPIO_INPUT) -GPIO(SPI_FLASH_MOSI, PIN(C, 3), GPIO_INPUT) -GPIO(SPI_FLASH_MISO, PIN(C, 2), GPIO_INPUT) -GPIO(EC_JTAG_TCK, PIN(C, 6), GPIO_INPUT) -GPIO(EC_JTAG_TMS, PIN(C, 7), GPIO_INPUT) -GPIO(EC_JTAG_TDO, PIN(C, 8), GPIO_INPUT) -GPIO(EC_JTAG_TDI, PIN(C, 9), GPIO_INPUT) -GPIO(ENTERING_RW, PIN(B, 5), GPIO_OUT_LOW) -GPIO(PD_DISABLE_DEBUG, PIN(E, 15), GPIO_OUT_HIGH) -GPIO(PD_DEBUG_EN_L, PIN(D, 4), GPIO_INPUT | GPIO_PULL_UP) -GPIO(PD_SPI_PP3300_EN_L, PIN(A, 7), GPIO_OUT_HIGH) -GPIO(BST_DISABLE, PIN(A, 3), GPIO_OUT_LOW) - -#if 0 -/* Alternate functions */ -GPIO(EC_UART_TX, PIN(C, 4), GPIO_OUT_LOW) -GPIO(EC_UART_RX, PIN(C, 5), GPIO_INPUT) -GPIO(AP_UART_TX, PIN(D, 5), GPIO_OUT_LOW) -GPIO(AP_UART_RX, PIN(D, 6), GPIO_INPUT) -#endif - -ALTERNATE(PIN_MASK(B, 0x0008), 0, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */ -ALTERNATE(PIN_MASK(B, 0x2000), 0, MODULE_USB_PD, 0) /* SPI2: SCK(PB13) */ -ALTERNATE(PIN_MASK(B, 0x0002), 0, MODULE_USB_PD, 0) /* TIM14_CH1: PB1) */ -ALTERNATE(PIN_MASK(E, 0x0002), 0, MODULE_USB_PD, 0) /* TIM17_CH1: PE1) */ -ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, 0) /* USART1: PA9/PA10 */ -ALTERNATE(PIN_MASK(D, 0x0060), 0, MODULE_UART, 0) /* USART2: PD5/PD6 */ -ALTERNATE(PIN_MASK(C, 0x0030), 1, MODULE_UART, 0) /* USART3: PC4/PC5 */ -ALTERNATE(PIN_MASK(B, 0x0cc0), 1, MODULE_I2C, 0) /* I2C SLAVE:PB6/7 MASTER:PB10/11 */ - -#ifdef CONFIG_PWM -ALTERNATE(PIN_MASK(B, 0x8000), 1, MODULE_PWM, 0) /* ILIM_PWM: PB15 */ -#endif diff --git a/board/samus_pd/usb_mux.c b/board/samus_pd/usb_mux.c deleted file mode 100644 index 2c3a0b3a45..0000000000 --- a/board/samus_pd/usb_mux.c +++ /dev/null @@ -1,115 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Samus PD-custom USB mux driver. */ - -#include "common.h" -#include "gpio.h" -#include "usb_mux.h" -#include "util.h" - -struct usb_port_mux { - enum gpio_signal ss1_en_l; - enum gpio_signal ss2_en_l; - enum gpio_signal dp_mode_l; - enum gpio_signal dp_polarity; - enum gpio_signal ss1_dp_mode; - enum gpio_signal ss2_dp_mode; -}; - -static const struct usb_port_mux mux_gpios[] = { - { - .ss1_en_l = GPIO_USB_C0_SS1_EN_L, - .ss2_en_l = GPIO_USB_C0_SS2_EN_L, - .dp_mode_l = GPIO_USB_C0_DP_MODE_L, - .dp_polarity = GPIO_USB_C0_DP_POLARITY, - .ss1_dp_mode = GPIO_USB_C0_SS1_DP_MODE, - .ss2_dp_mode = GPIO_USB_C0_SS2_DP_MODE, - }, - { - .ss1_en_l = GPIO_USB_C1_SS1_EN_L, - .ss2_en_l = GPIO_USB_C1_SS2_EN_L, - .dp_mode_l = GPIO_USB_C1_DP_MODE_L, - .dp_polarity = GPIO_USB_C1_DP_POLARITY, - .ss1_dp_mode = GPIO_USB_C1_SS1_DP_MODE, - .ss2_dp_mode = GPIO_USB_C1_SS2_DP_MODE, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(mux_gpios) == CONFIG_USB_PD_PORT_MAX_COUNT); - - -static int board_init_usb_mux(int port) -{ - return EC_SUCCESS; -} - -static int board_set_usb_mux(int port, mux_state_t mux_state) -{ - const struct usb_port_mux *usb_mux = mux_gpios + port; - int polarity = mux_state & MUX_POLARITY_INVERTED; - - /* reset everything */ - gpio_set_level(usb_mux->ss1_en_l, 1); - gpio_set_level(usb_mux->ss2_en_l, 1); - gpio_set_level(usb_mux->dp_mode_l, 1); - gpio_set_level(usb_mux->dp_polarity, 1); - gpio_set_level(usb_mux->ss1_dp_mode, 1); - gpio_set_level(usb_mux->ss2_dp_mode, 1); - - if (!(mux_state & (MUX_USB_ENABLED | MUX_DP_ENABLED))) - /* everything is already disabled, we can return */ - return EC_SUCCESS; - - if (mux_state & MUX_USB_ENABLED) - /* USB 3.0 uses 2 superspeed lanes */ - gpio_set_level(polarity ? usb_mux->ss2_dp_mode : - usb_mux->ss1_dp_mode, 0); - - if (mux_state & MUX_DP_ENABLED) { - /* DP uses available superspeed lanes (x2 or x4) */ - gpio_set_level(usb_mux->dp_polarity, polarity); - gpio_set_level(usb_mux->dp_mode_l, 0); - } - - /* switch on superspeed lanes */ - gpio_set_level(usb_mux->ss1_en_l, 0); - gpio_set_level(usb_mux->ss2_en_l, 0); - - return EC_SUCCESS; -} - -static int board_get_usb_mux(int port, mux_state_t *mux_state) -{ - const struct usb_port_mux *usb_mux = mux_gpios + port; - - *mux_state = 0; - - if (!gpio_get_level(usb_mux->ss1_dp_mode) || - !gpio_get_level(usb_mux->ss2_dp_mode)) - *mux_state |= MUX_USB_ENABLED; - - if (!gpio_get_level(usb_mux->dp_mode_l)) - *mux_state |= MUX_DP_ENABLED; - - if (gpio_get_level(usb_mux->dp_polarity)) - *mux_state |= MUX_POLARITY_INVERTED; - - return EC_SUCCESS; -} - -const struct usb_mux_driver board_custom_usb_mux_driver = { - .init = board_init_usb_mux, - .set = board_set_usb_mux, - .get = board_get_usb_mux, -}; - -struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .driver = &board_custom_usb_mux_driver, - }, - { - .driver = &board_custom_usb_mux_driver, - }, -}; diff --git a/board/samus_pd/usb_pd_config.h b/board/samus_pd/usb_pd_config.h deleted file mode 100644 index 8b01e30b64..0000000000 --- a/board/samus_pd/usb_pd_config.h +++ /dev/null @@ -1,278 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "adc.h" -#include "chip/stm32/registers.h" -#include "gpio.h" -#include "usb_mux.h" - -/* USB Power delivery board configuration */ - -#ifndef __CROS_EC_USB_PD_CONFIG_H -#define __CROS_EC_USB_PD_CONFIG_H - -/* Timer selection for baseband PD communication */ -#define TIM_CLOCK_PD_TX_C0 17 -#define TIM_CLOCK_PD_RX_C0 1 -#define TIM_CLOCK_PD_TX_C1 14 -#define TIM_CLOCK_PD_RX_C1 3 - -#define TIM_CLOCK_PD_TX(p) ((p) ? TIM_CLOCK_PD_TX_C1 : TIM_CLOCK_PD_TX_C0) -#define TIM_CLOCK_PD_RX(p) ((p) ? TIM_CLOCK_PD_RX_C1 : TIM_CLOCK_PD_RX_C0) - -/* Timer channel */ -#define TIM_RX_CCR_C0 1 -#define TIM_RX_CCR_C1 1 -#define TIM_TX_CCR_C0 1 -#define TIM_TX_CCR_C1 1 - -/* RX timer capture/compare register */ -#define TIM_CCR_C0 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C0, TIM_RX_CCR_C0)) -#define TIM_CCR_C1 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C1, TIM_RX_CCR_C1)) -#define TIM_RX_CCR_REG(p) ((p) ? TIM_CCR_C1 : TIM_CCR_C0) - -/* TX and RX timer register */ -#define TIM_REG_TX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_TX_C0)) -#define TIM_REG_RX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_RX_C0)) -#define TIM_REG_TX_C1 (STM32_TIM_BASE(TIM_CLOCK_PD_TX_C1)) -#define TIM_REG_RX_C1 (STM32_TIM_BASE(TIM_CLOCK_PD_RX_C1)) -#define TIM_REG_TX(p) ((p) ? TIM_REG_TX_C1 : TIM_REG_TX_C0) -#define TIM_REG_RX(p) ((p) ? TIM_REG_RX_C1 : TIM_REG_RX_C0) - -/* use the hardware accelerator for CRC */ -#define CONFIG_HW_CRC - -/* TX uses SPI1 on PB3-4 for port C1, SPI2 on PB 13-14 for port C0 */ -#define SPI_REGS(p) ((p) ? STM32_SPI1_REGS : STM32_SPI2_REGS) -static inline void spi_enable_clock(int port) -{ - if (port == 0) - STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2; - else - STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1; -} - -/* DMA for transmit uses DMA CH7 for C0 and DMA_CH3 for C1 */ -#define DMAC_SPI_TX(p) ((p) ? STM32_DMAC_CH3 : STM32_DMAC_CH7) - -/* RX uses COMP1 and TIM1 CH1 on port C0 and COMP2 and TIM3_CH1 for port C1*/ -#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM1_IC1 -#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM3_IC1 - -#define TIM_TX_CCR_IDX(p) ((p) ? TIM_TX_CCR_C1 : TIM_TX_CCR_C0) -#define TIM_RX_CCR_IDX(p) ((p) ? TIM_RX_CCR_C1 : TIM_RX_CCR_C0) -#define TIM_CCR_CS 1 -#define EXTI_COMP_MASK(p) ((p) ? BIT(22) : BIT(21)) -#define IRQ_COMP STM32_IRQ_COMP -/* triggers packet detection on comparator falling edge */ -#define EXTI_XTSR STM32_EXTI_FTSR - -/* DMA for receive uses DMA_CH2 for C0 and DMA_CH6 for C1 */ -#define DMAC_TIM_RX(p) ((p) ? STM32_DMAC_CH6 : STM32_DMAC_CH2) - -/* the pins used for communication need to be hi-speed */ -static inline void pd_set_pins_speed(int port) -{ - if (port == 0) { - /* 40 MHz pin speed on SPI PB13/14 */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x3C000000; - /* 40 MHz pin speed on TIM17_CH1 (PE1) */ - STM32_GPIO_OSPEEDR(GPIO_E) |= 0x0000000C; - } else { - /* 40 MHz pin speed on SPI PB3/4 */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x000003C0; - /* 40 MHz pin speed on TIM14_CH1 (PB1) */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x0000000C; - } -} - -/* Reset SPI peripheral used for TX */ -static inline void pd_tx_spi_reset(int port) -{ - if (port == 0) { - /* Reset SPI2 */ - STM32_RCC_APB1RSTR |= BIT(14); - STM32_RCC_APB1RSTR &= ~BIT(14); - } else { - /* Reset SPI1 */ - STM32_RCC_APB2RSTR |= BIT(12); - STM32_RCC_APB2RSTR &= ~BIT(12); - } -} - -/* Drive the CC line from the TX block */ -static inline void pd_tx_enable(int port, int polarity) -{ - if (port == 0) { - /* put SPI function on TX pin */ - if (polarity) /* PD3 is SPI2 MISO */ - gpio_set_alternate_function(GPIO_D, 0x0008, 1); - else /* PB14 is SPI2 MISO */ - gpio_set_alternate_function(GPIO_B, 0x4000, 0); - - /* set the low level reference */ - gpio_set_level(GPIO_USB_C0_CC_TX_EN, 1); - } else { - /* put SPI function on TX pin */ - if (polarity) /* PE14 is SPI1 MISO */ - gpio_set_alternate_function(GPIO_E, 0x4000, 1); - else /* PB4 is SPI1 MISO */ - gpio_set_alternate_function(GPIO_B, 0x0010, 0); - - /* set the low level reference */ - gpio_set_level(GPIO_USB_C1_CC_TX_EN, 1); - } -} - -/* Put the TX driver in Hi-Z state */ -static inline void pd_tx_disable(int port, int polarity) -{ - if (port == 0) { - /* output low on SPI TX to disable the FET */ - if (polarity) /* PD3 is SPI2 MISO */ - STM32_GPIO_MODER(GPIO_D) = (STM32_GPIO_MODER(GPIO_D) - & ~(3 << (2*3))) - | (1 << (2*3)); - else /* PB14 is SPI2 MISO */ - STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B) - & ~(3 << (2*14))) - | (1 << (2*14)); - - /* put the low level reference in Hi-Z */ - gpio_set_level(GPIO_USB_C0_CC_TX_EN, 0); - } else { - /* output low on SPI TX to disable the FET */ - if (polarity) /* PE14 is SPI1 MISO */ - STM32_GPIO_MODER(GPIO_E) = (STM32_GPIO_MODER(GPIO_E) - & ~(3 << (2*14))) - | (1 << (2*14)); - else /* PB4 is SPI1 MISO */ - STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B) - & ~(3 << (2*4))) - | (1 << (2*4)); - - /* put the low level reference in Hi-Z */ - gpio_set_level(GPIO_USB_C1_CC_TX_EN, 0); - } -} - -/* we know the plug polarity, do the right configuration */ -static inline void pd_select_polarity(int port, int polarity) -{ - uint32_t val = STM32_COMP_CSR; - - /* Use window mode so that COMP1 and COMP2 share non-inverting input */ - val |= STM32_COMP_CMP1EN | STM32_COMP_CMP2EN | STM32_COMP_WNDWEN; - - if (port == 0) { - /* use the right comparator inverted input for COMP1 */ - STM32_COMP_CSR = (val & ~STM32_COMP_CMP1INSEL_MASK) | - (polarity ? STM32_COMP_CMP1INSEL_INM4 - : STM32_COMP_CMP1INSEL_INM6); - } else { - /* use the right comparator inverted input for COMP2 */ - STM32_COMP_CSR = (val & ~STM32_COMP_CMP2INSEL_MASK) | - (polarity ? STM32_COMP_CMP2INSEL_INM5 - : STM32_COMP_CMP2INSEL_INM6); - } -} - -/* Initialize pins used for TX and put them in Hi-Z */ -static inline void pd_tx_init(void) -{ - gpio_config_module(MODULE_USB_PD, 1); -} - -static inline void pd_set_host_mode(int port, int enable) -{ - if (port == 0) { - if (enable) { - /* We never charging in power source mode */ - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 1); - /* High-Z is used for host mode. */ - gpio_set_level(GPIO_USB_C0_CC1_ODL, 1); - gpio_set_level(GPIO_USB_C0_CC2_ODL, 1); - } else { - /* Kill VBUS power supply */ - gpio_set_level(GPIO_USB_C0_5V_EN, 0); - /* Pull low for device mode. */ - gpio_set_level(GPIO_USB_C0_CC1_ODL, 0); - gpio_set_level(GPIO_USB_C0_CC2_ODL, 0); - /* Let charge_manager decide to enable the port */ - } - } else { - if (enable) { - /* We never charging in power source mode */ - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 1); - /* High-Z is used for host mode. */ - gpio_set_level(GPIO_USB_C1_CC1_ODL, 1); - gpio_set_level(GPIO_USB_C1_CC2_ODL, 1); - } else { - /* Kill VBUS power supply */ - gpio_set_level(GPIO_USB_C1_5V_EN, 0); - /* Pull low for device mode. */ - gpio_set_level(GPIO_USB_C1_CC1_ODL, 0); - gpio_set_level(GPIO_USB_C1_CC2_ODL, 0); - /* Let charge_manager decide to enable the port */ - } - } -} - -/** - * Initialize various GPIOs and interfaces to safe state at start of pd_task. - * - * These include: - * VBUS, charge path based on power role. - * Physical layer CC transmit. - * VCONNs disabled. - * - * @param port USB-C port number - * @param power_role Power role of device - */ -static inline void pd_config_init(int port, uint8_t power_role) -{ - /* - * Set CC pull resistors, and charge_en and vbus_en GPIOs to match - * the initial role. - */ - pd_set_host_mode(port, power_role); - - /* Initialize TX pins and put them in Hi-Z */ - pd_tx_init(); - - /* Reset mux ... for NONE polarity doesn't matter */ - usb_mux_set(port, TYPEC_MUX_NONE, USB_SWITCH_DISCONNECT, 0); - - if (port == 0) { - gpio_set_level(GPIO_USB_C0_CC1_VCONN1_EN_L, 1); - gpio_set_level(GPIO_USB_C0_CC2_VCONN1_EN_L, 1); - gpio_set_level(GPIO_USB_C0_DP_HPD, 0); - } else { - gpio_set_level(GPIO_USB_C1_CC1_VCONN1_EN_L, 1); - gpio_set_level(GPIO_USB_C1_CC2_VCONN1_EN_L, 1); - gpio_set_level(GPIO_USB_C1_DP_HPD, 0); - } -} - -static inline int pd_adc_read(int port, int cc) -{ - if (port == 0) - return adc_read_channel(cc ? ADC_C0_CC2_PD : ADC_C0_CC1_PD); - else - return adc_read_channel(cc ? ADC_C1_CC2_PD : ADC_C1_CC1_PD); -} - -static inline void pd_set_vconn(int port, int polarity, int enable) -{ - /* Set VCONN on the opposite CC line from the polarity */ - if (port == 0) - gpio_set_level(polarity ? GPIO_USB_C0_CC1_VCONN1_EN_L : - GPIO_USB_C0_CC2_VCONN1_EN_L, !enable); - else - gpio_set_level(polarity ? GPIO_USB_C1_CC1_VCONN1_EN_L : - GPIO_USB_C1_CC2_VCONN1_EN_L, !enable); -} - -#endif /* __CROS_EC_USB_PD_CONFIG_H */ diff --git a/board/samus_pd/usb_pd_policy.c b/board/samus_pd/usb_pd_policy.c deleted file mode 100644 index 40277da8f8..0000000000 --- a/board/samus_pd/usb_pd_policy.c +++ /dev/null @@ -1,388 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "atomic.h" -#include "charge_manager.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "registers.h" -#include "system.h" -#include "task.h" -#include "timer.h" -#include "util.h" -#include "usb_mux.h" -#include "usb_pd.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - -/* Define typical operating power and max power */ -#define OPERATING_POWER_MW 15000 -#define MAX_POWER_MW 60000 -#define MAX_CURRENT_MA 3000 - -/* - * Do not request any voltage within this deadband region, where - * we're not sure whether or not the boost or the bypass will be on. - */ -#define INPUT_VOLTAGE_DEADBAND_MIN 9700 -#define INPUT_VOLTAGE_DEADBAND_MAX 11999 - -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ - PDO_FIXED_COMM_CAP) - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 900, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), - PDO_BATT(4750, 21000, 15000), - PDO_VAR(4750, 21000, 3000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - -int pd_is_valid_input_voltage(int mv) -{ - /* Allow any voltage not in the boost bypass deadband */ - return (mv < INPUT_VOLTAGE_DEADBAND_MIN) || - (mv > INPUT_VOLTAGE_DEADBAND_MAX); -} - -void pd_transition_voltage(int idx) -{ - /* No-operation: we are always 5V */ -} - -int pd_set_power_supply_ready(int port) -{ - /* provide VBUS */ - gpio_set_level(port ? GPIO_USB_C1_5V_EN : GPIO_USB_C0_5V_EN, 1); - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; /* we are ready */ -} - -void pd_power_supply_reset(int port) -{ - /* Kill VBUS */ - gpio_set_level(port ? GPIO_USB_C1_5V_EN : GPIO_USB_C0_5V_EN, 0); - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_snk_is_vbus_provided(int port) -{ - return gpio_get_level(port ? GPIO_USB_C1_VBUS_WAKE : - GPIO_USB_C0_VBUS_WAKE); -} - -int pd_board_checks(void) -{ - return EC_SUCCESS; -} - -int pd_check_power_swap(int port) -{ - /* TODO: use battery level to decide to accept/reject power swap */ - /* - * Allow power swap as long as we are acting as a dual role device, - * otherwise assume our role is fixed (not in S0 or console command - * to fix our role). - */ - return pd_get_dual_role(port) == PD_DRP_TOGGLE_ON ? 1 : 0; -} - -int pd_check_data_swap(int port, int data_role) -{ - /* Allow data swap if we are a UFP, otherwise don't allow */ - return (data_role == PD_ROLE_UFP) ? 1 : 0; -} - -int pd_check_vconn_swap(int port) -{ - /* in S5, do not allow vconn swap since pp5000 rail is off */ - return gpio_get_level(GPIO_PCH_SLP_S5_L); -} - -void pd_execute_data_swap(int port, int data_role) -{ - -} - -void pd_check_pr_role(int port, int pr_role, int flags) -{ - /* - * If partner is dual-role power and dualrole toggling is on, consider - * if a power swap is necessary. - */ - if ((flags & PD_FLAGS_PARTNER_DR_POWER) && - pd_get_dual_role(port) == PD_DRP_TOGGLE_ON) { - /* - * If we are a sink and partner is not externally powered, then - * swap to become a source. If we are source and partner is - * externally powered, swap to become a sink. - */ - int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER; - if ((!partner_extpower && pr_role == PD_ROLE_SINK) || - (partner_extpower && pr_role == PD_ROLE_SOURCE)) - pd_request_power_swap(port); - } -} - -void pd_check_dr_role(int port, int dr_role, int flags) -{ - /* If UFP, try to switch to DFP */ - if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_UFP) - pd_request_data_swap(port); -} -/* ----------------- Vendor Defined Messages ------------------ */ -const struct svdm_response svdm_rsp = { - .identity = NULL, - .svids = NULL, - .modes = NULL, -}; - -int pd_custom_vdm(int port, int cnt, uint32_t *payload, - uint32_t **rpayload) -{ - int cmd = PD_VDO_CMD(payload[0]); - uint16_t dev_id = 0; - int is_rw, is_latest; - - /* make sure we have some payload */ - if (cnt == 0) - return 0; - - switch (cmd) { - case VDO_CMD_VERSION: - /* guarantee last byte of payload is null character */ - *(payload + cnt - 1) = 0; - CPRINTF("ver: %s\n", (char *)(payload+1)); - break; - case VDO_CMD_READ_INFO: - case VDO_CMD_SEND_INFO: - /* copy hash */ - if (cnt == 7) { - dev_id = VDO_INFO_HW_DEV_ID(payload[6]); - is_rw = VDO_INFO_IS_RW(payload[6]); - is_latest = pd_dev_store_rw_hash(port, - dev_id, - payload + 1, - is_rw ? - SYSTEM_IMAGE_RW : - SYSTEM_IMAGE_RO); - - /* - * Send update host event unless our RW hash is - * already known to be the latest update RW. - */ - if (!is_rw || !is_latest) - pd_send_host_event(PD_EVENT_UPDATE_DEVICE); - - CPRINTF("DevId:%d.%d SW:%d RW:%d\n", - HW_DEV_ID_MAJ(dev_id), - HW_DEV_ID_MIN(dev_id), - VDO_INFO_SW_DBG_VER(payload[6]), - is_rw); - } else if (cnt == 6) { - /* really old devices don't have last byte */ - pd_dev_store_rw_hash(port, dev_id, payload + 1, - SYSTEM_IMAGE_UNKNOWN); - } - break; - case VDO_CMD_CURRENT: - CPRINTF("Current: %dmA\n", payload[1]); - break; - case VDO_CMD_FLIP: - usb_mux_flip(port); - break; - case VDO_CMD_GET_LOG: - pd_log_recv_vdm(port, cnt, payload); - break; - } - - return 0; -} - -static int dp_flags[CONFIG_USB_PD_PORT_MAX_COUNT]; -/* DP Status VDM as returned by UFP */ -static uint32_t dp_status[CONFIG_USB_PD_PORT_MAX_COUNT]; - -static void svdm_safe_dp_mode(int port) -{ - /* make DP interface safe until configure */ - usb_mux_set(port, TYPEC_MUX_NONE, USB_SWITCH_CONNECT, 0); - dp_flags[port] = 0; - dp_status[port] = 0; -} - -static int svdm_enter_dp_mode(int port, uint32_t mode_caps) -{ - /* Only enter mode if device is DFP_D capable */ - if (mode_caps & MODE_DP_SNK) { - svdm_safe_dp_mode(port); - return 0; - } - - return -1; -} - -static int svdm_dp_status(int port, uint32_t *payload) -{ - int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); - payload[0] = VDO(USB_SID_DISPLAYPORT, 1, - CMD_DP_STATUS | VDO_OPOS(opos)); - payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */ - 0, /* HPD level ... not applicable */ - 0, /* exit DP? ... no */ - 0, /* usb mode? ... no */ - 0, /* multi-function ... no */ - (!!(dp_flags[port] & DP_FLAGS_DP_ON)), - 0, /* power low? ... no */ - (!!(dp_flags[port] & DP_FLAGS_DP_ON))); - return 2; -}; - -static int svdm_dp_config(int port, uint32_t *payload) -{ - int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); - int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]); - int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]); - - if (!pin_mode) - return 0; - - usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP, - USB_SWITCH_CONNECT, pd_get_polarity(port)); - - payload[0] = VDO(USB_SID_DISPLAYPORT, 1, - CMD_DP_CONFIG | VDO_OPOS(opos)); - payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ - 1, /* DPv1.3 signaling */ - 2); /* UFP_U connected as UFP_D */ - return 2; -}; - -#define PORT_TO_HPD(port) ((port) ? GPIO_USB_C1_DP_HPD : GPIO_USB_C0_DP_HPD) -static void svdm_dp_post_config(int port) -{ - dp_flags[port] |= DP_FLAGS_DP_ON; - if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING)) - return; - - gpio_set_level(PORT_TO_HPD(port), 1); -} - -static void hpd0_irq_deferred(void) -{ - gpio_set_level(GPIO_USB_C0_DP_HPD, 1); -} - -static void hpd1_irq_deferred(void) -{ - gpio_set_level(GPIO_USB_C1_DP_HPD, 1); -} - -DECLARE_DEFERRED(hpd0_irq_deferred); -DECLARE_DEFERRED(hpd1_irq_deferred); -#define PORT_TO_HPD_IRQ_DEFERRED(port) ((port) ? \ - &hpd1_irq_deferred_data : \ - &hpd0_irq_deferred_data) - -static int svdm_dp_attention(int port, uint32_t *payload) -{ - int cur_lvl; - int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); - int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); - enum gpio_signal hpd = PORT_TO_HPD(port); - cur_lvl = gpio_get_level(hpd); - - dp_status[port] = payload[1]; - - /* Its initial DP status message prior to config */ - if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { - if (lvl) - dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; - return 1; - } - - if (irq & cur_lvl) { - gpio_set_level(hpd, 0); - hook_call_deferred(PORT_TO_HPD_IRQ_DEFERRED(port), - HPD_DSTREAM_DEBOUNCE_IRQ); - } else if (irq & !cur_lvl) { - CPRINTF("ERR:HPD:IRQ&LOW\n"); - return 0; /* nak */ - } else { - gpio_set_level(hpd, lvl); - } - /* ack */ - return 1; -} - -static void svdm_exit_dp_mode(int port) -{ - svdm_safe_dp_mode(port); - gpio_set_level(PORT_TO_HPD(port), 0); -} - -static int svdm_enter_gfu_mode(int port, uint32_t mode_caps) -{ - /* Always enter GFU mode */ - return 0; -} - -static void svdm_exit_gfu_mode(int port) -{ -} - -static int svdm_gfu_status(int port, uint32_t *payload) -{ - /* - * This is called after enter mode is successful, send unstructured - * VDM to read info. - */ - pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0); - return 0; -} - -static int svdm_gfu_config(int port, uint32_t *payload) -{ - return 0; -} - -static int svdm_gfu_attention(int port, uint32_t *payload) -{ - return 0; -} - -const struct svdm_amode_fx supported_modes[] = { - { - .svid = USB_SID_DISPLAYPORT, - .enter = &svdm_enter_dp_mode, - .status = &svdm_dp_status, - .config = &svdm_dp_config, - .post_config = &svdm_dp_post_config, - .attention = &svdm_dp_attention, - .exit = &svdm_exit_dp_mode, - }, - { - .svid = USB_VID_GOOGLE, - .enter = &svdm_enter_gfu_mode, - .status = &svdm_gfu_status, - .config = &svdm_gfu_config, - .attention = &svdm_gfu_attention, - .exit = &svdm_exit_gfu_mode, - } -}; -const int supported_modes_cnt = ARRAY_SIZE(supported_modes); |