diff options
Diffstat (limited to 'board')
-rw-r--r-- | board/lindar/battery.c | 123 | ||||
-rw-r--r-- | board/lindar/board.c | 353 | ||||
-rw-r--r-- | board/lindar/board.h | 148 | ||||
-rw-r--r-- | board/lindar/build.mk | 33 | ||||
-rw-r--r-- | board/lindar/ec.tasklist | 25 | ||||
-rw-r--r-- | board/lindar/gpio.inc | 177 | ||||
-rw-r--r-- | board/lindar/led.c | 110 | ||||
-rw-r--r-- | board/lindar/power_sequence.c | 183 |
8 files changed, 1152 insertions, 0 deletions
diff --git a/board/lindar/battery.c b/board/lindar/battery.c new file mode 100644 index 0000000000..7f37c6fe10 --- /dev/null +++ b/board/lindar/battery.c @@ -0,0 +1,123 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery pack vendor provided charging profile + */ + +#include "battery_fuel_gauge.h" +#include "common.h" +#include "util.h" + +/* + * Battery info for all Volteer battery types. Note that the fields + * start_charging_min/max and charging_min/max are not used for the charger. + * The effective temperature limits are given by discharging_min/max_c. + * + * Fuel Gauge (FG) parameters which are used for determining if the battery + * is connected, the appropriate ship mode (battery cutoff) command, and the + * charge/discharge FETs status. + * + * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery + * register. For some batteries, the charge/discharge FET bits are set when + * charging/discharging is active, in other types, these bits set mean that + * charging/discharging is disabled. Therefore, in addition to the mask for + * these bits, a disconnect value must be specified. Note that for TI fuel + * gauge, the charge/discharge FET status is found in Operation Status (0x54), + * but a read of Manufacturer Access (0x00) will return the lower 16 bits of + * Operation status which contains the FET status bits. + * + * The assumption for battery types supported is that the charge/discharge FET + * status can be read with a sb_read() command and therefore, only the register + * address, mask, and disconnect value need to be provided. + */ +const struct board_batt_params board_battery_info[] = { + [BATTERY_SMP] = { + .fuel_gauge = { + .manuf_name = "SMP", + .device_name = "L19M4PG2", + .ship_mode = { + .reg_addr = 0x34, + .reg_data = { 0x0000, 0x1000 }, + }, + .fet = { + .reg_addr = 0x34, + .reg_mask = 0x0100, + .disconnect_val = 0x0100, + } + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7680, /* mV */ + .voltage_min = 6000, /* mV */ + .precharge_current = 332, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 50, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 60, + }, + }, + [BATTERY_LGC] = { + .fuel_gauge = { + .manuf_name = "LGC", + .device_name = "L19L4PG2", + .ship_mode = { + .reg_addr = 0x34, + .reg_data = { 0x0000, 0x1000 }, + }, + .fet = { + .reg_addr = 0x34, + .reg_mask = 0x0100, + .disconnect_val = 0x0100, + } + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, /* mV */ + /* + * voltage min value and precharge current value are + * specified by LGC directly and not shown in the SPEC. + */ + .voltage_min = 6000, /* mV */ + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 50, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 73, + }, + }, + [BATTERY_SUNWODA] = { + .fuel_gauge = { + .manuf_name = "SUNWODA", + .device_name = "L19D4PG2", + .ship_mode = { + .reg_addr = 0x34, + .reg_data = { 0x0000, 0x1000 }, + }, + .fet = { + .reg_addr = 0x34, + .reg_mask = 0x0100, + .disconnect_val = 0x0100, + } + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7680, /* mV */ + .voltage_min = 6000, /* mV */ + .precharge_current = 333, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 50, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 60, + }, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); + +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_SMP; diff --git a/board/lindar/board.c b/board/lindar/board.c new file mode 100644 index 0000000000..5841ea0385 --- /dev/null +++ b/board/lindar/board.c @@ -0,0 +1,353 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Malefor board-specific configuration */ + +#include "button.h" +#include "cbi_ec_fw_config.h" +#include "common.h" +#include "driver/accel_lis2dh.h" +#include "driver/accelgyro_lsm6dsm.h" +#include "driver/ppc/sn5s330.h" +#include "driver/ppc/syv682x.h" +#include "driver/sync.h" +#include "extpower.h" +#include "fan.h" +#include "fan_chip.h" +#include "gpio.h" +#include "hooks.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "power.h" +#include "power_button.h" +#include "pwm.h" +#include "pwm_chip.h" +#include "switch.h" +#include "system.h" +#include "task.h" +#include "tablet_mode.h" +#include "uart.h" +#include "usbc_ppc.h" +#include "util.h" + +#include "gpio_list.h" /* Must come after other header files. */ + +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_CHIPSET, format, ## args) + +/* + * FW_CONFIG defaults for Malefor if the CBI data is not initialized. + */ +union volteer_cbi_fw_config fw_config_defaults = { + .usb_db = DB_USB3_NO_A, +}; + +static void board_init(void) +{ + if (ec_cfg_has_tabletmode()) { + /* Enable gpio interrupt for base accelgyro sensor */ + gpio_enable_interrupt(GPIO_EC_IMU_INT_L); + } else { + motion_sensor_count = 0; + /* Device is clamshell only */ + tablet_set_mode(0); + /* Gyro is not present, don't allow line to float */ + gpio_set_flags(GPIO_EC_IMU_INT_L, GPIO_INPUT | GPIO_PULL_DOWN); + } + + /* + * TODO: b/154447182 - Malefor will control power LED and battery LED + * independently, and keep the max brightness of power LED and battery + * LED as 50%. + */ + pwm_enable(PWM_CH_LED4_SIDESEL, 1); + pwm_set_duty(PWM_CH_LED4_SIDESEL, 50); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + +int board_is_lid_angle_tablet_mode(void) +{ + return ec_cfg_has_tabletmode(); +} + +/* Enable or disable input devices, based on tablet mode or chipset state */ +#ifndef TEST_BUILD +void lid_angle_peripheral_enable(int enable) +{ + if (ec_cfg_has_tabletmode()) { + if (chipset_in_state(CHIPSET_STATE_ANY_OFF) || + tablet_get_mode()) + enable = 0; + keyboard_scan_enable(enable, KB_SCAN_DISABLE_LID_ANGLE); + } +} +#endif + +/******************************************************************************/ +/* Sensors */ +/* Lid and base Sensor mutex */ +static struct mutex g_lid_accel_mutex; +static struct mutex g_base_mutex; + +/* Lid and base accel private data */ +static struct stprivate_data g_lis2dh_data; +static struct lsm6dsm_data lsm6dsm_data = LSM6DSM_DATA; + +/* Matrix to rotate lid and base sensor into standard reference frame */ +static const mat33_fp_t lid_standard_ref = { + { 0, FLOAT_TO_FP(1), 0}, + { FLOAT_TO_FP(1), 0, 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +static const mat33_fp_t base_standard_ref = { + { FLOAT_TO_FP(1), 0, 0}, + { 0, FLOAT_TO_FP(-1), 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +struct motion_sensor_t motion_sensors[] = { + [LID_ACCEL] = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LIS2DE, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &lis2dh_drv, + .mutex = &g_lid_accel_mutex, + .drv_data = &g_lis2dh_data, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LIS2DH_ADDR1_FLAGS, + .rot_standard_ref = &lid_standard_ref, + .min_frequency = LIS2DH_ODR_MIN_VAL, + .max_frequency = LIS2DH_ODR_MAX_VAL, + .default_range = 2, /* g, to support tablet mode */ + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + /* Sensor on in S3 */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, + + [BASE_ACCEL] = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSM, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dsm_drv, + .mutex = &g_base_mutex, + .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, + MOTIONSENSE_TYPE_ACCEL), + .int_signal = GPIO_EC_IMU_INT_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, + .rot_standard_ref = &base_standard_ref, + .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ + .min_frequency = LSM6DSM_ODR_MIN_VAL, + .max_frequency = LSM6DSM_ODR_MAX_VAL, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 13000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + /* Sensor on for angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, + }, + + [BASE_GYRO] = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSM, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dsm_drv, + .mutex = &g_base_mutex, + .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, + MOTIONSENSE_TYPE_GYRO), + .int_signal = GPIO_EC_IMU_INT_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, + .default_range = 1000 | ROUND_UP_FLAG, /* dps */ + .rot_standard_ref = &base_standard_ref, + .min_frequency = LSM6DSM_ODR_MIN_VAL, + .max_frequency = LSM6DSM_ODR_MAX_VAL, + }, +}; +unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +/******************************************************************************/ +/* Physical fans. These are logically separate from pwm_channels. */ + +const struct fan_conf fan_conf_0 = { + .flags = FAN_USE_RPM_MODE, + .ch = MFT_CH_0, /* Use MFT id to control fan */ + .pgood_gpio = -1, + .enable_gpio = GPIO_EN_PP5000_FAN, +}; + +/* + * Fan specs from datasheet: + * Max speed 5900 rpm (+/- 7%), minimum duty cycle 30%. + * Minimum speed not specified by RPM. Set minimum RPM to max speed (with + * margin) x 30%. + * 5900 x 1.07 x 0.30 = 1894, round up to 1900 + */ +const struct fan_rpm fan_rpm_0 = { + .rpm_min = 1900, + .rpm_start = 1900, + .rpm_max = 5900, +}; + +const struct fan_t fans[FAN_CH_COUNT] = { + [FAN_CH_0] = { + .conf = &fan_conf_0, + .rpm = &fan_rpm_0, + }, +}; + +/******************************************************************************/ +/* MFT channels. These are logically separate from pwm_channels. */ +const struct mft_t mft_channels[] = { + [MFT_CH_0] = { + .module = NPCX_MFT_MODULE_1, + .clk_src = TCKC_LFCLK, + .pwm_id = PWM_CH_FAN, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); + +/******************************************************************************/ +/* I2C port map configuration */ +const struct i2c_port_t i2c_ports[] = { + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C0_SENSOR_SCL, + .sda = GPIO_EC_I2C0_SENSOR_SDA, + }, + { + .name = "usb_c0", + .port = I2C_PORT_USB_C0, + .kbps = 1000, + .scl = GPIO_EC_I2C1_USB_C0_SCL, + .sda = GPIO_EC_I2C1_USB_C0_SDA, + }, + { + .name = "usb_c1", + .port = I2C_PORT_USB_C1, + .kbps = 1000, + .scl = GPIO_EC_I2C2_USB_C1_SCL, + .sda = GPIO_EC_I2C2_USB_C1_SDA, + }, + { + .name = "usb_1_mix", + .port = I2C_PORT_USB_1_MIX, + .kbps = 100, + .scl = GPIO_EC_I2C3_USB_1_MIX_SCL, + .sda = GPIO_EC_I2C3_USB_1_MIX_SDA, + }, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C5_POWER_SCL, + .sda = GPIO_EC_I2C5_POWER_SDA, + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C7_EEPROM_SCL, + .sda = GPIO_EC_I2C7_EEPROM_SDA, + }, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +/******************************************************************************/ +/* PWM configuration */ +const struct pwm_t pwm_channels[] = { + [PWM_CH_LED4_SIDESEL] = { + .channel = 7, + .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, + /* Run at a higher frequency than the color PWM signals to avoid + * timing-based color shifts. + */ + .freq = 4800, + }, + [PWM_CH_FAN] = { + .channel = 5, + .flags = PWM_CONFIG_OPEN_DRAIN, + .freq = 25000 + }, + [PWM_CH_KBLIGHT] = { + .channel = 3, + .flags = 0, + /* + * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent + * flicker. Higher frequencies consume similar average power to + * lower PWM frequencies, but higher frequencies record a much + * lower maximum power. + */ + .freq = 2400, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +void board_reset_pd_mcu(void) +{ + /* TODO(b/159024035): Malefor: check USB PD reset operation */ +} + +__override void board_cbi_init(void) +{ + /* TODO(b/159024035): Malefor: check FW_CONFIG fields for USB DB type */ +} + +/******************************************************************************/ +/* USBC PPC configuration */ +struct ppc_config_t ppc_chips[] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = SN5S330_ADDR0_FLAGS, + .drv = &sn5s330_drv, + }, + [USBC_PORT_C1] = { + .i2c_port = I2C_PORT_USB_C1, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +/******************************************************************************/ +/* PPC support routines */ +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + sn5s330_interrupt(USBC_PORT_C0); + break; + case GPIO_USB_C1_PPC_INT_ODL: + syv682x_interrupt(USBC_PORT_C1); + default: + break; + } +} + diff --git a/board/lindar/board.h b/board/lindar/board.h new file mode 100644 index 0000000000..f1a34bb73a --- /dev/null +++ b/board/lindar/board.h @@ -0,0 +1,148 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Volteer board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* Baseboard features */ +#include "baseboard.h" + +/* Optional features */ +#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ + +#define CONFIG_POWER_BUTTON + +#undef CONFIG_UART_TX_BUF_SIZE +#define CONFIG_UART_TX_BUF_SIZE 4096 + +/* LED defines */ +#define CONFIG_LED_POWER_LED +#define CONFIG_LED_ONOFF_STATES + +/* Keyboard features */ + +/* Sensors */ +#define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT +#define CONFIG_ACCEL_LIS2DE /* Lid accel */ +#define CONFIG_ACCELGYRO_LSM6DSM /* Base accel */ + +/* Sensors without hardware FIFO are in forced mode */ +#define CONFIG_ACCEL_FORCE_MODE_MASK \ + BIT(LID_ACCEL) + +#define CONFIG_LID_ANGLE +#define CONFIG_LID_ANGLE_UPDATE +#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL +#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL + +#define CONFIG_ACCEL_LSM6DSM_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) + +/* USB Type C and USB PD defines */ +/* + * USB-C port's USB2 & USB3 mapping from schematics + * USB2 numbering on PCH - 1 to n + * USB3 numbering on AP - 0 to n (PMC's USB3 numbering for MUX + * configuration is - 1 to n hence add +1) + */ +#define USBC_PORT_0_USB2_NUM 9 +#define USBC_PORT_0_USB3_NUM 1 +#define USBC_PORT_1_USB2_NUM 4 +#define USBC_PORT_1_USB3_NUM 2 + +/* USB Type A Features */ + +/* USBC PPC*/ +#define CONFIG_USBC_PPC_SN5S330 /* USBC port C0 */ +#define CONFIG_USBC_PPC_SYV682X /* USBC port C1 */ + +/* BC 1.2 */ + +/* Volume Button feature */ + +/* Fan features */ + +/* + * Macros for GPIO signals used in common code that don't match the + * schematic names. Signal names in gpio.inc match the schematic and are + * then redefined here to so it's more clear which signal is being used for + * which purpose. + */ +#define GPIO_AC_PRESENT GPIO_ACOK_OD +#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL +#define GPIO_EN_PP5000 GPIO_EN_PP5000_A +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_LID_OPEN GPIO_EC_LID_OPEN +#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV +#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL +#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL +#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL +#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST +#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK +#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L +#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK +#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL +#define GPIO_RSMRST_L_PGOOD GPIO_PG_EC_RSMRST_ODL +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL +#define GPIO_WP_L GPIO_EC_WP_L +#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL +#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL +#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L + +/* I2C Bus Configuration */ +#define CONFIG_I2C +#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 +#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 +#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_1_MIX NPCX_I2C_PORT3_0 +#define I2C_PORT_POWER NPCX_I2C_PORT5_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 + +#define I2C_PORT_BATTERY I2C_PORT_POWER +#define I2C_PORT_CHARGER I2C_PORT_EEPROM + +#define I2C_ADDR_EEPROM_FLAGS 0x50 +#define CONFIG_I2C_MASTER + + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum battery_type { + BATTERY_SMP, + BATTERY_LGC, + BATTERY_SUNWODA, + BATTERY_TYPE_COUNT, +}; + +enum pwm_channel { + PWM_CH_LED4_SIDESEL = 0, + PWM_CH_FAN, + PWM_CH_KBLIGHT, + PWM_CH_COUNT +}; + +enum sensor_id { + LID_ACCEL = 0, + BASE_ACCEL, + BASE_GYRO, + SENSOR_COUNT, +}; + +/* TODO: b/143375057 - Remove this code after power on. */ +void c10_gate_change(enum gpio_signal signal); + +void board_reset_pd_mcu(void); + +#endif /* !__ASSEMBLER__ */ + +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/lindar/build.mk b/board/lindar/build.mk new file mode 100644 index 0000000000..ca046e8d97 --- /dev/null +++ b/board/lindar/build.mk @@ -0,0 +1,33 @@ +# -*- makefile -*- +# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build +# + +CHIP:=npcx +CHIP_FAMILY:=npcx7 +CHIP_VARIANT:=npcx7m6fc +BASEBOARD:=volteer + +# TODO: b/143375057 - Remove this code after power on. +# +# Temporary for board power on. Provide a Volteer specific make option +# to enable the power signal GPIOs that are not stuffed by default. This +# is a backup if board logic power sequencing needs to be adjusted. +# +# Set the following variable to 'y' to enable the Volteer optional power signals +VOLTEER_POWER_SEQUENCE= +ifneq (,$(VOLTEER_POWER_SEQUENCE)) +CFLAGS_BASEBOARD+=-DVOLTEER_POWER_SEQUENCE +endif + +# Force changes to VOLTEER_POWER_SEQUENCE variable to trigger a full build. +ENV_VARS := VOLTEER_POWER_SEQUENCE + + +board-y=board.o +board-y+=battery.o +board-y+=led.o +board-$(VOLTEER_POWER_SEQUENCE)+=power_sequence.o diff --git a/board/lindar/ec.tasklist b/board/lindar/ec.tasklist new file mode 100644 index 0000000000..1cbda88563 --- /dev/null +++ b/board/lindar/ec.tasklist @@ -0,0 +1,25 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * See CONFIG_TASK_LIST in config.h for details. + */ + +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) diff --git a/board/lindar/gpio.inc b/board/lindar/gpio.inc new file mode 100644 index 0000000000..e1f356384e --- /dev/null +++ b/board/lindar/gpio.inc @@ -0,0 +1,177 @@ +/* -*- mode:c -*- + * + * Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +/* Wake Source interrupts */ +GPIO_INT(EC_LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) +GPIO_INT(EC_WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) +GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) +GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) + +/* Optional power sequencing interrupts */ +#ifdef VOLTEER_POWER_SEQUENCE +GPIO_INT(CPU_C10_GATE_L, PIN(6, 7), GPIO_INT_BOTH, c10_gate_change) +#endif + +/* Power sequencing interrupts */ +GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) +#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 +GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) +#endif +GPIO_INT(SLP_SUS_L, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PG_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) + +/* Sensor Interrupts */ +GPIO_INT(EC_IMU_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, lsm6dsm_interrupt) +GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) + +/* USB-C interrupts */ +GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_BOTH, tcpc_alert_event) +GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_BOTH, tcpc_alert_event) + +GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_BOTH, ppc_interrupt) +GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_BOTH, ppc_interrupt) + +GPIO_INT(USB_C0_BC12_INT_ODL, PIN(E, 4), GPIO_INT_BOTH, bc12_interrupt) +GPIO_INT(USB_C1_MIX_INT_ODL, PIN(0, 3), GPIO_INT_BOTH, bc12_interrupt) + +/* HDMI interrupts */ + +/* Volume button interrupts */ +GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) +GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) + +/* Power Sequencing Signals */ +GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW) +GPIO(EN_PP5000_A, PIN(A, 4), GPIO_OUT_LOW) +GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */ +/* The EC does not buffer this signal on Volteer. */ +UNIMPLEMENTED(PCH_DSW_PWROK) + +#ifdef VOLTEER_POWER_SEQUENCE +/* Optional power sequencing signals that are not stuffed by default */ +GPIO(EN_DRAM_VDDQ, PIN(F, 2), GPIO_OUT_LOW) +GPIO(EN_PP1050_STG, PIN(C, 0), GPIO_OUT_LOW) +GPIO(EN_PP5000_USB_AG, PIN(A, 7), GPIO_OUT_LOW) +GPIO(EN_PPVAR_VCCIN_AUX, PIN(8, 1), GPIO_OUT_LOW) +GPIO(EN_PP1050_ST_S0, PIN(3, 4), GPIO_OUT_LOW) +GPIO(EN_VNN_BYPASS, PIN(B, 0), GPIO_OUT_LOW) +GPIO(EN_DRAM_VDD1, PIN(9, 6), GPIO_OUT_LOW) +#endif + +/* Other wake sources */ +/* + * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an + * interrupt handler because it is automatically handled by the PSL. + * + * We need to lock the setting so this gpio can't be reconfigured to overdrive + * the real reset signal. (This is the PSL input pin not the real reset pin). + */ +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | + GPIO_HIB_WAKE_HIGH | + GPIO_LOCKED) + +/* AP/PCH Signals */ +GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) +GPIO(EC_PCH_RSMRST_ODL, PIN(A, 6), GPIO_ODR_LOW) /* TODO - b/140950085 - implement TGL sequencing requirement */ +GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) +GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) +GPIO(EC_PCH_WAKE_ODL, PIN(7, 4), GPIO_ODR_HIGH) +GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) +GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) +UNIMPLEMENTED(EC_PROCHOT_IN_L) +GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) + +GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) + +/* USB and USBC Signals */ +GPIO(USB_C1_RT_RST_ODL, PIN(8, 3), GPIO_ODR_LOW) /* USB_C1 Reset on boards board ID >=1 */ +GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) +GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) + +/* Don't have a load switch for retimer */ +UNIMPLEMENTED(USB_C1_LS_EN) +/* Retimer Force Power enable is connected to AP */ +UNIMPLEMENTED(USB_C1_RT_FORCE_PWR) + +/* Misc Signals */ + +/* + * eDP backlight - both PCH and EC have enable pins that must be high + * for the backlight to turn on. Default state is high, and can be turned + * off during sleep states. + */ +GPIO(EC_EDP_BL_EN, PIN(D, 3), GPIO_OUT_HIGH) + +/* I2C pins - Alternate function below configures I2C module on these pins */ +GPIO(EC_I2C0_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2C0_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2C1_USB_C0_SCL, PIN(9, 0), GPIO_INPUT) +GPIO(EC_I2C1_USB_C0_SDA, PIN(8, 7), GPIO_INPUT) +GPIO(EC_I2C2_USB_C1_SCL, PIN(9, 2), GPIO_INPUT) +GPIO(EC_I2C2_USB_C1_SDA, PIN(9, 1), GPIO_INPUT) +GPIO(EC_I2C3_USB_1_MIX_SCL, PIN(D, 1), GPIO_INPUT) +GPIO(EC_I2C3_USB_1_MIX_SDA, PIN(D, 0), GPIO_INPUT) +GPIO(EC_I2C5_POWER_SCL, PIN(3, 3), GPIO_INPUT) +GPIO(EC_I2C5_POWER_SDA, PIN(3, 6), GPIO_INPUT) +GPIO(EC_I2C7_EEPROM_SCL, PIN(B, 3), GPIO_INPUT) +GPIO(EC_I2C7_EEPROM_SDA, PIN(B, 2), GPIO_INPUT) + +/* Battery signals */ +GPIO(EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT) + +/* Physical HPD pins are not needed on EC as these are configured by PMC */ +GPIO(USB_C0_DP_HPD, PIN(F, 3), GPIO_INPUT) +GPIO(USB_C1_DP_HPD, PIN(7, 0), GPIO_INPUT) + +/* LED */ +GPIO(LED_1_L, PIN(C, 4), GPIO_OUT_HIGH) /* Battery - Green LED */ +GPIO(LED_2_L, PIN(C, 3), GPIO_OUT_HIGH) /* Battery - Red LED */ +GPIO(LED_3_L, PIN(C, 2), GPIO_OUT_HIGH) /* Power - White LED */ + +/* Alternate functions GPIO definitions */ +ALTERNATE(PIN_MASK(B, BIT(5) | BIT(4)), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) /* I2C0 */ +ALTERNATE(PIN_MASK(9, BIT(0) | BIT(2) | BIT(1)), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ +ALTERNATE(PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0) /* I2C1 SDA */ +ALTERNATE(PIN_MASK(D, BIT(1) | BIT(0)), 0, MODULE_I2C, 0) /* I2C3 */ +ALTERNATE(PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0) /* I2C5 */ +ALTERNATE(PIN_MASK(B, BIT(3) | BIT(2)), 0, MODULE_I2C, 0) /* I2C7 */ + +/* This selects between an LED module on the motherboard and one on the daughter + * board, to be controlled by LED_{1,2,3}_L. PWM allows driving both modules at + * the same time. */ +ALTERNATE(PIN_MASK(6, BIT(0)), 0, MODULE_PWM, 0) /* LED_SIDESEL_4_L */ + +/* Fan signals */ +GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_LOW) +ALTERNATE(PIN_MASK(B, BIT(7)), 0, MODULE_PWM, 0) /* FAN_PWM */ +ALTERNATE(PIN_MASK(4, BIT(0)), 0, MODULE_PWM, 0) /* FAN_SPEED_TACH */ + +/* Keyboard pins */ +#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) +ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_00-01 */ +ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_02-07 */ +ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_00-01 */ +GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) /* KSO_02 */ +ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_03-09 */ +ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-13 */ +ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_14 */ +ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0) /* EC_KB_BL_PWM */ + +/* UART */ +ALTERNATE(PIN_MASK(6, BIT(5) | BIT(4)), 0, MODULE_UART, 0) /* UART from EC to Servo */ + +/* Power Switch Logic (PSL) inputs */ +ALTERNATE(PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* GPIOD2 = EC_LID_OPEN */ +ALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_PMU, 0) /* GPIO00 = ACOK_OD, + GPIO01 = H1_EC_PWR_BTN_ODL + GPIO02 = EC_RST_ODL */ + diff --git a/board/lindar/led.c b/board/lindar/led.c new file mode 100644 index 0000000000..6f4e781404 --- /dev/null +++ b/board/lindar/led.c @@ -0,0 +1,110 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Power and battery LED control for Malefor + */ + +#include "common.h" +#include "led_onoff_states.h" +#include "led_common.h" +#include "gpio.h" + +#define LED_OFF_LVL 1 +#define LED_ON_LVL 0 + +const int led_charge_lvl_1 = 5; + +const int led_charge_lvl_2 = 97; + +struct led_descriptor led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_RED, LED_INDEFINITE} }, + [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, + [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_GREEN, LED_INDEFINITE} }, + [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, + [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, + [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, + [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_RED, 1 * LED_ONE_SEC}, + {LED_OFF, 1 * LED_ONE_SEC} }, + [STATE_FACTORY_TEST] = {{EC_LED_COLOR_RED, 2 * LED_ONE_SEC}, + {EC_LED_COLOR_GREEN, 2 * LED_ONE_SEC} }, +}; + +const struct led_descriptor + led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { + [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, + [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 3 * LED_ONE_SEC}, + {LED_OFF, 0.5 * LED_ONE_SEC} }, + [PWR_LED_STATE_SUSPEND_NO_AC] = {{LED_OFF, LED_INDEFINITE} }, + [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} }, +}; + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_BATTERY_LED, + EC_LED_ID_POWER_LED +}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +void led_set_color_power(enum ec_led_colors color) +{ + if (color == EC_LED_COLOR_WHITE) + gpio_set_level(GPIO_LED_3_L, LED_ON_LVL); + else + /* LED_OFF and unsupported colors */ + gpio_set_level(GPIO_LED_3_L, LED_OFF_LVL); +} + +void led_set_color_battery(enum ec_led_colors color) +{ + switch (color) { + case EC_LED_COLOR_RED: + gpio_set_level(GPIO_LED_1_L, LED_OFF_LVL); + gpio_set_level(GPIO_LED_2_L, LED_ON_LVL); + break; + case EC_LED_COLOR_AMBER: + gpio_set_level(GPIO_LED_1_L, LED_ON_LVL); + gpio_set_level(GPIO_LED_2_L, LED_ON_LVL); + break; + case EC_LED_COLOR_GREEN: + gpio_set_level(GPIO_LED_1_L, LED_ON_LVL); + gpio_set_level(GPIO_LED_2_L, LED_OFF_LVL); + break; + default: /* LED_OFF and other unsupported colors */ + gpio_set_level(GPIO_LED_1_L, LED_OFF_LVL); + gpio_set_level(GPIO_LED_2_L, LED_OFF_LVL); + break; + } +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + brightness_range[EC_LED_COLOR_RED] = 1; + brightness_range[EC_LED_COLOR_AMBER] = 1; + brightness_range[EC_LED_COLOR_GREEN] = 1; + } else if (led_id == EC_LED_ID_POWER_LED) { + brightness_range[EC_LED_COLOR_WHITE] = 1; + } +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + if (brightness[EC_LED_COLOR_RED] != 0) + led_set_color_battery(EC_LED_COLOR_RED); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(EC_LED_COLOR_AMBER); + else if (brightness[EC_LED_COLOR_GREEN] != 0) + led_set_color_battery(EC_LED_COLOR_GREEN); + else + led_set_color_battery(LED_OFF); + } else if (led_id == EC_LED_ID_POWER_LED) { + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_power(EC_LED_COLOR_WHITE); + else + led_set_color_power(LED_OFF); + } + + return EC_SUCCESS; +} diff --git a/board/lindar/power_sequence.c b/board/lindar/power_sequence.c new file mode 100644 index 0000000000..ac244c179d --- /dev/null +++ b/board/lindar/power_sequence.c @@ -0,0 +1,183 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * Volteer board-specific power sequencing + * Power sequencing is largely done by the platform automatically. + * However, if platform power sequencing is buggy or needs tuning, + * resistors can be stuffed on the board to allow the EC full control over + * the power sequencing. + */ + +#include "assert.h" +#include "chipset.h" +#include "console.h" +#include "gpio.h" +#include "hooks.h" +#include "system.h" + +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) +#define GPIO_SET_VERBOSE(signal, value) \ + gpio_set_level_verbose(CC_CHIPSET, signal, value) + +static void board_wakeup(void) +{ + CPRINTS("%s", __func__); + /* + * PP5000_USB_AG - normally enabled automatically by EN_3300_AG which + * is connected to the PSL_OUT of the Nuvoton. + * + * Assert the signal high during wakeup, deassert at hibernate + */ + GPIO_SET_VERBOSE(GPIO_EN_PP5000_USB_AG, 1); +} +DECLARE_HOOK(HOOK_INIT, board_wakeup, HOOK_PRIO_DEFAULT); + +__override void board_hibernate_late(void) +{ + CPRINTS("%s", __func__); + /* Disable PP5000_USB_AG on hibernate */ + GPIO_SET_VERBOSE(GPIO_EN_PP5000_USB_AG, 0); +} + +/* Called during S5 -> S3 transition */ +static void board_chipset_startup(void) +{ + CPRINTS("%s", __func__); + + /* + * + */ + + /* + * Power on 1.8V rail, + * tPCH06, minimum 200us from P-P3300_DSW stable to before + * VCCPRIM_1P8 starting up. + * + * The transition to S5 and S3 is gated by SLP_SUS#, which Tiger Lake + * internally delays a minimum of 95 ms from DSW_PWROK. So no delay + * needed here. + */ + GPIO_SET_VERBOSE(GPIO_EN_PP1800_A, 1); + + /* + * Power on VCCIN Aux - no delay specified, but must follow VCCPRIM_1P8 + */ + GPIO_SET_VERBOSE(GPIO_EN_PPVAR_VCCIN_AUX, 1); + + /* + * Power on bypass rails - must be turned on after VCCIN aux + * + * tPCH34, maximum 50 ms from SLP_SUS# de-assertion to completion of + * primary and bypass rail, no minimum specified. + */ + GPIO_SET_VERBOSE(GPIO_EN_VNN_BYPASS, 1); + GPIO_SET_VERBOSE(GPIO_EN_PP1050_BYPASS, 1); + + /* + * Power on VCCST - must be gated by SLP_S3#. No order with respect to + * other power signals specified. + */ + GPIO_SET_VERBOSE(GPIO_EN_PP1050_ST_S0, 1); + + /* + * Power on DDR rails + * No delay needed - SLP_S4# already guaranteed to be de-asserted. + * VDDQ must ramp after VPP (VDD1) for DDR4/LPDDR4 systems. + */ + GPIO_SET_VERBOSE(GPIO_EN_DRAM_VDD1, 1); + GPIO_SET_VERBOSE(GPIO_EN_DRAM_VDDQ, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); + +/* Called during S3 -> S0 and S0ix -> S0 transition */ +static void board_chipset_resume(void) +{ + CPRINTS("%s", __func__); + /* + * Power on VCCSTG rail to Tiger Lake, no PG signal available + */ + GPIO_SET_VERBOSE(GPIO_EN_PP1050_STG, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); + + +/* Called during S0 -> S0ix transition */ +static void board_chipset_suspend(void) +{ + CPRINTS("%s", __func__); + /* Power down VCCSTG rail */ + GPIO_SET_VERBOSE(GPIO_EN_PP1050_STG, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); + +/* Called during S3 -> S5 transition */ +static void board_chipset_shutdown(void) +{ + CPRINTS("%s", __func__); + + /* + * S0 to G3 sequence 1 of 2 (shared between Deep Sx and non-Deep Sx) + * TigerLake Rail Net Name + * VCCSTG PP1050_STG_S0 + * DDR_VDDQ PP0600_VDDQ + * VCCST PP1050_ST_S0 + * DDR_VPP PP1800_DRAM + */ + GPIO_SET_VERBOSE(GPIO_EN_PP1050_STG, 0); + GPIO_SET_VERBOSE(GPIO_EN_DRAM_VDDQ, 0); + GPIO_SET_VERBOSE(GPIO_EN_PP1050_ST_S0, 0); + GPIO_SET_VERBOSE(GPIO_EN_DRAM_VDD1, 0); + + /* + * S0 to G3 sequence 2 of 2 (non-Deep Sx) + * TigerLake Name Net Name + * VCCPRIM_3P3 PP3300_A + * VCCDSW_3P3 VCCDSW_3P3 (PP3300_A) + * V5.0A PP5000_A + * VCCPRIM_1P8 PP1800_A + * VCCIN_AUX PPVAR_VCCIN_AUX + * VNN_BYPASS PPVAR_VNN_BYPASS + * V1.05A_BYPASS PP1050_A_BYPASS + */ + + /* Ice Lake shutdown already sequences first 3 rails above. */ + chipset_force_shutdown(CHIPSET_SHUTDOWN_G3); + + GPIO_SET_VERBOSE(GPIO_EN_PP1800_A, 0); + GPIO_SET_VERBOSE(GPIO_EN_PPVAR_VCCIN_AUX, 0); + GPIO_SET_VERBOSE(GPIO_EN_VNN_BYPASS, 0); + GPIO_SET_VERBOSE(GPIO_EN_PP1050_BYPASS, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); + +/** + * Handle C10_GATE transitions - see VCCSTG enable logic (figure 232, page 406) + * in Tiger Lake PDG, revision 1.0. + * + * TODO: b/141322107 - This function can be promoted to common TigerLake power + * file if CPU_C10_GATE_L support provided by the platform is not sufficient. + */ +void c10_gate_change(enum gpio_signal signal) +{ + /* Pass through CPU_C10_GATE_L as enable for VCCSTG rail */ + int c10_gate_in; + int vccstg_out; + + ASSERT(signal == GPIO_CPU_C10_GATE_L); + + c10_gate_in = gpio_get_level(signal); + vccstg_out = gpio_get_level(GPIO_EN_PP1050_STG); + + if (vccstg_out == c10_gate_in) + return; + + gpio_set_level(GPIO_EN_PP1050_STG, c10_gate_in); +} + + + + + |