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-rw-r--r--board/dragonegg/gpio.inc1
-rw-r--r--board/halvor/gpio.inc1
-rw-r--r--board/jslrvp_ite/board.c13
-rw-r--r--board/jslrvp_ite/gpio.inc8
-rw-r--r--board/malefor/gpio.inc1
-rw-r--r--board/tglrvpu_ite/board.c13
-rw-r--r--board/tglrvpu_ite/gpio.inc7
-rw-r--r--board/volteer/board.h1
-rw-r--r--board/volteer/gpio.inc1
9 files changed, 29 insertions, 17 deletions
diff --git a/board/dragonegg/gpio.inc b/board/dragonegg/gpio.inc
index 474bf49643..ac46ccbd6f 100644
--- a/board/dragonegg/gpio.inc
+++ b/board/dragonegg/gpio.inc
@@ -66,7 +66,6 @@ GPIO(PP5000_PG_OD, PIN(F, 0), GPIO_INPUT)
/* SYS_PWROK generation is done by the Dialog power good IC */
UNIMPLEMENTED(PG_EC_ALL_SYS_PWRGD)
-UNIMPLEMENTED(PCH_SYS_PWROK)
/* USB and USBC Signals */
GPIO(USB_OC_ODL, PIN(J, 6), GPIO_ODR_HIGH)
diff --git a/board/halvor/gpio.inc b/board/halvor/gpio.inc
index 19da03aa61..6ebbcc93b8 100644
--- a/board/halvor/gpio.inc
+++ b/board/halvor/gpio.inc
@@ -53,6 +53,7 @@ GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_inte
/* Power Sequencing Signals */
GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW)
GPIO(EN_PP5000_A, PIN(A, 4), GPIO_OUT_LOW)
+GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */
/* The EC does not buffer this signal on Volteer. */
UNIMPLEMENTED(PCH_DSW_PWROK)
diff --git a/board/jslrvp_ite/board.c b/board/jslrvp_ite/board.c
index bb41fedcc9..5ea6f057b6 100644
--- a/board/jslrvp_ite/board.c
+++ b/board/jslrvp_ite/board.c
@@ -10,6 +10,7 @@
#include "driver/charger/isl923x.h"
#include "extpower.h"
#include "i2c.h"
+#include "icelake.h"
#include "intc.h"
#include "lid_switch.h"
#include "power.h"
@@ -101,6 +102,18 @@ const struct charger_config_t chg_chips[] = {
const unsigned int chg_cnt = ARRAY_SIZE(chg_chips);
+/******************************************************************************/
+/* PWROK signal configuration */
+/*
+ * On JSLRVP the ALL_SYS_PWRGD, VCCST_PWRGD, PCH_PWROK, and SYS_PWROK
+ * signals are handled by the board. No EC control needed.
+ */
+const struct intel_x86_pwrok_signal pwrok_signal_assert_list[] = {};
+const int pwrok_signal_assert_count = ARRAY_SIZE(pwrok_signal_assert_list);
+
+const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[] = {};
+const int pwrok_signal_deassert_count = ARRAY_SIZE(pwrok_signal_assert_list);
+
/*
* Returns board information (board id[7:0] and Fab id[15:8]) on success
* -1 on error.
diff --git a/board/jslrvp_ite/gpio.inc b/board/jslrvp_ite/gpio.inc
index 3d46c1ddd3..66e0fe5595 100644
--- a/board/jslrvp_ite/gpio.inc
+++ b/board/jslrvp_ite/gpio.inc
@@ -68,15 +68,7 @@ GPIO(EN_PP5000, PIN(L, 4), GPIO_OUT_LOW)
GPIO(EN_PP3300_A, PIN(C, 3), GPIO_OUT_LOW)
GPIO(EC_PCH_DSW_PWROK, PIN(L, 6), GPIO_OUT_LOW)
-/*
- * SYS_PWROK driven directly to AP by Silego, EC not needed for generation.
- * PCH_SYS_PWROK is routed to EC, but mark unimplemented to prevent common
- * Ice Lake code from driving signal.
- */
-UNIMPLEMENTED(PCH_SYS_PWROK)
UNIMPLEMENTED(EN_VCCIO_EXT)
-UNIMPLEMENTED(EC_AP_PCH_PWROK_OD)
-UNIMPLEMENTED(EC_AP_VCCST_PWRGD_OD)
/* Host communication GPIOs */
GPIO(PCH_WAKE_L, PIN(J, 0), GPIO_ODR_HIGH)
diff --git a/board/malefor/gpio.inc b/board/malefor/gpio.inc
index 6aa4712f98..67dc3553e1 100644
--- a/board/malefor/gpio.inc
+++ b/board/malefor/gpio.inc
@@ -53,6 +53,7 @@ GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_inte
/* Power Sequencing Signals */
GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW)
GPIO(EN_PP5000_A, PIN(A, 4), GPIO_OUT_LOW)
+GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */
/* The EC does not buffer this signal on Volteer. */
UNIMPLEMENTED(PCH_DSW_PWROK)
diff --git a/board/tglrvpu_ite/board.c b/board/tglrvpu_ite/board.c
index c46772aaaa..f62a90d177 100644
--- a/board/tglrvpu_ite/board.c
+++ b/board/tglrvpu_ite/board.c
@@ -10,6 +10,7 @@
#include "driver/charger/isl9241.h"
#include "extpower.h"
#include "i2c.h"
+#include "icelake.h"
#include "intc.h"
#include "lid_switch.h"
#include "power.h"
@@ -119,6 +120,18 @@ const struct charger_config_t chg_chips[] = {
const unsigned int chg_cnt = ARRAY_SIZE(chg_chips);
+/******************************************************************************/
+/* PWROK signal configuration */
+/*
+ * On TGLRVP the ALL_SYS_PWRGD, VCCST_PWRGD, PCH_PWROK, and SYS_PWROK
+ * signals are handled by the board. No EC control needed.
+ */
+const struct intel_x86_pwrok_signal pwrok_signal_assert_list[] = {};
+const int pwrok_signal_assert_count = ARRAY_SIZE(pwrok_signal_assert_list);
+
+const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[] = {};
+const int pwrok_signal_deassert_count = ARRAY_SIZE(pwrok_signal_assert_list);
+
/*
* Returns board information (board id[7:0] and Fab id[15:8]) on success
* -1 on error.
diff --git a/board/tglrvpu_ite/gpio.inc b/board/tglrvpu_ite/gpio.inc
index e5ad8cd79b..9ce04cdc71 100644
--- a/board/tglrvpu_ite/gpio.inc
+++ b/board/tglrvpu_ite/gpio.inc
@@ -74,13 +74,6 @@ GPIO(EN_PP5000, PIN(L, 4), GPIO_OUT_LOW)
GPIO(EN_PP3300_A, PIN(K, 2), GPIO_OUT_LOW)
GPIO(EC_PCH_DSW_PWROK, PIN(L, 6), GPIO_OUT_LOW)
-/*
- * SYS_PWROK driven directly to AP by Silego, EC not needed for generation.
- * PCH_SYS_PWROK is routed to EC, but mark unimplemented to prevent common
- * Ice Lake code from driving signal.
- */
-UNIMPLEMENTED(PCH_SYS_PWROK)
-
/* Host communication GPIOs */
GPIO(PCH_WAKE_L, PIN(J, 0), GPIO_ODR_HIGH)
#ifndef CONFIG_HOSTCMD_ESPI
diff --git a/board/volteer/board.h b/board/volteer/board.h
index 8ebc01ede8..3c7bd930a9 100644
--- a/board/volteer/board.h
+++ b/board/volteer/board.h
@@ -72,7 +72,6 @@
#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL
#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL
#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST
-#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK
#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L
#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L
#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK
diff --git a/board/volteer/gpio.inc b/board/volteer/gpio.inc
index 73634db510..ce1c1eae43 100644
--- a/board/volteer/gpio.inc
+++ b/board/volteer/gpio.inc
@@ -60,6 +60,7 @@ GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_inte
/* Power Sequencing Signals */
GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW)
GPIO(EN_PP5000_A, PIN(A, 4), GPIO_OUT_LOW)
+GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */
/* The EC does not buffer this signal on Volteer. */
UNIMPLEMENTED(PCH_DSW_PWROK)
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