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-rw-r--r--chip/g/dcrypto/gcm.c2
-rw-r--r--chip/g/gpio.c8
-rw-r--r--chip/g/i2cs.c2
-rw-r--r--chip/g/idle.c2
-rw-r--r--chip/g/ite_flash.c4
-rw-r--r--chip/g/pmu.c2
-rw-r--r--chip/g/registers.h40
-rw-r--r--chip/g/signed_header.h2
-rw-r--r--chip/g/sps.h2
-rw-r--r--chip/g/usb_spi.h6
10 files changed, 35 insertions, 35 deletions
diff --git a/chip/g/dcrypto/gcm.c b/chip/g/dcrypto/gcm.c
index 18016de612..2caddf4741 100644
--- a/chip/g/dcrypto/gcm.c
+++ b/chip/g/dcrypto/gcm.c
@@ -46,7 +46,7 @@ static void gcm_init_iv(
if (iv_len == 12) {
memcpy(counter, iv, 12);
- counter[3] = 1 << 24;
+ counter[3] = BIT(24);
} else {
size_t i;
uint32_t len = iv_len;
diff --git a/chip/g/gpio.c b/chip/g/gpio.c
index 432608beea..79b40124d5 100644
--- a/chip/g/gpio.c
+++ b/chip/g/gpio.c
@@ -426,10 +426,10 @@ static void show_pinmux(const char *name, int i, int ofs)
ccprintf("%08x: %s%-2d %2d %s%s%s%s ",
GC_PINMUX_BASE_ADDR + i * 8 + ofs,
name, i, sel,
- (ctl & (1<<2)) ? " IN" : "",
- (ctl & (1<<3)) ? " PD" : "",
- (ctl & (1<<4)) ? " PU" : "",
- (ctl & (1<<5)) ? " INV" : "");
+ (ctl & BIT(2)) ? " IN" : "",
+ (ctl & BIT(3)) ? " PD" : "",
+ (ctl & BIT(4)) ? " PU" : "",
+ (ctl & BIT(5)) ? " INV" : "");
print_periph(sel);
diff --git a/chip/g/i2cs.c b/chip/g/i2cs.c
index 55aca1e85a..745853cdc2 100644
--- a/chip/g/i2cs.c
+++ b/chip/g/i2cs.c
@@ -73,7 +73,7 @@
#include "task.h"
#include "tpm_log.h"
-#define REGISTER_FILE_SIZE (1 << 6) /* 64 bytes. */
+#define REGISTER_FILE_SIZE BIT(6) /* 64 bytes. */
#define REGISTER_FILE_MASK (REGISTER_FILE_SIZE - 1)
/* Console output macros */
diff --git a/chip/g/idle.c b/chip/g/idle.c
index e46351d2f5..1ed16de4a4 100644
--- a/chip/g/idle.c
+++ b/chip/g/idle.c
@@ -202,7 +202,7 @@ static void idle_init(void)
* If bus obfuscation is enabled disable sleep.
*/
if ((GR_FUSE(OBFUSCATION_EN) == 5) ||
- (GR_FUSE(FW_DEFINED_BROM_APPLYSEC) & (1 << 3)) ||
+ (GR_FUSE(FW_DEFINED_BROM_APPLYSEC) & BIT(3)) ||
(runlevel_is_high() && GREAD(GLOBALSEC, OBFS_SW_EN))) {
CPRINTS("bus obfuscation enabled disabling sleep");
idle_default = IDLE_WFI;
diff --git a/chip/g/ite_flash.c b/chip/g/ite_flash.c
index b805e09e6a..b4e1699a08 100644
--- a/chip/g/ite_flash.c
+++ b/chip/g/ite_flash.c
@@ -47,8 +47,8 @@ void generate_ite_sync(void)
* 1 to be able to generate two necessary waveforms.
*/
both_zero = 0;
- one_zero = 1 << 13;
- zero_one = 1 << 12;
+ one_zero = BIT(13);
+ zero_one = BIT(12);
both_one = one_zero | zero_one;
/* Address of the mask byte register to use to set both pins. */
diff --git a/chip/g/pmu.c b/chip/g/pmu.c
index 47b8341d5a..a324e6cee7 100644
--- a/chip/g/pmu.c
+++ b/chip/g/pmu.c
@@ -10,7 +10,7 @@
* RC Trim constants
*/
#define RCTRIM_RESOLUTION (12)
-#define RCTRIM_LOAD_VAL (1 << 11)
+#define RCTRIM_LOAD_VAL BIT(11)
#define RCTRIM_RANGE_MAX (7 * 7)
#define RCTRIM_RANGE_MIN (-8 * 7)
#define RCTRIM_RANGE (RCTRIM_RANGE_MAX - RCTRIM_RANGE_MIN + 1)
diff --git a/chip/g/registers.h b/chip/g/registers.h
index 9c16df7f62..9127802db3 100644
--- a/chip/g/registers.h
+++ b/chip/g/registers.h
@@ -387,7 +387,7 @@ static inline int x_timehs_addr(unsigned int module, unsigned int timer,
*/
#define GP_OUT(v) (GC_USB_GGPIO_GPO_MASK & ((v) << GC_USB_GGPIO_GPO_LSB))
#define GP_IN(v) (GC_USB_GGPIO_GPI_MASK & ((v) << GC_USB_GGPIO_GPI_LSB))
-#define GGPIO_WRITE(reg, val) GP_OUT(((1 << 15) | /* write bit */ \
+#define GGPIO_WRITE(reg, val) GP_OUT((BIT(15) | /* write bit */ \
(((val) & 0xFF) << 4) | /* value */ \
((reg) & 0x0F))) /* register */
#define GGPIO_READ(reg) GP_OUT((reg) & 0x0F) /* register */
@@ -399,14 +399,14 @@ static inline int x_timehs_addr(unsigned int module, unsigned int timer,
#define USB_SEL_PHY0 0x00 /* bit 0 */
#define USB_SEL_PHY1 0x01 /* bit 0 */
#define USB_IDLE_PHY_CTRL_REG 1 /* register number */
-#define USB_FS_SUSPENDB (1 << 7)
-#define USB_FS_EDGE_SEL (1 << 6)
-#define USB_DM_PULLUP_EN (1 << 5)
-#define USB_DP_RPU2_ENB (1 << 4)
-#define USB_DP_RPU1_ENB (1 << 3)
-#define USB_TX_OEB (1 << 2)
-#define USB_TX_DPO (1 << 1)
-#define USB_TX_DMO (1 << 0)
+#define USB_FS_SUSPENDB BIT(7)
+#define USB_FS_EDGE_SEL BIT(6)
+#define USB_DM_PULLUP_EN BIT(5)
+#define USB_DP_RPU2_ENB BIT(4)
+#define USB_DP_RPU1_ENB BIT(3)
+#define USB_TX_OEB BIT(2)
+#define USB_TX_DPO BIT(1)
+#define USB_TX_DMO BIT(0)
#define GAHBCFG_DMA_EN (1 << GC_USB_GAHBCFG_DMAEN_LSB)
#define GAHBCFG_GLB_INTR_EN (1 << GC_USB_GAHBCFG_GLBLINTRMSK_LSB)
@@ -515,8 +515,8 @@ static inline int x_timehs_addr(unsigned int module, unsigned int timer,
#define DXEPCTL_USBACTEP (1 << GC_USB_DIEPCTL0_USBACTEP_LSB)
#define DXEPCTL_MPS64 (0 << GC_USB_DIEPCTL0_MPS_LSB)
#define DXEPCTL_MPS(cnt) ((cnt) << GC_USB_DIEPCTL1_MPS_LSB)
-#define DXEPCTL_SET_D0PID (1 << 28)
-#define DXEPCTL_SET_D1PID (1 << 29)
+#define DXEPCTL_SET_D0PID BIT(28)
+#define DXEPCTL_SET_D1PID BIT(29)
#define DXEPTSIZ_SUPCNT(n) ((n) << GC_USB_DOEPTSIZ0_SUPCNT_LSB)
#define DXEPTSIZ_PKTCNT(n) ((n) << GC_USB_DIEPTSIZ0_PKTCNT_LSB)
@@ -528,12 +528,12 @@ static inline int x_timehs_addr(unsigned int module, unsigned int timer,
#define DOEPDMA_BS_HOST_BSY (3 << 30)
#define DOEPDMA_BS_MASK (3 << 30)
#define DOEPDMA_RXSTS_MASK (3 << 28)
-#define DOEPDMA_LAST (1 << 27)
-#define DOEPDMA_SP (1 << 26)
-#define DOEPDMA_IOC (1 << 25)
-#define DOEPDMA_SR (1 << 24)
-#define DOEPDMA_MTRF (1 << 23)
-#define DOEPDMA_NAK (1 << 16)
+#define DOEPDMA_LAST BIT(27)
+#define DOEPDMA_SP BIT(26)
+#define DOEPDMA_IOC BIT(25)
+#define DOEPDMA_SR BIT(24)
+#define DOEPDMA_MTRF BIT(23)
+#define DOEPDMA_NAK BIT(16)
#define DOEPDMA_RXBYTES(n) (((n) & 0xFFFF) << 0)
#define DOEPDMA_RXBYTES_MASK (0xFFFF << 0)
@@ -543,9 +543,9 @@ static inline int x_timehs_addr(unsigned int module, unsigned int timer,
#define DIEPDMA_BS_HOST_BSY (3 << 30)
#define DIEPDMA_BS_MASK (3 << 30)
#define DIEPDMA_TXSTS_MASK (3 << 28)
-#define DIEPDMA_LAST (1 << 27)
-#define DIEPDMA_SP (1 << 26)
-#define DIEPDMA_IOC (1 << 25)
+#define DIEPDMA_LAST BIT(27)
+#define DIEPDMA_SP BIT(26)
+#define DIEPDMA_IOC BIT(25)
#define DIEPDMA_TXBYTES(n) (((n) & 0xFFFF) << 0)
#define DIEPDMA_TXBYTES_MASK (0xFFFF << 0)
diff --git a/chip/g/signed_header.h b/chip/g/signed_header.h
index 3ee4085a14..6096350a54 100644
--- a/chip/g/signed_header.h
+++ b/chip/g/signed_header.h
@@ -100,7 +100,7 @@ BUILD_ASSERT(offsetof(struct SignedHeader, info_chk_) == 1020);
*
* This convention is enforced at the key generation time.
*/
-#define G_SIGNED_FOR_PROD(h) ((h)->keyid & (1 << 2))
+#define G_SIGNED_FOR_PROD(h) ((h)->keyid & BIT(2))
#endif /* __CROS_EC_SIGNED_HEADER_H */
diff --git a/chip/g/sps.h b/chip/g/sps.h
index b9684c4b90..5e95042a7e 100644
--- a/chip/g/sps.h
+++ b/chip/g/sps.h
@@ -19,7 +19,7 @@ enum sps_mode {
};
/* Receive and transmit FIFO size and mask. */
-#define SPS_FIFO_SIZE (1 << 10)
+#define SPS_FIFO_SIZE BIT(10)
#define SPS_FIFO_MASK (SPS_FIFO_SIZE - 1)
/*
diff --git a/chip/g/usb_spi.h b/chip/g/usb_spi.h
index 72364ab469..cedfe78485 100644
--- a/chip/g/usb_spi.h
+++ b/chip/g/usb_spi.h
@@ -77,9 +77,9 @@ enum usb_spi_request {
/* USB SPI device bitmasks */
enum usb_spi {
USB_SPI_DISABLE = 0,
- USB_SPI_AP = (1 << 0),
- USB_SPI_EC = (1 << 1),
- USB_SPI_H1 = (1 << 2),
+ USB_SPI_AP = BIT(0),
+ USB_SPI_EC = BIT(1),
+ USB_SPI_H1 = BIT(2),
USB_SPI_ALL = USB_SPI_AP | USB_SPI_EC | USB_SPI_H1
};
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