1 files changed, 68 insertions, 0 deletions
diff --git a/chip/ish/aontaskfw/ish_aontask.ld.in b/chip/ish/aontaskfw/ish_aontask.ld.in
new file mode 100644
index 0000000000..a45bbdb6a9
--- /dev/null
+++ b/chip/ish/aontaskfw/ish_aontask.ld.in
@@ -0,0 +1,68 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <config_chip.h>
+
+ENTRY(ish_aon_main);
+
+#define SRAM_START  CONFIG_ISH_AON_SRAM_BASE_START
+#define SRAM_RW_LEN (CONFIG_ISH_AON_SRAM_SIZE - CONFIG_ISH_AON_SRAM_ROM_SIZE)
+
+/* reserved stack size */
+#define STACK_SIZE  (256)
+
+/**
+ * resered 8 bytes for GDB showing correct stack
+ * information during source code level debuging
+ */
+#define RESERVED_GDB_SIZE  (8)
+
+#define RAM_LEN (SRAM_RW_LEN - STACK_SIZE - RESERVED_GDB_SIZE)
+
+/**
+ *  AON memory layout
+ * --------------+--------------+-------------------+-------------------+
+ * |   RAM_LEN   |  STACK_SIZE  |  8 Bytes for GDB  |  ROM(128 Bytes)   |
+ * --------------+--------------+-------------------+-------------------+
+ */
+
+MEMORY
+{
+    /* leave STACK_SIZE bytes in the end of memory for stack */
+    RAM : ORIGIN = SRAM_START, LENGTH = RAM_LEN }
+
+SECTIONS
+{
+    /* AON parts visible to FW are linked to the beginning of the AON area */
+    .data.aon_share : AT(CONFIG_ISH_AON_SRAM_BASE_START)
+    {
+	KEEP(*(.data.aon_share))
+    } > RAM
+
+    .data :
+    {
+	*(.data)
+	    *(.data*)
+    } > RAM
+
+    .text :
+    {
+	*(.text)
+	    *(.text*)
+    } > RAM
+
+    .bss :
+    {
+	*(.bss)
+	    *(.bss*)
+    } > RAM
+
+    .stack_tag :
+    {
+	KEEP(*(.stack_tag))
+    } > RAM
+
+
+}