diff options
Diffstat (limited to 'chip/ish/power_mgt.h')
| -rw-r--r-- | chip/ish/power_mgt.h | 39 |
1 files changed, 34 insertions, 5 deletions
diff --git a/chip/ish/power_mgt.h b/chip/ish/power_mgt.h index fe0c1b4539..2921e0534e 100644 --- a/chip/ish/power_mgt.h +++ b/chip/ish/power_mgt.h @@ -18,26 +18,55 @@ enum { ISH_PM_STATE_D0I2, /* deep sleep state 3: TCG, SRAM power off, cpu halt*/ ISH_PM_STATE_D0I3, - /* D3 state: power off state, on ISH5.0, can't do real power off, + /** + * D3 state: power off state, on ISH5.0, can't do real power off, * similar to D0I3, but will reset ISH */ ISH_PM_STATE_D3, - /* ISH received reset_prep interrupt during S0->Sx transition */ + /** + * reset ISH, main FW received 'reboot' command + */ + ISH_PM_STATE_RESET, + /** + * reset ISH, main FW received reset_prep interrupt during + * S0->Sx transition. + */ ISH_PM_STATE_RESET_PREP, ISH_PM_STATE_NUM }; -/* halt ISH cpu */ -static inline void ish_halt(void) +/* halt ISH minute-ia cpu core */ +static inline void ish_mia_halt(void) { /* make sure interrupts are enabled before halting */ __asm__ volatile("sti;\n" "hlt;"); } -/* ish low power management initialization, +/* reset ISH mintue-ia cpu core */ +__attribute__((noreturn)) +static inline void ish_mia_reset(void) +{ + /** + * ISH HW looks at the rising edge of this bit to + * trigger a MIA reset. + */ + ISH_RST_REG = 0; + ISH_RST_REG = 1; + + __builtin_unreachable(); +} + + +/** + * ish low power management initialization, * should be called at system init stage before RTOS task scheduling start */ void ish_pm_init(void); +/** + * reset ISH (reset minute-ia cpu core, and power off main SRAM) + */ +void ish_pm_reset(void) __attribute__((noreturn)); + #endif /* __CROS_EC_POWER_MGT_H */ |