diff options
Diffstat (limited to 'chip/it83xx/config_chip_it8xxx2.h')
| -rw-r--r-- | chip/it83xx/config_chip_it8xxx2.h | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/chip/it83xx/config_chip_it8xxx2.h b/chip/it83xx/config_chip_it8xxx2.h index 0c2dbced13..deef92893d 100644 --- a/chip/it83xx/config_chip_it8xxx2.h +++ b/chip/it83xx/config_chip_it8xxx2.h @@ -26,24 +26,31 @@ #define CHIP_RAM_SPACE_RESERVED 0x3000 #define CONFIG_RAM_BASE 0x80080000 -#define CONFIG_RAM_SIZE 0x00040000 +#define CONFIG_RAM_SIZE 0x00010000 #define CONFIG_PROGRAM_MEMORY_BASE (CHIP_ILM_BASE) -#if defined(CHIP_VARIANT_IT83202AX) +#if defined(CHIP_VARIANT_IT83202BX) /* TODO(b/133460224): enable properly chip config option. */ -#define CONFIG_FLASH_SIZE 0x00040000 +#define CONFIG_FLASH_SIZE 0x00080000 /* chip id is 3 bytes */ #define IT83XX_CHIP_ID_3BYTES /* + * Disable eSPI pad, then PLL change + * (include EC clock frequency) is succeed even CS# is low. + */ +#define IT83XX_ESPI_INHIBIT_CS_BY_PAD_DISABLED +/* The slave frequency is adjustable (bit[2-0] at register IT83XX_ESPI_GCAC1) */ +#define IT83XX_ESPI_SLAVE_MAX_FREQ_CONFIGURABLE +/* Watchdog reset supports hardware reset. */ +#define IT83XX_ETWD_HW_RESET_SUPPORT +/* * More GPIOs can be set as 1.8v input. * Please refer to gpio_1p8v_sel[] for 1.8v GPIOs. */ #define IT83XX_GPIO_1P8V_PIN_EXTENDED /* All GPIOs support interrupt on rising, falling, and either edge. */ #define IT83XX_GPIO_INT_FLEXIBLE -/* Enable interrupts of group 21 and 22. */ -#define IT83XX_INTC_GROUP_21_22_SUPPORT /* Enable detect type-c plug in interrupt. */ #define IT83XX_INTC_PLUG_IN_SUPPORT #else |