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Diffstat (limited to 'chip/it83xx/irq.c')
-rw-r--r--chip/it83xx/irq.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/chip/it83xx/irq.c b/chip/it83xx/irq.c
index c2564c05a3..308fa5b2e7 100644
--- a/chip/it83xx/irq.c
+++ b/chip/it83xx/irq.c
@@ -122,8 +122,16 @@ void chip_disable_irq(int irq)
int bit = irq % 8;
/* SOC's interrupts share CPU machine-mode external interrupt */
- if (IS_ENABLED(CHIP_CORE_RISCV))
+ if (IS_ENABLED(CHIP_CORE_RISCV)) {
+ volatile uint8_t _ier __unused;
+
IT83XX_INTC_REG(irq_groups[group].ier_off) &= ~BIT(bit);
+ /*
+ * This load operation will guarantee the above modification of
+ * EC's register can be seen by any following instructions.
+ */
+ _ier = IT83XX_INTC_REG(irq_groups[group].ier_off);
+ }
/* SOC's interrupts use CPU HW interrupt 2 ~ 15 */
if (IS_ENABLED(CHIP_CORE_NDS32))