1 files changed, 2 insertions, 2 deletions
diff --git a/chip/it83xx/spi.c b/chip/it83xx/spi.c
index 82f64c65c8..4c70634bc2 100644
--- a/chip/it83xx/spi.c
+++ b/chip/it83xx/spi.c
@@ -265,7 +265,7 @@ void spi_slv_int_handler(void)
 	 * There is a limitation that Rx FIFO starts dropping
 	 * data when the CPU access the the FIFO. So we will
 	 * wait the data until Rx byte reach then to parse.
-	 * The Rx FIFO to reach is dummy data generated by
+	 * The Rx FIFO to reach is mock data generated by
 	 * generate clock that is not the bytes sent from
 	 * the host.
 	 */
@@ -291,7 +291,7 @@ static void spi_init(void)
 	 * bit6 : SPI pin function select (0b:Enable, 1b:Mask)
 	 */
 	IT83XX_GCTRL_MCCR3 |= IT83XX_GCTRL_SPISLVPFE;
-	/* Set dummy blcoked byte */
+	/* Set unused blocked byte */
 	IT83XX_SPI_HPR2 = 0x00;
 	/* Set FIFO data target count */
 	IT83XX_SPI_FTCB1R = (SPI_RX_MAX_FIFO_SIZE >> 8) & 0xff;