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-rw-r--r--chip/lm4/clock.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/chip/lm4/clock.c b/chip/lm4/clock.c
index 4fa72c5ca1..04b86fae92 100644
--- a/chip/lm4/clock.c
+++ b/chip/lm4/clock.c
@@ -167,16 +167,6 @@ void clock_init(void)
LM4_SYSTEM_MOSCCTL = 0x04;
#endif
- /*
- * TODO(crosbug.com/p/23794): UART seems to glitch unless we wait 500k
- * cycles before enabling the PLL, but only if this is a cold boot.
- * Why? UART doesn't even use the PLL'd system clock. I've heard
- * rumors the Stellaris ROM library does this too, but why? Revisit on
- * current systems to see if this is is still needed.
- */
- if (!system_jumped_to_this_image())
- clock_wait_cycles(500000);
-
/* Make sure PLL is disabled */
disable_pll();
}