diff options
Diffstat (limited to 'chip/lm4')
| -rw-r--r-- | chip/lm4/build.mk | 2 | ||||
| -rw-r--r-- | chip/lm4/config_chip.h | 3 | ||||
| -rw-r--r-- | chip/lm4/jtag.c | 65 | ||||
| -rw-r--r-- | chip/lm4/system.c | 36 |
4 files changed, 40 insertions, 66 deletions
diff --git a/chip/lm4/build.mk b/chip/lm4/build.mk index 3253ebd478..8adde58abd 100644 --- a/chip/lm4/build.mk +++ b/chip/lm4/build.mk @@ -12,7 +12,7 @@ CORE:=cortex-m CFLAGS_CPU+=-march=armv7e-m -mcpu=cortex-m4 # Required chip modules -chip-y=clock.o gpio.o hwtimer.o jtag.o system.o uart.o +chip-y=clock.o gpio.o hwtimer.o system.o uart.o # Optional chip modules chip-$(CONFIG_ADC)+=adc.o chip_temp_sensor.o diff --git a/chip/lm4/config_chip.h b/chip/lm4/config_chip.h index 31ee2f6b9b..64dfb99dc6 100644 --- a/chip/lm4/config_chip.h +++ b/chip/lm4/config_chip.h @@ -98,6 +98,9 @@ #define CONFIG_SWITCH #define CONFIG_MPU +/* Chip needs to do custom pre-init */ +#define CONFIG_CHIP_PRE_INIT + #define GPIO_PIN(port, index) GPIO_##port, (1 << index) #define GPIO_PIN_MASK(port, mask) GPIO_##port, (mask) diff --git a/chip/lm4/jtag.c b/chip/lm4/jtag.c deleted file mode 100644 index a3867aa0f6..0000000000 --- a/chip/lm4/jtag.c +++ /dev/null @@ -1,65 +0,0 @@ -/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "clock.h" -#include "gpio.h" -#include "jtag.h" -#include "registers.h" -#include "system.h" - -void jtag_pre_init(void) -{ - /* Enable clocks to GPIO block C in run and sleep modes. */ - clock_enable_peripheral(CGC_OFFSET_GPIO, 0x0004, CGC_MODE_ALL); - - /* - * Ensure PC0:3 are set to JTAG function. They should be set this way - * on a cold boot, but on a warm reboot a previous misbehaving image - * could have set them differently. - */ - if (((LM4_GPIO_PCTL(LM4_GPIO_C) & 0x0000ffff) == 0x00001111) && - ((LM4_GPIO_AFSEL(LM4_GPIO_C) & 0x0f) == 0x0f) && - ((LM4_GPIO_DEN(LM4_GPIO_C) & 0x0f) == 0x0f) && - ((LM4_GPIO_PUR(LM4_GPIO_C) & 0x0f) == 0x0f)) - return; /* Already properly configured */ - - /* Unlock commit register for JTAG pins */ - LM4_GPIO_LOCK(LM4_GPIO_C) = LM4_GPIO_LOCK_UNLOCK; - LM4_GPIO_CR(LM4_GPIO_C) |= 0x0f; - - /* Reset JTAG pins */ - LM4_GPIO_PCTL(LM4_GPIO_C) = - (LM4_GPIO_PCTL(LM4_GPIO_C) & 0xffff0000) | 0x00001111; - LM4_GPIO_AFSEL(LM4_GPIO_C) |= 0x0f; - LM4_GPIO_DEN(LM4_GPIO_C) |= 0x0f; - LM4_GPIO_PUR(LM4_GPIO_C) |= 0x0f; - - /* Set interrupt on either edge of the JTAG signals */ - LM4_GPIO_IS(LM4_GPIO_C) &= ~0x0f; - LM4_GPIO_IBE(LM4_GPIO_C) |= 0x0f; - - /* Re-lock commit register */ - LM4_GPIO_CR(LM4_GPIO_C) &= ~0x0f; - LM4_GPIO_LOCK(LM4_GPIO_C) = 0; -} - -#ifdef CONFIG_LOW_POWER_IDLE -void jtag_interrupt(enum gpio_signal signal) -{ - /* - * This interrupt is the first sign someone is trying to use - * the JTAG. Disable slow speed sleep so that the JTAG action - * can take place. - */ - disable_sleep(SLEEP_MASK_JTAG); - - /* - * Once we get this interrupt, disable it from occurring again - * to avoid repeated interrupts when debugging via JTAG. - */ - gpio_disable_interrupt(GPIO_JTAG_TCK); -} -#endif /* CONFIG_LOW_POWER_IDLE */ - diff --git a/chip/lm4/system.c b/chip/lm4/system.c index 684b520dae..625a4076e2 100644 --- a/chip/lm4/system.c +++ b/chip/lm4/system.c @@ -388,6 +388,42 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds) hibernate(seconds, microseconds, HIBDATA_WAKE_PIN); } +void chip_pre_init(void) +{ + /* Enable clocks to GPIO block C in run and sleep modes. */ + clock_enable_peripheral(CGC_OFFSET_GPIO, 0x0004, CGC_MODE_ALL); + + /* + * Ensure PC0:3 are set to JTAG function. They should be set this way + * on a cold boot, but on a warm reboot a previous misbehaving image + * could have set them differently. + */ + if (((LM4_GPIO_PCTL(LM4_GPIO_C) & 0x0000ffff) == 0x00001111) && + ((LM4_GPIO_AFSEL(LM4_GPIO_C) & 0x0f) == 0x0f) && + ((LM4_GPIO_DEN(LM4_GPIO_C) & 0x0f) == 0x0f) && + ((LM4_GPIO_PUR(LM4_GPIO_C) & 0x0f) == 0x0f)) + return; /* Already properly configured */ + + /* Unlock commit register for JTAG pins */ + LM4_GPIO_LOCK(LM4_GPIO_C) = LM4_GPIO_LOCK_UNLOCK; + LM4_GPIO_CR(LM4_GPIO_C) |= 0x0f; + + /* Reset JTAG pins */ + LM4_GPIO_PCTL(LM4_GPIO_C) = + (LM4_GPIO_PCTL(LM4_GPIO_C) & 0xffff0000) | 0x00001111; + LM4_GPIO_AFSEL(LM4_GPIO_C) |= 0x0f; + LM4_GPIO_DEN(LM4_GPIO_C) |= 0x0f; + LM4_GPIO_PUR(LM4_GPIO_C) |= 0x0f; + + /* Set interrupt on either edge of the JTAG signals */ + LM4_GPIO_IS(LM4_GPIO_C) &= ~0x0f; + LM4_GPIO_IBE(LM4_GPIO_C) |= 0x0f; + + /* Re-lock commit register */ + LM4_GPIO_CR(LM4_GPIO_C) &= ~0x0f; + LM4_GPIO_LOCK(LM4_GPIO_C) = 0; +} + void system_pre_init(void) { uint32_t hibctl; |