diff options
Diffstat (limited to 'chip/mchp/spi.c')
-rw-r--r-- | chip/mchp/spi.c | 65 |
1 files changed, 23 insertions, 42 deletions
diff --git a/chip/mchp/spi.c b/chip/mchp/spi.c index 48712e8b7e..195c10d8a6 100644 --- a/chip/mchp/spi.c +++ b/chip/mchp/spi.c @@ -1,4 +1,4 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. +/* Copyright 2017 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -23,7 +23,7 @@ #include "tfdp_chip.h" #define CPUTS(outstr) cputs(CC_SPI, outstr) -#define CPRINTS(format, args...) cprints(CC_SPI, format, ## args) +#define CPRINTS(format, args...) cprints(CC_SPI, format, ##args) #define SPI_BYTE_TRANSFER_TIMEOUT_US (3 * MSEC) #define SPI_BYTE_TRANSFER_POLL_INTERVAL_US 100 @@ -33,49 +33,31 @@ #endif static const struct dma_option spi_rx_option[] = { - { - MCHP_DMAC_QMSPI0_RX, - (void *)(MCHP_QMSPI0_RX_FIFO_ADDR), - MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM - }, + { MCHP_DMAC_QMSPI0_RX, (void *)(MCHP_QMSPI0_RX_FIFO_ADDR), + MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM }, #if defined(CONFIG_MCHP_GPSPI) && !defined(LFW) #if CONFIG_MCHP_GPSPI & 0x01 - { - MCHP_DMAC_SPI0_RX, - (void *)&MCHP_SPI_RD(0), - MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM - }, + { MCHP_DMAC_SPI0_RX, (void *)&MCHP_SPI_RD(0), + MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM }, #endif #if CONFIG_MCHP_GPSPI & 0x02 - { - MCHP_DMAC_SPI1_RX, - (void *)&MCHP_SPI_RD(1), - MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM - }, + { MCHP_DMAC_SPI1_RX, (void *)&MCHP_SPI_RD(1), + MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM }, #endif #endif }; static const struct dma_option spi_tx_option[] = { - { - MCHP_DMAC_QMSPI0_TX, - (void *)(MCHP_QMSPI0_TX_FIFO_ADDR), - MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM - }, + { MCHP_DMAC_QMSPI0_TX, (void *)(MCHP_QMSPI0_TX_FIFO_ADDR), + MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM }, #if defined(CONFIG_MCHP_GPSPI) && !defined(LFW) #if CONFIG_MCHP_GPSPI & 0x01 - { - MCHP_DMAC_SPI0_TX, - (void *)&MCHP_SPI_TD(0), - MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM - }, + { MCHP_DMAC_SPI0_TX, (void *)&MCHP_SPI_TD(0), + MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM }, #endif #if CONFIG_MCHP_GPSPI & 0x02 - { - MCHP_DMAC_SPI1_TX, - (void *)&MCHP_SPI_TD(1), - MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM - }, + { MCHP_DMAC_SPI1_TX, (void *)&MCHP_SPI_TD(1), + MCHP_DMA_XFER_SIZE(1) + MCHP_DMA_INC_MEM }, #endif #endif }; @@ -131,8 +113,7 @@ static void spi_mutex_unlock(uint8_t hw_port) * Public SPI interface */ -const void *spi_dma_option(const struct spi_device_t *spi_device, - int is_tx) +const void *spi_dma_option(const struct spi_device_t *spi_device, int is_tx) { uint32_t n; @@ -157,8 +138,8 @@ const void *spi_dma_option(const struct spi_device_t *spi_device, } int spi_transaction_async(const struct spi_device_t *spi_device, - const uint8_t *txdata, int txlen, - uint8_t *rxdata, int rxlen) + const uint8_t *txdata, int txlen, uint8_t *rxdata, + int rxlen) { int rc; @@ -169,13 +150,13 @@ int spi_transaction_async(const struct spi_device_t *spi_device, #if defined(CONFIG_MCHP_GPSPI) && !defined(LFW) case GPSPI0_PORT: case GPSPI1_PORT: - rc = gpspi_transaction_async(spi_device, txdata, - txlen, rxdata, rxlen); + rc = gpspi_transaction_async(spi_device, txdata, txlen, rxdata, + rxlen); break; #endif case QMSPI0_PORT: - rc = qmspi_transaction_async(spi_device, txdata, - txlen, rxdata, rxlen); + rc = qmspi_transaction_async(spi_device, txdata, txlen, rxdata, + rxlen); break; default: rc = EC_ERROR_INVAL; @@ -243,8 +224,8 @@ int spi_transaction_wait(const struct spi_device_t *spi_device) * without the overhead of DMA setup. */ int spi_transaction(const struct spi_device_t *spi_device, - const uint8_t *txdata, int txlen, - uint8_t *rxdata, int rxlen) + const uint8_t *txdata, int txlen, uint8_t *rxdata, + int rxlen) { int rc; |