diff options
Diffstat (limited to 'chip/mec1322/lfw/ec_lfw.c')
| -rw-r--r-- | chip/mec1322/lfw/ec_lfw.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/chip/mec1322/lfw/ec_lfw.c b/chip/mec1322/lfw/ec_lfw.c index 86a4949e17..7dacfc3077 100644 --- a/chip/mec1322/lfw/ec_lfw.c +++ b/chip/mec1322/lfw/ec_lfw.c @@ -48,10 +48,10 @@ void timer_init() uint32_t val = 0; /* Ensure timer is not running */ - MEC1322_TMR32_CTL(0) &= ~(1 << 5); + MEC1322_TMR32_CTL(0) &= ~BIT(5); /* Enable timer */ - MEC1322_TMR32_CTL(0) |= (1 << 0); + MEC1322_TMR32_CTL(0) |= BIT(0); val = MEC1322_TMR32_CTL(0); @@ -67,10 +67,10 @@ void timer_init() MEC1322_TMR32_CNT(0) = 0xffffffff; /* Auto restart */ - MEC1322_TMR32_CTL(0) |= (1 << 3); + MEC1322_TMR32_CTL(0) |= BIT(3); /* Start counting in timer 0 */ - MEC1322_TMR32_CTL(0) |= (1 << 5); + MEC1322_TMR32_CTL(0) |= BIT(5); } @@ -146,7 +146,7 @@ void uart_write_c(char c) uart_write_c('\r'); /* Wait for space in transmit FIFO. */ - while (!(MEC1322_UART_LSR & (1 << 5))) + while (!(MEC1322_UART_LSR & BIT(5))) ; MEC1322_UART_TB = c; } @@ -181,31 +181,31 @@ void jump_to_image(uintptr_t init_addr) void uart_init(void) { /* Set UART to reset on VCC1_RESET instaed of nSIO_RESET */ - MEC1322_UART_CFG &= ~(1 << 1); + MEC1322_UART_CFG &= ~BIT(1); /* Baud rate = 115200. 1.8432MHz clock. Divisor = 1 */ /* Set CLK_SRC = 0 */ - MEC1322_UART_CFG &= ~(1 << 0); + MEC1322_UART_CFG &= ~BIT(0); /* Set DLAB = 1 */ - MEC1322_UART_LCR |= (1 << 7); + MEC1322_UART_LCR |= BIT(7); /* PBRG0/PBRG1 */ MEC1322_UART_PBRG0 = 1; MEC1322_UART_PBRG1 = 0; /* Set DLAB = 0 */ - MEC1322_UART_LCR &= ~(1 << 7); + MEC1322_UART_LCR &= ~BIT(7); /* Set word length to 8-bit */ - MEC1322_UART_LCR |= (1 << 0) | (1 << 1); + MEC1322_UART_LCR |= BIT(0) | BIT(1); /* Enable FIFO */ - MEC1322_UART_FCR = (1 << 0); + MEC1322_UART_FCR = BIT(0); /* Activate UART */ - MEC1322_UART_ACT |= (1 << 0); + MEC1322_UART_ACT |= BIT(0); gpio_config_module(MODULE_UART, 1); } |