diff options
Diffstat (limited to 'chip/stm32/adc-stm32f0.c')
| -rw-r--r-- | chip/stm32/adc-stm32f0.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/chip/stm32/adc-stm32f0.c b/chip/stm32/adc-stm32f0.c index 0f31e3b286..3836767d1f 100644 --- a/chip/stm32/adc-stm32f0.c +++ b/chip/stm32/adc-stm32f0.c @@ -75,7 +75,7 @@ static void adc_init(void) * If clock is already enabled, and ADC module is enabled * then this is a warm reboot and ADC is already initialized. */ - if (STM32_RCC_APB2ENR & (1 << 9) && (STM32_ADC_CR & STM32_ADC_CR_ADEN)) + if (STM32_RCC_APB2ENR & BIT(9) && (STM32_ADC_CR & STM32_ADC_CR_ADEN)) return; /* Enable ADC clock */ @@ -107,7 +107,7 @@ static void adc_init(void) static void adc_configure(int ain_id) { /* Select channel to convert */ - STM32_ADC_CHSELR = 1 << ain_id; + STM32_ADC_CHSELR = BIT(ain_id); /* Disable DMA */ STM32_ADC_CFGR1 &= ~STM32_ADC_CFGR1_DMAEN; @@ -126,16 +126,16 @@ static void adc_continuous_read(int ain_id) STM32_ADC_CFGR1 |= STM32_ADC_CFGR1_CONT; /* Start continuous conversion */ - STM32_ADC_CR |= 1 << 2; /* ADSTART */ + STM32_ADC_CR |= BIT(2); /* ADSTART */ } static void adc_continuous_stop(void) { /* Stop on-going conversion */ - STM32_ADC_CR |= 1 << 4; /* ADSTP */ + STM32_ADC_CR |= BIT(4); /* ADSTP */ /* Wait for conversion to stop */ - while (STM32_ADC_CR & (1 << 4)) + while (STM32_ADC_CR & BIT(4)) ; /* CONT=0 -> continuous mode off */ @@ -173,7 +173,7 @@ static void adc_interval_read(int ain_id, int interval_ms) STM32_TIM_CR1(TIM_ADC) |= 1; /* Start ADC conversion */ - STM32_ADC_CR |= 1 << 2; /* ADSTART */ + STM32_ADC_CR |= BIT(2); /* ADSTART */ } static void adc_interval_stop(void) @@ -182,10 +182,10 @@ static void adc_interval_stop(void) STM32_ADC_CFGR1 &= ~STM32_ADC_CFGR1_EXTEN_MASK; /* Set ADSTP to clear ADSTART */ - STM32_ADC_CR |= 1 << 4; /* ADSTP */ + STM32_ADC_CR |= BIT(4); /* ADSTP */ /* Wait for conversion to stop */ - while (STM32_ADC_CR & (1 << 4)) + while (STM32_ADC_CR & BIT(4)) ; /* Stop the timer */ @@ -307,10 +307,10 @@ int adc_read_channel(enum adc_channel ch) STM32_ADC_ISR = 0xe; /* Start conversion */ - STM32_ADC_CR |= 1 << 2; /* ADSTART */ + STM32_ADC_CR |= BIT(2); /* ADSTART */ /* Wait for end of conversion */ - while (!(STM32_ADC_ISR & (1 << 2))) + while (!(STM32_ADC_ISR & BIT(2))) ; /* read converted value */ value = STM32_ADC_DR; |