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-rw-r--r--chip/stm32/clock-f.c18
1 files changed, 17 insertions, 1 deletions
diff --git a/chip/stm32/clock-f.c b/chip/stm32/clock-f.c
index 1d28fa2168..e9737ddb14 100644
--- a/chip/stm32/clock-f.c
+++ b/chip/stm32/clock-f.c
@@ -165,14 +165,30 @@ void clock_init(void)
* put 1 Wait-State for flash access to ensure proper reads at 48Mhz
* and enable prefetch buffer.
*/
- /* Enable data and instruction cache. */
STM32_FLASH_ACR = STM32_FLASH_ACR_LATENCY | STM32_FLASH_ACR_PRFTEN;
+#ifdef CHIP_FAMILY_STM32F4
+ /* Enable data and instruction cache. */
+ STM32_FLASH_ACR |= STM32_FLASH_ACR_DCEN | STM32_FLASH_ACR_ICEN;
+#endif
+
config_hispeed_clock();
rtc_init();
}
+#ifdef CHIP_FAMILY_STM32F4
+void reset_flash_cache(void)
+{
+ /* Disable data and instruction cache. */
+ STM32_FLASH_ACR &= ~(STM32_FLASH_ACR_DCEN | STM32_FLASH_ACR_ICEN);
+
+ /* Reset data and instruction cache */
+ STM32_FLASH_ACR |= STM32_FLASH_ACR_DCRST | STM32_FLASH_ACR_ICRST;
+}
+DECLARE_HOOK(HOOK_SYSJUMP, reset_flash_cache, HOOK_PRIO_DEFAULT);
+#endif
+
/*****************************************************************************/
/* Console commands */