diff options
Diffstat (limited to 'chip/stm32/config-stm32f09x.h')
| -rw-r--r-- | chip/stm32/config-stm32f09x.h | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/chip/stm32/config-stm32f09x.h b/chip/stm32/config-stm32f09x.h index 527e84db1b..405c63f3ec 100644 --- a/chip/stm32/config-stm32f09x.h +++ b/chip/stm32/config-stm32f09x.h @@ -1,4 +1,4 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. +/* Copyright 2015 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,15 +9,15 @@ * Write protect sectors: 31 4KB sectors, one 132KB sector */ #define CONFIG_FLASH_SIZE_BYTES 0x00040000 -#define CONFIG_FLASH_BANK_SIZE 0x1000 -#define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ -#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ +#define CONFIG_FLASH_BANK_SIZE 0x1000 +#define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ +#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ /* No page mode on STM32F, so no benefit to larger write sizes */ #define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0002 -#define CONFIG_RAM_BASE 0x20000000 -#define CONFIG_RAM_SIZE 0x00008000 +#define CONFIG_RAM_BASE 0x20000000 +#define CONFIG_RAM_SIZE 0x00008000 /* Number of IRQ vectors on the NVIC */ #define CONFIG_IRQ_COUNT 32 @@ -43,33 +43,33 @@ * */ -#define _SECTOR_4KB (4 * 1024) -#define _SECTOR_132KB (132 * 1024) +#define _SECTOR_4KB (4 * 1024) +#define _SECTOR_132KB (132 * 1024) /* The EC uses one sector to emulate persistent state */ #define CONFIG_FLASH_PSTATE -#define CONFIG_FW_PSTATE_SIZE _SECTOR_4KB -#define CONFIG_FW_PSTATE_OFF (30 * _SECTOR_4KB) +#define CONFIG_FW_PSTATE_SIZE _SECTOR_4KB +#define CONFIG_FW_PSTATE_OFF (30 * _SECTOR_4KB) -#define CONFIG_RO_MEM_OFF 0 -#define CONFIG_RO_STORAGE_OFF 0 -#define CONFIG_RO_SIZE (30 * _SECTOR_4KB) -#define CONFIG_RW_MEM_OFF (CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE + \ - CONFIG_FW_PSTATE_SIZE) -#define CONFIG_RW_STORAGE_OFF 0 -#define CONFIG_RW_SIZE _SECTOR_132KB +#define CONFIG_RO_MEM_OFF 0 +#define CONFIG_RO_STORAGE_OFF 0 +#define CONFIG_RO_SIZE (30 * _SECTOR_4KB) +#define CONFIG_RW_MEM_OFF \ + (CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE + CONFIG_FW_PSTATE_SIZE) +#define CONFIG_RW_STORAGE_OFF 0 +#define CONFIG_RW_SIZE _SECTOR_132KB -#define CONFIG_EC_PROTECTED_STORAGE_OFF 0 +#define CONFIG_EC_PROTECTED_STORAGE_OFF 0 #define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RW_MEM_OFF -#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF -#define CONFIG_EC_WRITABLE_STORAGE_SIZE (CONFIG_FLASH_SIZE_BYTES - \ - CONFIG_EC_WRITABLE_STORAGE_OFF) +#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF +#define CONFIG_EC_WRITABLE_STORAGE_SIZE \ + (CONFIG_FLASH_SIZE_BYTES - CONFIG_EC_WRITABLE_STORAGE_OFF) -#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF -#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE +#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF +#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE /* We map each write protect sector to a bank */ -#define PHYSICAL_BANKS 32 -#define WP_BANK_COUNT 31 -#define PSTATE_BANK 30 -#define PSTATE_BANK_COUNT 1 +#define PHYSICAL_BANKS 32 +#define WP_BANK_COUNT 31 +#define PSTATE_BANK 30 +#define PSTATE_BANK_COUNT 1 |