diff options
Diffstat (limited to 'chip/stm32/config-stm32g41xb.h')
| -rw-r--r-- | chip/stm32/config-stm32g41xb.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/chip/stm32/config-stm32g41xb.h b/chip/stm32/config-stm32g41xb.h index 1daca3c4a7..ab8642b9e6 100644 --- a/chip/stm32/config-stm32g41xb.h +++ b/chip/stm32/config-stm32g41xb.h @@ -16,7 +16,12 @@ * The minimum write size for STM32G4 is 8 bytes. Cros-EC does not support * PSTATE in single bank memories with a write size > 4 bytes. */ -#define CONFIG_FLASH_SIZE (128 * 1024) +/* + * TODO(b/167462264): This is a temporary change to allow for platform bringup + * without being constrained by flash space issue. Currently only using RO image + * flashed with STM32 debugger. + */ +#define CONFIG_FLASH_SIZE (256 * 1024) #define CONFIG_FLASH_WRITE_SIZE 0x0004 #define CONFIG_FLASH_BANK_SIZE (2 * 1024) #define CONFIG_FLASH_ERASE_SIZE CONFIG_FLASH_BANK_SIZE |