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Diffstat (limited to 'chip/stm32/pwm.c')
-rw-r--r--chip/stm32/pwm.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/chip/stm32/pwm.c b/chip/stm32/pwm.c
index ce2f8636f6..45d489a8c0 100644
--- a/chip/stm32/pwm.c
+++ b/chip/stm32/pwm.c
@@ -69,9 +69,9 @@ static void pwm_configure(enum pwm_channel ch)
/* Output, PWM mode 1, preload enable */
if (pwm->channel & 0x1)
- *ccmr = (6 << 4) | (1 << 3);
+ *ccmr = (6 << 4) | BIT(3);
else
- *ccmr = (6 << 12) | (1 << 11);
+ *ccmr = (6 << 12) | BIT(11);
/* Output enable. Set active high/low. */
if (pwm->flags & PWM_CONFIG_ACTIVE_LOW)
@@ -90,13 +90,13 @@ static void pwm_configure(enum pwm_channel ch)
* TODO(shawnn): BDTR is undocumented on STM32L. Verify this isn't
* harmful on STM32L.
*/
- tim->bdtr |= (1 << 15);
+ tim->bdtr |= BIT(15);
/* Generate update event to force loading of shadow registers */
tim->egr |= 1;
/* Enable auto-reload preload, start counting */
- tim->cr1 |= (1 << 7) | (1 << 0);
+ tim->cr1 |= BIT(7) | BIT(0);
atomic_or(&using_pwm, 1 << ch);
@@ -113,7 +113,7 @@ static void pwm_disable(enum pwm_channel ch)
return;
/* Main output disable */
- tim->bdtr &= ~(1 << 15);
+ tim->bdtr &= ~BIT(15);
/* Disable counter */
tim->cr1 &= ~0x1;