diff options
Diffstat (limited to 'chip/stm32/registers-stm32l5.h')
| -rw-r--r-- | chip/stm32/registers-stm32l5.h | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/chip/stm32/registers-stm32l5.h b/chip/stm32/registers-stm32l5.h index 45f333951b..9a5fe75c95 100644 --- a/chip/stm32/registers-stm32l5.h +++ b/chip/stm32/registers-stm32l5.h @@ -132,6 +132,7 @@ #define STM32_RTC_BASE (APB1PERIPH_BASE + 0x2800UL) #define STM32_WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL) #define STM32_IWDG_BASE (APB1PERIPH_BASE + 0x3000UL) +#define STM32_TAMP_BASE (APB1PERIPH_BASE + 0x3400UL) #define STM32_SPI2_BASE (APB1PERIPH_BASE + 0x3800UL) #define STM32_SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL) #define STM32_USART2_BASE (APB1PERIPH_BASE + 0x4400UL) @@ -2008,13 +2009,32 @@ #define STM32_RTC_TSDR REG32(STM32_RTC_BASE + 0x34) #define STM32_RTC_TAFCR REG32(STM32_RTC_BASE + 0x40) #define STM32_RTC_ALRMASSR REG32(STM32_RTC_BASE + 0x44) -#define STM32_RTC_BACKUP(n) REG32(STM32_RTC_BASE + 0x50 + 4 * (n)) #define STM32_RTC_CLEAR_FLAG(x) \ (STM32_RTC_ISR = (~((x) | STM32_RTC_ISR_INIT) | \ (STM32_RTC_ISR & STM32_RTC_ISR_INIT))) -#define STM32_BKP_DATA(n) STM32_RTC_BACKUP(n) +/* --- Tamper and backup registers --- */ +#define STM32_TAMP_CR1 REG32(STM32_TAMP_BASE) +#define STM32_TAMP_CR2 REG32(STM32_TAMP_BASE + 0x04) +#define STM32_TAMP_CR3 REG32(STM32_TAMP_BASE + 0x08) +#define STM32_TAMP_FLTCR REG32(STM32_TAMP_BASE + 0x0C) +#define STM32_TAMP_ATCR1 REG32(STM32_TAMP_BASE + 0x10) +#define STM32_TAMP_ATSEEDR REG32(STM32_TAMP_BASE + 0x14) +#define STM32_TAMP_ATOR REG32(STM32_TAMP_BASE + 0x18) +#define STM32_TAMP_ATOCR2 REG32(STM32_TAMP_BASE + 0x1C) +#define STM32_TAMP_ATSMCR REG32(STM32_TAMP_BASE + 0x20) +#define STM32_TAMP_PRIVCR REG32(STM32_TAMP_BASE + 0x24) +#define STM32_TAMP_IER REG32(STM32_TAMP_BASE + 0x2C) +#define STM32_TAMP_SR REG32(STM32_TAMP_BASE + 0x30) +#define STM32_TAMP_MISR REG32(STM32_TAMP_BASE + 0x34) +#define STM32_TAMP_SMISR REG32(STM32_TAMP_BASE + 0x38) +#define STM32_TAMP_SCR REG32(STM32_TAMP_BASE + 0x3C) +#define STM32_TAMP_COUNTR REG32(STM32_TAMP_BASE + 0x40) +#define STM32_TAMP_CFGR REG32(STM32_TAMP_BASE + 0x50) +#define STM32_TAMP_BACKUP(n) REG32(STM32_TAMP_BASE + 0x100 + 4 * (n)) + +#define STM32_BKP_DATA(n) STM32_TAMP_BACKUP(n) #define STM32_BKP_BYTES 128 #define RTC_TR_PM_POS 22U |