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Diffstat (limited to 'chip/stm32/registers.h')
-rw-r--r--chip/stm32/registers.h25
1 files changed, 15 insertions, 10 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h
index 077b72cbe0..673ff1e83d 100644
--- a/chip/stm32/registers.h
+++ b/chip/stm32/registers.h
@@ -375,11 +375,12 @@ typedef volatile struct timer_ctlr timer_ctlr_t;
#error Unsupported chip variant
#endif
-/* Enable bits for RCC_APB/AHB regs */
+/* Peripheral bits for RCC_APB/AHB regs */
#define STM32_RCC_PB1_USART2 (1 << 17)
#define STM32_RCC_PB1_USART3 (1 << 18)
#define STM32_RCC_PB1_USART4 (1 << 19)
#define STM32_RCC_PB1_USART5 (1 << 20)
+#define STM32_RCC_PB2_SPI1 (1 << 12)
#define STM32_RCC_PB2_USART1 (1 << 14)
/* --- Watchdogs --- */
@@ -467,24 +468,28 @@ typedef volatile struct timer_ctlr timer_ctlr_t;
/* The SPI controller registers */
struct stm32_spi_regs {
- uint16_t ctrl1;
+ uint16_t cr1;
uint16_t _pad0;
- uint16_t ctrl2;
+ uint16_t cr2;
uint16_t _pad1;
- unsigned stat;
- uint16_t data;
+ unsigned sr;
+ uint16_t dr;
uint16_t _pad2;
- unsigned crcp;
- unsigned rxcrc;
- unsigned txcrc;
- unsigned i2scfgr; /* STM32F10x only */
- unsigned i2spr; /* STM32F10x only */
+ unsigned crcpr;
+ unsigned rxcrcr;
+ unsigned txcrcr;
+ unsigned i2scfgr; /* STM32F10x and STM32L only */
+ unsigned i2spr; /* STM32F10x and STM32L only */
};
/* Must be volatile, or compiler optimizes out repeated accesses */
typedef volatile struct stm32_spi_regs stm32_spi_regs_t;
#define STM32_SPI1_REGS ((stm32_spi_regs_t *)STM32_SPI1_BASE)
+#define STM32_SPI_CR1_SPE (1 << 6)
+#define STM32_SPI_CR2_RXDMAEN (1 << 0)
+#define STM32_SPI_CR2_TXDMAEN (1 << 1)
+
/* --- Debug --- */
#define STM32_DBGMCU_BASE 0xE0042000