diff options
Diffstat (limited to 'chip/stm32/spi_master.c')
| -rw-r--r-- | chip/stm32/spi_master.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/chip/stm32/spi_master.c b/chip/stm32/spi_master.c index 47c5be3979..4b48f8ea80 100644 --- a/chip/stm32/spi_master.c +++ b/chip/stm32/spi_master.c @@ -228,13 +228,16 @@ static int spi_master_initialize(int port) spi->cr1 |= STM32_SPI_CR1_BIDIMODE | STM32_SPI_CR1_BIDIOE; #endif + /* Drive Chip Select high for all ports before turning on SPI module */ for (i = 0; i < spi_devices_used; i++) { if (spi_devices[i].port != port) continue; - /* Drive SS high */ gpio_set_level(spi_devices[i].gpio_cs, 1); } + /* Enable SPI hardware module. This will actively drive the CLK pin */ + spi->cr1 |= STM32_SPI_CR1_SPE; + /* Set flag */ spi_enabled[port] = 1; @@ -257,7 +260,7 @@ static int spi_master_shutdown(int port) dma_disable(dma_tx_option[port].channel); dma_disable(dma_rx_option[port].channel); - /* Disable SPI */ + /* Disable SPI. Let the CLK pin float. */ spi->cr1 &= ~STM32_SPI_CR1_SPE; spi_clear_rx_fifo(spi); @@ -349,6 +352,10 @@ int spi_transaction_async(const struct spi_device_t *spi_device, stm32_spi_regs_t *spi = SPI_REGS[port]; char *buf = NULL; + /* We should not ever be called when disabled, but fail early if so. */ + if (!spi_enabled[port]) + return EC_ERROR_BUSY; + #ifndef CONFIG_SPI_HALFDUPLEX if (rxlen == SPI_READBACK_ALL) { buf = rxdata; @@ -372,7 +379,6 @@ int spi_transaction_async(const struct spi_device_t *spi_device, #ifdef CONFIG_SPI_HALFDUPLEX spi->cr1 |= STM32_SPI_CR1_BIDIOE; #endif - spi->cr1 |= STM32_SPI_CR1_SPE; if (full_readback) return EC_SUCCESS; @@ -383,8 +389,6 @@ int spi_transaction_async(const struct spi_device_t *spi_device, spi_clear_tx_fifo(spi); - spi->cr1 &= ~STM32_SPI_CR1_SPE; - if (rxlen) { rv = spi_dma_start(port, buf, rxdata, rxlen); if (rv != EC_SUCCESS) @@ -392,7 +396,6 @@ int spi_transaction_async(const struct spi_device_t *spi_device, #ifdef CONFIG_SPI_HALFDUPLEX spi->cr1 &= ~STM32_SPI_CR1_BIDIOE; #endif - spi->cr1 |= STM32_SPI_CR1_SPE; } err_free: @@ -406,9 +409,7 @@ err_free: int spi_transaction_flush(const struct spi_device_t *spi_device) { int rv = spi_dma_wait(spi_device->port); - stm32_spi_regs_t *spi = SPI_REGS[spi_device->port]; - spi->cr1 &= ~STM32_SPI_CR1_SPE; /* Drive SS high */ gpio_set_level(spi_device->gpio_cs, 1); |