summaryrefslogtreecommitdiff
path: root/chip
diff options
context:
space:
mode:
Diffstat (limited to 'chip')
-rw-r--r--chip/it83xx/clock.c2
-rw-r--r--chip/lm4/clock.c10
-rw-r--r--chip/lm4/i2c.c6
-rw-r--r--chip/lm4/lpc.c8
-rw-r--r--chip/lm4/spi.c2
-rw-r--r--chip/mec1322/clock.c2
-rw-r--r--chip/mec1322/i2c.c4
-rw-r--r--chip/stm32/clock-stm32l.c10
-rw-r--r--chip/stm32/dma.c2
-rw-r--r--chip/stm32/gpio-stm32f.c4
-rw-r--r--chip/stm32/gpio-stm32f0.c4
-rw-r--r--chip/stm32/gpio-stm32l.c4
-rw-r--r--chip/stm32/i2c-stm32f.c17
-rw-r--r--chip/stm32/i2c-stm32f0.c4
-rw-r--r--chip/stm32/i2c-stm32l.c8
-rw-r--r--chip/stm32/spi.c6
-rw-r--r--chip/stm32/system.c2
-rw-r--r--chip/stm32/usb_pd_phy.c10
18 files changed, 53 insertions, 52 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c
index 437cb3b4b7..4fe72245da 100644
--- a/chip/it83xx/clock.c
+++ b/chip/it83xx/clock.c
@@ -15,7 +15,7 @@
/* Console output macros. */
#define CPUTS(outstr) cputs(CC_CLOCK, outstr)
-#define CPRINTF(format, args...) cprintf(CC_CLOCK, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_CLOCK, format, ## args)
static int freq;
diff --git a/chip/lm4/clock.c b/chip/lm4/clock.c
index 04b86fae92..05027e0d95 100644
--- a/chip/lm4/clock.c
+++ b/chip/lm4/clock.c
@@ -22,7 +22,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_CLOCK, outstr)
-#define CPRINTF(format, args...) cprintf(CC_CLOCK, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_CLOCK, format, ## args)
#define PLL_CLOCK 66666667 /* System clock = 200MHz PLL/3 = 66.667MHz */
@@ -250,7 +250,7 @@ void __idle(void)
* so this only starts once all other tasks have gotten a chance to do
* their task inits and have gone to sleep.
*/
- CPRINTF("[%T low power idle task started]\n");
+ CPRINTS("low power idle task started");
while (1) {
/*
@@ -286,8 +286,8 @@ void __idle(void)
clock_wait_cycles(1);
if (LOW_SPEED_DEEP_SLEEP_ALLOWED)
- CPRINTF("[%T Disabling console in "
- "deep sleep]\n");
+ CPRINTS("Disabling console in "
+ "deep sleep");
}
/*
@@ -361,7 +361,7 @@ void __idle(void)
/* Calculate how close we were to missing deadline */
margin_us = next_delay - (int)(rtc_t1.val - rtc_t0.val);
if (margin_us < 0)
- CPRINTF("[%T overslept by %dus]\n", -margin_us);
+ CPRINTS("overslept by %dus", -margin_us);
/* Record the closest to missing a deadline. */
if (margin_us < dsleep_recovery_margin_us)
diff --git a/chip/lm4/i2c.c b/chip/lm4/i2c.c
index 57359646dc..457236cc93 100644
--- a/chip/lm4/i2c.c
+++ b/chip/lm4/i2c.c
@@ -17,7 +17,7 @@
#include "util.h"
#define CPUTS(outstr) cputs(CC_I2C, outstr)
-#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
/* Flags for writes to MCS */
#define LM4_I2C_MCS_RUN (1 << 0)
@@ -186,7 +186,7 @@ int i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
(i2c_get_line_levels(port) != I2C_LINE_IDLE))) {
uint32_t tpr = LM4_I2C_MTPR(port);
- CPRINTF("[%T I2C%d bad status 0x%02x, SCL=%d, SDA=%d]\n", port,
+ CPRINTS("I2C%d bad status 0x%02x, SCL=%d, SDA=%d", port,
reg_mcs,
i2c_get_line_levels(port) & I2C_LINE_SCL_HIGH,
i2c_get_line_levels(port) & I2C_LINE_SDA_HIGH);
@@ -352,7 +352,7 @@ static void i2c_freq_changed(void)
#ifdef PRINT_I2C_SPEEDS
const int f = freq / (2 * (1 + tpr) * (6 + 4));
- CPRINTF("[%T I2C%d clk=%d tpr=%d freq=%d]\n",
+ CPRINTS("I2C%d clk=%d tpr=%d freq=%d",
i2c_ports[i].port, freq, tpr, f);
#endif
diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c
index ef273be8b8..8f8c5434a4 100644
--- a/chip/lm4/lpc.c
+++ b/chip/lm4/lpc.c
@@ -52,7 +52,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_LPC, outstr)
-#define CPRINTF(format, args...) cprintf(CC_LPC, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_LPC, format, ## args)
#define LPC_SYSJUMP_TAG 0x4c50 /* "LP" */
@@ -158,7 +158,7 @@ static void lpc_generate_smi(void)
gpio_set_level(GPIO_PCH_SMI_L, 1);
if (host_events & event_mask[LPC_HOST_EVENT_SMI])
- CPRINTF("[%T smi 0x%08x]\n",
+ CPRINTS("smi 0x%08x",
host_events & event_mask[LPC_HOST_EVENT_SMI]);
}
@@ -181,7 +181,7 @@ static void lpc_generate_sci(void)
#endif
if (host_events & event_mask[LPC_HOST_EVENT_SCI])
- CPRINTF("[%T sci 0x%08x]\n",
+ CPRINTS("sci 0x%08x",
host_events & event_mask[LPC_HOST_EVENT_SCI]);
}
@@ -622,7 +622,7 @@ void lpc_interrupt(void)
LM4_LPC_ST(i) &= ~LM4_LPC_ST_FRMH;
}
- CPRINTF("[%T LPC RESET# %sasserted]\n",
+ CPRINTS("LPC RESET# %sasserted",
lpc_get_pltrst_asserted() ? "" : "de");
}
}
diff --git a/chip/lm4/spi.c b/chip/lm4/spi.c
index aa8785ed0e..f6afd7cbd8 100644
--- a/chip/lm4/spi.c
+++ b/chip/lm4/spi.c
@@ -16,7 +16,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_SPI, outstr)
-#define CPRINTF(format, args...) cprintf(CC_SPI, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_SPI, format, ## args)
int spi_enable(int enable)
diff --git a/chip/mec1322/clock.c b/chip/mec1322/clock.c
index 6111b7de86..512627b184 100644
--- a/chip/mec1322/clock.c
+++ b/chip/mec1322/clock.c
@@ -13,7 +13,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_CLOCK, outstr)
-#define CPRINTF(format, args...) cprintf(CC_CLOCK, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_CLOCK, format, ## args)
static int freq = 48000000;
diff --git a/chip/mec1322/i2c.c b/chip/mec1322/i2c.c
index 8eaf861382..2ed2cbaedb 100644
--- a/chip/mec1322/i2c.c
+++ b/chip/mec1322/i2c.c
@@ -16,7 +16,7 @@
#include "util.h"
#define CPUTS(outstr) cputs(CC_I2C, outstr)
-#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
#define I2C_CLOCK 16000000 /* 16 MHz */
@@ -199,7 +199,7 @@ int i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
if (!started &&
(((reg_sts & (STS_BER | STS_LAB)) || !(reg_sts & STS_NBB)) ||
(i2c_get_line_levels(port) != I2C_LINE_IDLE))) {
- CPRINTF("[%T I2C%d bad status 0x%02x, SCL=%d, SDA=%d]\n", port,
+ CPRINTS("I2C%d bad status 0x%02x, SCL=%d, SDA=%d", port,
reg_sts,
i2c_get_line_levels(port) & I2C_LINE_SCL_HIGH,
i2c_get_line_levels(port) & I2C_LINE_SDA_HIGH);
diff --git a/chip/stm32/clock-stm32l.c b/chip/stm32/clock-stm32l.c
index 2f1b0f655a..502a8187c3 100644
--- a/chip/stm32/clock-stm32l.c
+++ b/chip/stm32/clock-stm32l.c
@@ -228,7 +228,7 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds)
for (i = GPIO_KB_OUT00; i < GPIO_KB_OUT00 + KEYBOARD_COLS; i++)
gpio_set_flags(i, GPIO_INPUT);
- ccprintf("[%T fake hibernate. waits for power button/lid/RTC/AC]\n");
+ ccprints("fake hibernate. waits for power button/lid/RTC/AC");
cflush();
if (seconds || microseconds) {
@@ -241,7 +241,7 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds)
task_wait_event(-1);
}
- ccprintf("[%T fake RTC alarm fires. resets EC]\n");
+ ccprints("fake RTC alarm fires. resets EC");
cflush();
system_reset(SYSTEM_RESET_HARD);
}
@@ -249,7 +249,7 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds)
static void fake_hibernate_power_button_hook(void)
{
if (fake_hibernate && lid_is_open() && !power_button_is_pressed()) {
- ccprintf("[%T %s() resets EC]\n", __func__);
+ ccprints("%s() resets EC", __func__);
cflush();
system_reset(SYSTEM_RESET_HARD);
}
@@ -260,7 +260,7 @@ DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, fake_hibernate_power_button_hook,
static void fake_hibernate_lid_hook(void)
{
if (fake_hibernate && lid_is_open()) {
- ccprintf("[%T %s() resets EC]\n", __func__);
+ ccprints("%s() resets EC", __func__);
cflush();
system_reset(SYSTEM_RESET_HARD);
}
@@ -270,7 +270,7 @@ DECLARE_HOOK(HOOK_LID_CHANGE, fake_hibernate_lid_hook, HOOK_PRIO_DEFAULT);
static void fake_hibernate_ac_hook(void)
{
if (fake_hibernate && extpower_is_present()) {
- ccprintf("[%T %s() resets EC]\n", __func__);
+ ccprints("%s() resets EC", __func__);
cflush();
system_reset(SYSTEM_RESET_HARD);
}
diff --git a/chip/stm32/dma.c b/chip/stm32/dma.c
index e648b7418e..735ffbd326 100644
--- a/chip/stm32/dma.c
+++ b/chip/stm32/dma.c
@@ -14,7 +14,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_DMA, outstr)
-#define CPRINTF(format, args...) cprintf(CC_DMA, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_DMA, format, ## args)
/* Task IDs for the interrupt handlers to wake up */
static task_id_t id[STM32_DMAC_COUNT];
diff --git a/chip/stm32/gpio-stm32f.c b/chip/stm32/gpio-stm32f.c
index 564ffbb56f..8b6344fdad 100644
--- a/chip/stm32/gpio-stm32f.c
+++ b/chip/stm32/gpio-stm32f.c
@@ -15,7 +15,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_GPIO, outstr)
-#define CPRINTF(format, args...) cprintf(CC_GPIO, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args)
/*
* Special precautions must be taken in order to avoid accidentally rebooting
@@ -209,7 +209,7 @@ int gpio_enable_interrupt(enum gpio_signal signal)
bit = 31 - __builtin_clz(g->mask);
if (exti_events[bit]) {
- CPRINTF("[%T Overriding %s with %s on EXTI%d]\n",
+ CPRINTS("Overriding %s with %s on EXTI%d",
exti_events[bit]->name, g->name, bit);
}
exti_events[bit] = g;
diff --git a/chip/stm32/gpio-stm32f0.c b/chip/stm32/gpio-stm32f0.c
index 0f11a65c15..5cbb61993e 100644
--- a/chip/stm32/gpio-stm32f0.c
+++ b/chip/stm32/gpio-stm32f0.c
@@ -15,7 +15,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_GPIO, outstr)
-#define CPRINTF(format, args...) cprintf(CC_GPIO, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args)
/* For each EXTI bit, record which GPIO entry is using it */
static const struct gpio_info *exti_events[16];
@@ -210,7 +210,7 @@ int gpio_enable_interrupt(enum gpio_signal signal)
bit = 31 - __builtin_clz(g->mask);
if (exti_events[bit]) {
- CPRINTF("[%T Overriding %s with %s on EXTI%d]\n",
+ CPRINTS("Overriding %s with %s on EXTI%d",
exti_events[bit]->name, g->name, bit);
}
exti_events[bit] = g;
diff --git a/chip/stm32/gpio-stm32l.c b/chip/stm32/gpio-stm32l.c
index d3aae2e31f..b6cb2bf71f 100644
--- a/chip/stm32/gpio-stm32l.c
+++ b/chip/stm32/gpio-stm32l.c
@@ -15,7 +15,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_GPIO, outstr)
-#define CPRINTF(format, args...) cprintf(CC_GPIO, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args)
/* For each EXTI bit, record which GPIO entry is using it */
static const struct gpio_info *exti_events[16];
@@ -214,7 +214,7 @@ int gpio_enable_interrupt(enum gpio_signal signal)
bit = 31 - __builtin_clz(g->mask);
if (exti_events[bit]) {
- CPRINTF("[%T Overriding %s with %s on EXTI%d]\n",
+ CPRINTS("Overriding %s with %s on EXTI%d",
exti_events[bit]->name, g->name, bit);
}
exti_events[bit] = g;
diff --git a/chip/stm32/i2c-stm32f.c b/chip/stm32/i2c-stm32f.c
index b2d775d992..8e1ab99d57 100644
--- a/chip/stm32/i2c-stm32f.c
+++ b/chip/stm32/i2c-stm32f.c
@@ -21,6 +21,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_I2C, outstr)
#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
/* Maximum transfer of a SMBUS block transfer */
#define SMBUS_MAX_BLOCK 32
@@ -163,7 +164,7 @@ static int i2c_write_raw_slave(int port, void *buf, int len)
dma_disable_tc_interrupt(DMAC_SLAVE_TX);
if (!(rv & TASK_EVENT_WAKE)) {
- CPRINTF("[%T Slave timeout, resetting i2c]\n");
+ CPRINTS("Slave timeout, resetting i2c");
i2c_init_port(port);
}
}
@@ -256,9 +257,7 @@ static void i2c_event_handler(int port)
/* Confirm that you are not in master mode */
if (STM32_I2C_SR2(port) & (1 << 0)) {
- CPRINTF(
- "[%T I2C slave ISR triggered in "
- "master mode, ignoring]\n");
+ CPRINTS("slave ISR triggered in master mode, ignoring");
return;
}
@@ -316,9 +315,9 @@ static void i2c_error_handler(int port)
/* ACK failed (NACK); expected when AP reads final byte.
* Software must clear AF bit. */
} else {
- CPRINTF("[%T %s: I2C_SR1(%d): 0x%04x]\n",
+ CPRINTS("%s: I2C_SR1(%d): 0x%04x",
__func__, port, i2c_sr1[port]);
- CPRINTF("[%T %s: I2C_SR2(%d): 0x%04x]\n",
+ CPRINTS("%s: I2C_SR2(%d): 0x%04x",
__func__, port, STM32_I2C_SR2(port));
}
@@ -552,7 +551,7 @@ static void handle_i2c_error(int port, int rv)
/* EC_ERROR_TIMEOUT may have a code specifying where the timeout was */
if ((rv & 0xff) == EC_ERROR_TIMEOUT) {
#ifdef CONFIG_I2C_DEBUG
- CPRINTF("[%T Wait_status() timeout type: %d]\n", (rv >> 8));
+ CPRINTS("Wait_status() timeout type: %d", (rv >> 8));
#endif
rv = EC_ERROR_TIMEOUT;
}
@@ -574,7 +573,7 @@ static void handle_i2c_error(int port, int rv)
* (Probably a stray pulse on the line got it out of sync with
* the actual bytes) so reset it.
*/
- CPRINTF("[%T Unable to send START, resetting i2c]\n");
+ CPRINTS("Unable to send START, resetting i2c");
i2c_init_port(port);
goto cr_cleanup;
} else if (rv == EC_ERROR_TIMEOUT && !(r & 2)) {
@@ -583,7 +582,7 @@ static void handle_i2c_error(int port, int rv)
* It seems that this can be happen very briefly while sending
* a 1. We've not actually seen this, but just to be safe.
*/
- CPRINTF("[%T Bad BUSY bit detected]\n");
+ CPRINTS("Bad BUSY bit detected");
master_stop(port);
}
diff --git a/chip/stm32/i2c-stm32f0.c b/chip/stm32/i2c-stm32f0.c
index 3bb5419cf3..cd93965503 100644
--- a/chip/stm32/i2c-stm32f0.c
+++ b/chip/stm32/i2c-stm32f0.c
@@ -17,7 +17,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_I2C, outstr)
-#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
/* Maximum transfer of a SMBUS block transfer */
#define SMBUS_MAX_BLOCK 32
@@ -72,7 +72,7 @@ static void i2c_set_freq_port(const struct i2c_port_t *p)
STM32_I2C_TIMINGR(port) = 0xB0420F13;
break;
default: /* unknown speed, defaults to 100kBps */
- CPRINTF("[%T I2C bad speed %d kBps]\n", p->kbps);
+ CPRINTS("I2C bad speed %d kBps", p->kbps);
STM32_I2C_TIMINGR(port) = 0xB0420F13;
}
/* Enable port */
diff --git a/chip/stm32/i2c-stm32l.c b/chip/stm32/i2c-stm32l.c
index b2f528aa4f..34a80c2b3e 100644
--- a/chip/stm32/i2c-stm32l.c
+++ b/chip/stm32/i2c-stm32l.c
@@ -20,7 +20,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_I2C, outstr)
-#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
/* Maximum transfer of a SMBUS block transfer */
#define SMBUS_MAX_BLOCK 32
@@ -50,7 +50,7 @@
#ifdef CONFIG_I2C_DEBUG
static void dump_i2c_reg(int port, const char *what)
{
- CPRINTF("[%T i2c CR1=%04x CR2=%04x SR1=%04x SR2=%04x %s]\n",
+ CPRINTS("i2c CR1=%04x CR2=%04x SR1=%04x SR2=%04x %s",
STM32_I2C_CR1(port),
STM32_I2C_CR2(port),
STM32_I2C_SR1(port),
@@ -305,8 +305,8 @@ int i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_bytes,
*/
if (rv == I2C_ERROR_FAILED_START) {
const struct i2c_port_t *p = i2c_ports;
- CPRINTF("[%T i2c_xfer start error; "
- "unwedging and resetting i2c %d.\n", port);
+ CPRINTS("i2c_xfer start error; "
+ "unwedging and resetting i2c %d", port);
i2c_unwedge(port);
diff --git a/chip/stm32/spi.c b/chip/stm32/spi.c
index c9e57cd5b2..960067f955 100644
--- a/chip/stm32/spi.c
+++ b/chip/stm32/spi.c
@@ -21,7 +21,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_SPI, outstr)
-#define CPRINTF(format, args...) cprintf(CC_SPI, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_SPI, format, ## args)
/* DMA channel option */
static const struct dma_option dma_tx_option = {
@@ -346,7 +346,7 @@ void spi_event(enum gpio_signal signal)
* AP started a transaction but we weren't ready for it.
* Tell AP we weren't ready, and ignore the received data.
*/
- CPRINTF("[%T SPI not ready]\n");
+ CPRINTS("SPI not ready");
spi->dr = EC_SPI_NOT_READY;
state = SPI_STATE_RX_BAD;
return;
@@ -452,7 +452,7 @@ void spi_event(enum gpio_signal signal)
/* Error, timeout, or protocol we can't handle. Ignore data. */
spi->dr = EC_SPI_RX_BAD_DATA;
state = SPI_STATE_RX_BAD;
- CPRINTF("[%T SPI rx bad data\n]");
+ CPRINTS("SPI rx bad data");
}
static void spi_chipset_startup(void)
diff --git a/chip/stm32/system.c b/chip/stm32/system.c
index 8b4ddea4f9..27ed7398e9 100644
--- a/chip/stm32/system.c
+++ b/chip/stm32/system.c
@@ -64,7 +64,7 @@ void __no_hibernate(uint32_t seconds, uint32_t microseconds)
*
* Until then, treat this as a request to hard-reboot.
*/
- cprintf(CC_SYSTEM, "[%T hibernate not supported, so rebooting]\n");
+ cprints(CC_SYSTEM, "hibernate not supported, so rebooting");
cflush();
system_reset(SYSTEM_RESET_HARD);
}
diff --git a/chip/stm32/usb_pd_phy.c b/chip/stm32/usb_pd_phy.c
index bb402ee703..39f898d84c 100644
--- a/chip/stm32/usb_pd_phy.c
+++ b/chip/stm32/usb_pd_phy.c
@@ -20,8 +20,10 @@
#ifdef CONFIG_COMMON_RUNTIME
#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
#else
#define CPRINTF(format, args...)
+#define CPRINTS(format, args...)
#endif
#define PD_DATARATE 300000 /* Hz */
@@ -84,7 +86,7 @@ static int wait_bits(int nb)
&& !(STM32_TIM_SR(TIM_RX) & 4))
; /* optimized for latency, not CPU usage ... */
if (dma_bytes_done(rx, PD_MAX_RAW_SIZE) < nb) {
- CPRINTF("[%T PD TMOUT RX %d/%d]\n",
+ CPRINTS("PD TMOUT RX %d/%d",
dma_bytes_done(rx, PD_MAX_RAW_SIZE), nb);
return -1;
}
@@ -131,7 +133,7 @@ int pd_dequeue_bits(void *ctxt, int off, int len, uint32_t *val)
return -1;
}
stream_err:
- CPRINTF("[%T PD Invalid %d @%d]\n", cnt, off);
+ CPRINTS("PD Invalid %d @%d", cnt, off);
return -1;
}
@@ -155,7 +157,7 @@ int pd_find_preamble(void *ctxt)
!(STM32_TIM_SR(TIM_RX) & 4))
;
if (STM32_TIM_SR(TIM_RX) & 4) {
- CPRINTF("[%T PD TMOUT RX %d/%d]\n",
+ CPRINTS("PD TMOUT RX %d/%d",
PD_MAX_RAW_SIZE - rx->cndtr, bit);
return -1;
}
@@ -524,7 +526,7 @@ void *pd_hw_init(void)
STM32_EXTI_IMR |= EXTI_COMP_MASK;
task_enable_irq(IRQ_COMP);
- CPRINTF("[%T USB PD initialized]\n");
+ CPRINTS("USB PD initialized");
return raw_samples;
}
View Lorry Controller Status